3 rd International Bhurban Conference on Applied Sciences and Technology, Bhurban, Pakistan. June 07-12, 2004 Design of the Low Phase Noise Voltage Controlled Oscillator with On-Chip Vs Off- Chip Passive Components. Saeed Zafar 1 Department of Electrical Engineering; Comsats Institute of Information Technology, Islamabad, Pakistan I. Abstract The Voltage Controlled Oscillator (VCO) is one of the most important components for highfrequency transceivers. In this work IBM SiGe 0.5µm technology is used to design an on-chip VCO and MCM-D technology is used to design the VCO with off-chip varactors, inductors and capacitors. Theses results are measured at centre frequency of 2.5GHz and with a voltage supply of 3.3volts. The phase noise of the on-chip VCO is 100.5 dbc/hz at 100kHz-offset frequency. It also has an output power of 7.6 dbm. The oscillator core consumes 34mA and the output buffer drew 6.23mA. The voltage supply is 3.3 volts. The chip size is 0.5x1.2 mm 2. The off-chip design has a phase noise of -103.1 dbc/hz at 100kHz-offset frequency. The on-chip VCO with extracted parasitic has a phase noise of 93.08 dbc/hz at 100kHz-offset frequency. The tuning range for the on-chip VCO solution is 2.37 to 2.55GHz. Index terms: Bipolar transistor, fully integrated VCO, Phase noise, Circuit theory and design, Varactors. II. Introduction In the recent years, there has been a strong increase in wireless data and voice communication standards in various frequency bands. Fully integrated voltage controlled oscillators (VCOs) are a major bottleneck for system-on-chip (SOC) realization of wireless transceivers. The increasing demand for portable communications equipment has driven research transceivers at lower cost. This has led to intense interest in integrating as many components as possible. One high-speed component that has been particularly hard to integrate is voltage controlled oscillator (VCO), This is largely due to poor quality of on-chip passive components in silicon integrated circuit technologies, namely the low quality factor Q of on-chip inductors and poor linearity of on-chip varactors. High quality passive devices are required for design of high performance VCOs. The VCO parameters that require high performance passive elements are phase noise, frequency tuning and VCO gain variation. [2] In general there are various technologies available for radio frequency integrated circuits at 2.4 GHz, i.e. Si bipolar, Si or SiGe BiCMOS, CMOS or GaAs. With mobile communications becoming a high volume mass market, there is strong market pressure towards low price, highly integrated consumer RF-ICs. As a result, the prime technology for most RF building blocks like low noise amplifiers (LNA), mixers and phase-locked loop (PLL) frequency synthesizers is, at present, implemented in Si BiCMOS. SiGe BiCMOS is considered one of
the most promising and competitive technologies for system-on-chip design of the telecommunication systems. It combines the transistor performances competitive to other technologies with the advantages of the low cost, process maturity, and high integration levels of the silicon technology. The reason is excellent RF performance of bipolar npn transistors combined with the low power logic of CMOS, which enables the fabrication of highly integrated transceivers, since they require both high performance transistors and high quality factor passive components. Therefore, GaAs ICs with high quality factor inductors have been mostly used for transceivers with integrated VCOs. With the advent of SiGe technologies, with high resistive substrates thick top metallizations and thick top dielectricism it is now possible to fabricate fully integrated, low phase noise VCOs at RF frequencies. [3] III. Experimental Setup In this work the design of a differential Colpitts common-base VCO for the low phase-noise is discussed. The circuit is shown in the Fig. 1.Colpitts topologies, either the common base or the common-collector is suitable for the integrated designs.[4] (a). Frequency Tuning Fig.1 Differential common base colpitts oscillator without biasing The first task in designing an LC oscillator is to the frequency of oscillation, and hence the value of the total impedance and the capacitance in the circuit. For the ideal transistorsq 1 and Q 2 the frequency of oscillation is given by 1 ω osc = LCtot Where C tot is the series combination of the C 1 and C 2. (1) (b). Capacitor Ratios The use of capacitors is necessary to transform r e (the dynamic emitter resistance) to high values. This impedance transformation is effectively stops this low impedance from reducing the Q of the oscillator s LC tank. C 2 R Tank, re = (1+ )2re (2) C1 Where R Tank,re represents the parallel resistance across the tank due to r e. Therefore, in order to get the maximum effect of the impedance transformer, it is necessary to make C 2 large and C 1
small. However if the ratio is made too large then the gain around the gain around the loop drop below one. In addition, the larger this ratio is made the more current must be driven through the transistor to achieve the given output power. This in turn leads to large noise sources in the tank, thus degrading phase noise. The gain around the loop is given by C1 G = g m R Tank ( C1+ C2) = gmrtank C1/(C1+ C2) Where R Tank is approximately equal to the parallel combination of R Tank,L and R Tank,re. Since the loop Gain given in above equation must be greater than one for oscillation to give a crude estimates for the minimum bias current required to allow oscillation to start. C 2 I c > V T (1+ ) 1/RTank (4) C1 Where V T is the thermal voltage. When C 1 gets very large this expression simplifies to [5] (c). Varactors (3) I c > V T / R Tank (5) Diodes in the technology used for this work [6] are usually realizing the base-collector junction as shown in fig.2. However when using this junction there is also a parasitic diode between collector and the substrate. Observe that the tiedown is typically connected to ground, hence the anode of the parasitic diode is normally grounded. Placing two varactors C var in the oscillator are shown in the completed oscillator circuit fig.3. Fig.2 Integrated varactor with parasitic diode. Effectively ac-grounds both sides of the parasitic diodes and removes them from the differential circuit. The varactor voltage is varied from the 1.3V to 3.3V volts to get the desired frequency range. In order to prevent the decoupling both sides of the oscillator the resistor can be used. It also protects from accidentally forward biasing the varactors, which could otherwise cause large currents to flow. (d). Emitter Degeneration. In order to increase the Q of the tank without sacrificing output power, emitter degeneration RE is added to the circuit. Degeneration will also increase the linearity of the transistor amplifiers at the cost of adding some additional noise. In this circuit 19-ohm is used. The emitter resistance value varies from 10 to 30 ohms.
(e). Buffers The output buffers are added in the circuit. The directly placing the 50-ohm load across the output will reduce the Q of the circuit. These buffers are emitter followers with high input impedance and they transform the 50-ohm load into larger impedance. They were placed at the emitter instead of the collector in order to take advantage of impedance transformation provided by the capacitors (C 1, C 2, and C var ). This buffer also makes the circuit less sensitive to load pull when driving an active load such as the input of mixer, and gives increased output power since it can drive 50-ohm without affecting signal amplitude in the oscillator core. [4] Fig 3: Final Common Base design of VCO with output buffer & Biasing shown. IV. Low Phase Noise Design Techniques. Following techniques are used to minimize the phase noise in the VCO circuit. 1.Differential inductors have been used in the VCO schematic. The differential inductors have high quality factor when used in the differential oscillator. [7] 2.The IBM BiCMOS SiGe technology has been used to reduce the substrate loss, obtain high Q and to achieve low phase noise. 3.The differential circuit topology has been used to reduce the phase noise. A differential quadrature oscillator is preferred over a single-ended one. It improves the phase noise performance by cyclostationary noise alignment while providing a fully differential output and a large loop gain for reliable start-up. It is also shown that, via optimum coupling of two crosscoupled oscillators, quadrature outputs can be obtained with an enhanced phase noise performance. [8] The output amplitude also increases and improves the phase noise. 4.The emitter degeneration resistor is used in order to increase the Q of the tank without sacrificing output power. This allows the signal levels to increase more before the transistor non-linearity causes saturation. Care must be taken that, as the addition of excessive degeneration results in less negative resistance and oscillations will not start. Thus making the resistance too large will cause low output power, and therefore high phase noise. Making Re small also leads to excessive non-linear mixing of noise around the carrier that further increase phase noise. [9]
5.Varactors will increase the tunability but increasing the tuning range will also decrease the phase noise. In practice the series loss resistance is dominated by inductor. Typical varactors have a series resistance of around half to a quarter of an ohm. Where a wide tuning range is required, over a major part of the range, the varactor reactance (capacitive) will be almost as large as the inductor reactance (inductive). Then the voltage across the varactor will approach across the inductor. Because the varactor has a relatively low maximum RF operating voltage it will be this rather than the inductor maximum working voltage, which will limit PQ 2. So the varactor equivalent series resistance should be low as low as possible. [10] 6.The off-chip passives design with MCM-D technology also improves the phase noise performance. V. Off-Chip Passive Components. One alternative of implementation of integrated systems is the use of a thin film multi-chip module technology (MCM-D) to interconnect multiple chips. With this technology a number of RF components, each implemented in the most suitable IC technology, can be assembled in a relatively simple and economical way. [11] The connection between the active circuits integrated on the IC and the passives integrated on the MCM-D substrate is made by means of a flip-chip technology. [8] Inductors, capacitors and varactors are used as off-chip passive components. VI. Results The result of the VCO tuning range vs frequency is shown in the fig.4.vco frequency range is 2.37-2.55GHz by varying the voltage from 1.3v to 3.3 volts. Fig.4 Varactor voltage Vs frequency graph
Fig.5 Phase noise of on-chip VCO. F ig.6 Phase noise of on-chip VCO with Extracted parasitic Fig.7 VCO Phase Noise of off-chip passives
Fig.8 VCO chip layout The phase noise for different varactor tuning voltages is plotted. This clearly shows that the performance is not uniform over the tuning range. The phase noise of the on-chip VCO shown in fig.5. It varies -1.45dBc/Hz at 100kHz offset frequency form tuning range of 1.3 to 3.3V. In the second on-chip VCO with extracted parasitics the phase noise is shown in the fig.6. It varies -2.21dBc/Hz at 100kHz-offset frequency. In the off-chip VCO design the phase noise is shown in fig.7. It varies -1.2dBc/Hz at 100kHz-offset frequency at the same tuning range. The VCO with constant gain and the same tuning range have an almost constant phase noise that rest between these two extremes. This also shows the effect of the varactor on the phase noise. Since the varactor is nonlinear, VCO gain varies over the tuning range. Therefore the phase noise in the oscillator can be completely determined by the low-frequency noise. At the bottom of the varactor tuning voltage where the VCO has high gain, low frequency noise dominates. At the top of the tuning range where the VCO gain is small, the Leeson s style [12] dominates and determines the phase noise of the oscillator. There are also discrepancies between simulated and calculated phase noise. It should be remembered that oscillators are themselves highly nonlinear and Leeson s formula [12] itself contains approximations including the assumption that the transistor s small-signal noise figure appropriate. It is also difficult to account for all noise sources and transistor parasitic resistance with precise accuracy. The calculated value in this circuit design is slightly better than the compared VCO result. In the designed VCO, calculated phase noise is 108.23dBc/Hz and compared with -103dBc/Hz at 100kHz-offset frequency [9]. The VCO chip layout is shown in Fig.8. The VCO with off-chip passives phase noise better when compared with on-chip VCO with extracted parasitics. By hand calculations and simulated one s can have a difference of few dbc/hz.
VII. Conclusion In this work a low phase noise VCO has been designed. SiGe bipolar technology best circuit topology has been used for VCO design. An on-chip VCO for bluetooth standard is designed as well as a VCO with off-chip varactors, inductors and capacitors is also designed. The major focus for VCO is to get low phase noise. The on-chip 2.5GHz VCO has a phase noise of 100.5dBc/Hz at 100kHz offset frequency. This circuit has comparable phase noise compared to other mentioned recent work in VCO [2]-[12]. The phase noise value can be improved by increasing Q value of tank circuit and varactors. The phase noise with extracted parasitics is 93.03dBc/Hz at 100kHz offset frequency. This is a minor reduction as compared to the on-chip VCO. The phase noise results with extracted parasitic is reduced by -7.42dBc/Hz. The off-chip VCO also has lower phase noise compared to the on-chip VCO with extracted parasitics, but the improvement is only 10.1dBc/Hz of phase noise. VIII. References [1]. Saeed Zafar who is the author of this paper Electrical Engineer, (2001). [2] Product Applications and Technology directions with SiGe BiCMOS, by J.dunn, G.freeman, D.Harame, D. wang, X.Wang. IBM, Lowell, MA [3] A fully integrated SiGe Bipolar 2.4GHz Bluetooth Votlage controlled oscillator by Bernd- Ulrich H Klepser, Jakub Kucera, Infineon Technologies, and Balanstr, Germany.0-7803-6280-2/00/ 2000 IEEE [4] L. Dauphinee, M. Copeland, and P. Schvan, A balanced 1.5-GHz voltage controlled oscillator with an integrated LC resonator, in IEEE Int. Solid-State Circuits Conf., 1997, pp. 390 391. [5].B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice Hall, 1998 [6] S. P. Voinigescu, M. C. Maliepaard, J. L. Showell, G. E. Babcock, D. Marchesan, M. Schroter, P. Schvan, and D. L. Harame, A scalable high frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design, IEEE J. Solid-State Circuits, vol. 32, pp. 1430 1439, Sept. 1997. [7] Fully Integrated Low Phase Noise VCO Design in SiGe BiCMOS Technology. Xudong Wang, Dawn, Kurt, Lowell, USA. 0-7803-7189-5/01 2001 IEEE. [8]http://www.chipcenter.com/wireless/images/appnote/app002.pdf [9] The effect of Varactor nonlinearity on the phase noise of Completely Integrated VCOs, John W M rogers, student of IEEE, Jose A Macedo, member, IEEE and calvin plett Member IEEE. 0018-9200/00 2000 IEEE
[10] The need for better Varactor diodes in low phase tunable oscillators, M. J Underhill, 1998, the institution of Electrical Engineers. IEE. [11] A single-package solution for wireless transceivers. Piet wambacq, stephane Donnay, hocine Zaid, marc Engels, Hugo De Man, Ivo Bolsens, IMEC; VSDM; Belgium. [12]. D. B. Leeson, A simple model of feedback oscillator noise spectrum, in Proc. IEEE, Feb. 1966, pp. 329 330.