KA7500B. SMPS Controller. Features. Description. Internal Block Diagram.

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SMPS Controller www.fairchildsemi.com Features Internal Regulator Provides a Stable 5V Reference Supply Trimmed to 5% Uncommitted Output TR for 200mA Sink or Source Current Output Control For Push-Pull or Single Ended Operation Variable Duty Cycle By Dead Time Control (Pin 4) Complete PWM Control Circuit On-Chip Oscillator With Master or Slave Operation Internal Circuit Prohibits Double Pulse at Either Output Description The KA7500B is used for the control circuit of the PWM switching regulator. The KA7500B consists of 5V reference voltage circuit, two error amplifiers, a flip flop, an output control circuit, a PWM comparator, a dead time comparator and an oscillator. This device can be operated in the switching frequency of 1kHz to 300kHz. 16-DIP 1 16-SOP 1 Internal Block Diagram Rev. 1.0.0 2002 Fairchild Semiconductor Corporation

Absolute Maximum Ratings Parameter Symbol Value Unit Supply Voltage VCC 42 V Collector Supply Voltage VC 42 V Output Current IO 250 ma Amplifier Input Voltage VIN VCC +0.3 V Power Dissipation (TA = 25 C) PD 1 (KA7500B) 0.9 (KA7500BD) W Operating Temperature Range TOPR 0 ~ +70 C Storage Temperature Range TSTG -65 ~ +150 C 2

Electrical Characteristics (VCC = 20V, f = 10kHz, TA = 0 C to +70 C, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit REFERENCE SECTION Reference Output Voltage VREF IREF = 1mA 4.75 5.0 5.25 V Line Regulation VREF VCC = 7V to 40V - 2.0 25 mv Temperature Coefficient of VREF VREF/ T TA = 0 C to 70 C - 0.01 0.03 %/ C Load Regulation VREF IREF = 1mA to 10mA - 1.0 15 mv Short-Circuit Output Current ISC VREF = 0V 10 35 50 ma OSCILLATOR SECTION Oscillation Frequency f CT = 0.01µF, RT = 12kΩ - 10 - khz Frequency Change with Temperature f/ T CT = 0.01µF, RT = 12kΩ - - 2 % DEAD TIME CONTROL SECTION Input Bias Current IBIAS VCC = 15V, 0V V4 5.25V - -2.0-10 µa Maximum Duty Cycle D(MAX) VCC = 15V, V4 = 0V O.C Pin = VREF 45 - - % Input Threshold Voltage VITH Zero Duty Cycle - 3.0 3.3 Max. Duty Cycle 0 - - V ERROR AMP SECTION Input Offset Voltage VIO V3 = 2.5V - 2.0 10 mv Input Offset Current IIO V3 = 2.5V - 25 250 ma Input Bias Current IBIAS V3 = 2.5V - 0.2 1.0 µa Common Mode Input Voltage VCM 7V VCC 40V -0.3 - VCC V Open-Loop Voltage Gain GVO 0.5V V3 3.5V 70 95 - db Unit-Gain Bandwidth (Note1) BW - - 650 - khz PWM COMPARATOR SECTION Input Threshold Voltage VITH Zero Duty Cycle - 4 4.5 V Input Sink Current ISINK V3=0.7V -0.3-0.7 - mv OUTPUT SECTION Output Saturation Voltage VCE(SAT) VE = 0, IC = 200mA - 1.1 1.3 Common Emitter V Common Collector VCC(SAT) VC = 15V, IE = -200mA - 1.5 2.5 Collector Off-State Current IC(OFF) VCC = 40V, VCE = 40V - 2 100 Emitter Off-State Current IE(OFF) VCC = VC = 40V, VE = 0 - - -100 µa TOTAL DEVICE Supply Current ICC Pin 6 = VREF, VCC = 15V - 6 10 ma OUTPUT SWITCHING CHARACTERISTICS Rise Time tr - - - - - Common Emitter - - - 100 200 Common Collector - - - 100 200 ns Fall Time tf - - - - - Common Emitter - - - 25 100 Common Collector - - - 40 100 ns Note: 1. This parameter, although guaranteed, is not 100% tested in production. 3

Typical Application Pulse Width Modulated Step-down Converter VI=10V to 40V KSA1010 1mH,2A Vo=5V Io=1A 47Ω 12 Vcc 11 C2 8 C1 150Ω 0.1uF 3 COMP INPUT 1MΩ - 2 5.1kΩ 50uF 10V VREF 14 KA7500B - 15 + 1 5.1kΩ 5.1kΩ D.T 4 GND 7 E1 9 E2 10 O.C 13 RT CT 6 5 +16 150Ω + 50uF 50V 47kΩ + 0.001uF + 50uF 10V GND 0.1 4

Mechanical Dimensions Package 16-DIP 6.40 ±0.20 0.252 ±0.008 0.81 ( ) 0.032 #1 #16 19.80 0.780 MAX 19.40 ±0.20 0.764 ±0.008 0.46 ±0.10 0.018 ±0.004 1.50 ±0.10 0.059 ±0.004 #8 #9 2.54 0.100 7.62 0.300 3.25 ±0.20 0.128 ±0.008 0.38 0.014 MIN 5.08 0.200 MAX 3.30 ±0.30 0.130 ±0.012 0~15 0.25 +0.10 0.05 0.010 +0.004 0.002 5

Mechanical Dimensions (Continued) Package 16-SOP MIN 0.05 0.002 1.55 ±0.10 0.061 ±0.004 #1 #16 10.30 0.405 MAX 9.90 ±0.20 0.39 ±0.008 0.406 +0.10-0.05 +0.004 0.016-0.002 0.51 ( ) 0.020 #8 #9 1.27 0.050 6.00 ±0.30 0.236 ±0.012 1.80 0.071 MAX +0.10-0.05 0.20 +0.004 0.008-0.002 3.95 ±0.20 0.156 ±0.008 MAX0.10 MAX0.004 0.70 ±0.20 0.0275 ±0.008 5.72 0.225 0~8 6

Ordering Information Product Number Package Operating Temperature KA7500B 16-DIP 0 ~ +70 C KA7500BD 16-SOP 7

DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 9/10/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation