Chapter 2. Operational Amplifiers Tong In Oh 1
2.5 Integrators and Differentiators Utilized resistors in the op-amp feedback and feed-in path Ideally independent of frequency Use of capacitors together with resistors in the feedback and feed-in paths of op-amp circuits Inverting closed-loop configuration with impedances Z 1 (s), Z 2 (s) V o(s) V i (s) = Z 2(s) Z 1 (s) s jω Figure 2.22 The inverting configuration with general impedances in the feedback and the feed-in paths. 2
2.5.2 The Inverting Integrator i 1 t = v I t R Charge to accumulate on C = 0 t i1 t dt Capacitor voltage: 1 t i1 t dt, initial voltage on C(t=0): V C 0 C v C t = V C + 1 t i1 t dt C 0 v O t = 1 t vi t dt V RC 0 C RC : integrator time constant Proportional to the time integral of the input with V C being the initial condition of integration Figure 2.24 (a) The Miller or inverting integrator. (b) Frequency response of the integrator. 3
Inverting Integrator (Miller Integrator) Z 1 s = R, Z 2 s = s jω, V o(jω) V i (jω) = 1 jωcr 1 sc, V o(s) V i (s) = 1 scr V o = 1, φ = +90, -20 db/decade V i ωcr ω int = 1 : integrator frequency CR Low-pass filter with a corner frequency of zero ω = 0, Magnitude of the integrator transfer function = infinite = open loop Tiny dc component produce an infinite output Figure 2.24 (a) The Miller or inverting integrator. (b) Frequency response of the integrator. 4
Alleviate by connecting a resistor R F across the integrator capacitor C Gain @ DC of R F R (dc feedback path) V o(s) = R F R V i (s) 1+sCR F Lower R F, higher the corner frequency ( 1 CR F ) Become more nonideal integrator Trade-off between dc performance and signal performance Ex 2.5 Figure 2.25 The Miller integrator with a large resistance R F connected in parallel with C in order to provide negative feedback and hence finite gain at dc. 5
2.5.3 Op-Amp Differentiator Current through C: i t = v O t = CR dv I(t) dt Z 1 s = C(dv I dt) 1 sc, Z 2 s = R, V o(s) V i (s) = scr s jω, V o(jω) V i (jω) = jωcr V o V i = ωcr, φ = 90, +20 db/decade CR : differentiator time constant STC highpass filter with a corner frequency at infinity Noise magnifier Stability problem: small valued resistor in series with the capacitor 6 Figure 2.27 (a) A differentiator. (b) Frequency response of a differentiator with a time-constant CR.
2.6 DC Imperfections Assume the op amp to be ideal except of op amp with a finite gain A on the closed-loop gain of the inverting and noninverting configuration Familiar with the characteristics of practical op amps Effects of such characteristics on the performance of op amp circuits Op amp: direct-coupled devices with large gains at dc Input offset voltage (V OS ): opposite polarity of external source which balances out the input offset of the op amp As a result of the unavoidable mismatches V OS depends on temperature Noninfinite CMRR Noninfinite input resistance Nonzero output resistance 7 Figure 2.28 Circuit model for an op amp with input offset voltage V OS.
Effect of the op-amp V OS on their performance V O = V OS 1 + R 2 R 1 Provide two additional terminals to trim to zero the output dc voltage due to V OS Introduce an imbalance Remain the problem of variation of V OS with temperature Figure 2.29 Evaluating the output dc offset voltage due to V OS in a closed-loop amplifier. 8 Figure 2.30 The output dc offset voltage of an op amp can be trimmed to zero by connecting a potentiometer to the two offset-nulling terminals. The wiper of the potentiometer is connected to the negative supply of the op amp.
Capacitive Coupling V OS 1 + R 2 R 1 without the coupling capacitor dc output voltage with coupling capacitor, V O = V OS STC high-pass circuit with a corner frequency of ω 0 = 1 CR 1 Gain from a magnitude of (1 + R 2 R 1 ) at high frequency and 3 db down at ω 0 Figure 2.31 (a) A capacitively coupled inverting amplifier. (b) The equivalent circuit for determining its dc output offset voltage V O. 9
2.6.2 Input Bias and Offset Currents Two input terminals have to be supplied with dc currents (I B1, I B2 ) Independent of the fact that a real op amp has finite input resistance Input bias current, I B = I B1+I B2 2 Input offset current, I OS = I B1 I B2 V O = I B1 R 2 I B R 2 Upper limit on the value of R 2 Figure 2.32 The op-amp input bias currents represented by two current sources I B1 and I B2. 10 Figure 2.33 Analysis of the closed-loop amplifier, taking into account the input bias currents.
Introducing R 3 in series with the noninverting input lead V O = I B2 R 3 + R 2 I B1 I B2 R 3 R 1 Consider I B1 = I B2 = I B, V O = I B2 R 2 R 3 1 + R 2 R 1 V O = 0, when R 3 = R 2 = R 1R 2 1+ R 2 R 1 R 1 +R 2 Evaluate the effect of a finite offset current I OS I B1 = I B + I OS /2, I B2 = I B I OS /2 V O = I OS R 2 Minimize the effect of input bias current Place in the positive lead a resistance equal to the equivalent dc resistance seen by the inverting terminal Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R 3. 11
AC-coupled, select R 3 = R 2 AC-coupled amplifiers Provide a continuous dc path between each of the input terminals of the op amp and ground Figure 2.35 In an ac-coupled amplifier the dc resistance seen by the inverting terminal is R 2 ; hence R 3 is chosen equal to R 2. Figure 2.36 Illustrating the need for a continuous dc path for each of the op-amp input terminals. Specifically, note that the amplifier will not work without resistor R 3. 12
2.6.3 V OS and I OS in Inverting Integrator Small dc voltages or currents increases linearly with time until saturate When V C = 0, v O = V OS + V OS CR t By adding a resistance R in the op amp positive-input lead I B, I OS flow through C and cause v O to ramp linearly until saturate Resistor R F across the C, provide a dc path: v O = V OS (1 + R F R) + I OS R F Figure 2.37 Determining the effect of the op-amp input offset voltage V OS on the Miller integrator circuit. Note that since the output rises with time, the op amp eventually saturates. 13 Figure 2.38 Effect of the op-amp input bias and offset currents on the performance of the Miller integrator circuit.
2.7.1 Frequency Dependence of A Open-loop gain A: finite and decrease with frequency (Fig 2.39) Gain @dc: high, fall off of -20dB/decade (frequency compensation) A 0 A jω = A 0ω b 1+ jω ω b jω A 0 : dc gain, ω b : 3dB frequency Unity gain(0db) @ω t = A 0 ω b A jω ω t jω Unity-gain bandwidth: f t = ω t /2π Easily determine the magnitude of the op-amp gain at a give frequency f t : much smaller deviation Single-pole model with -20dB/decade rolloff due to a dominant single pole 14