Experiment # 2 Characteristics of TTL Gates

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Experiment # 2 Characteristics of TTL Gates 1. Synopsis: In this lab we will use TTL Inverter chip 74LS04 and TTL Schmitt trigger NAND gate chip 74LS13 to observe the transfer characteristics of TTL gates and the phenomenon of hysteresis. The objective of the lab is to understand important concepts like transition levels, voltage transfer characteristics and hysteresis. 2. Terminology: 2.1 Transition Level: The voltage value at which the transition from one logic value (let s say logic 0 ) to another logic value (say, 1 ) takes place is called a transition level. From practical point of view these voltage values are very important. Various voltage parameter of importance are listed in the Appendix I of this lab handout. 2.2 Noise: Electrical signals deteriorate as they travel through the wires. This deterioration can be caused by random noise. Electrical noise, also called electromagnetic interference, or EMI, is defined as unwanted electrical signals that produce undesirable effects and otherwise disrupt the circuits 1. 2.3 Transfer Characteristic: The transfer characteristic of a logic family is the plot of the output voltage of a typical inverter of that family when its input changes from minimum (0V) to maximum (+5V), and back. The various threshold parameters of interest are listed in the Appendix I. 2.4 Hysteresis: The difference between the two thresholds, V T+ and V T-, is called the hysteresis. This phenomenon is seen in Schmitt-trigger devices. A Schmitt-trigger gate has a special internal circuit that uses feedback to shift the switching threshold depending on whether the input is changing from LOW to HIGH or from HIGH to LOW. 2 The Schmitt-trigger inverter provides about 0.8V of hysteresis. 1. Niagara Mohawk s notes on Power Quality. (www.niagaramohawk.com) 2. John F. Wakerly, Digital Design, Principles and Practices, Prentice Hall, 2000 3. Motorola Data Sheet for SN54/74LS13 and SN54/74LS14 ee201l_ttlgates.fm [Revised: 11/27/05] 1/9

3. Prelab: Note: To answer questions 3.3 and 3.4, please read introductory sections on Logic Families in your text book (i.e., section 3.2 and 3.14, on pages 85 and 175 respectively, in John F. Walkerly s Digital Design: Principles & Practices, 3rd edition) Q 3. 1: In the Procedure section, you are told to create a 1KHz square wave. Suppose the horizontal scale on the oscilloscope was set to 200 µsec/div. Knowing that there are 10 divisions on the oscilloscope screen, how many periods of the square wave will you see? Please show how you arrive at the answer. (5 points) Q 3. 2: If we want to generate a 1V to 4V sine wave, what Peak-to-Peak amplitude and what DC offset should be used? (5 points) Amplitude: DC Offset: Q 3. 3: A logic family represents the technology used to make digital devices (gates). TTL and CMOS are two of the most common logic families. Complete the table below by writing the expanded names of the three most popular logic families. (3 points) Name of the Logic Family Abbreviation TTL CMOS ECL Q 3. 4: Q 3. 5: Modern Microprocessors use (CMOS/TTL) logic family. Although (CMOS/ECL/TTL) devices are fastest, however they have not been very popular because they consume much more power than the other logic families. (2pts) For Schmitt-trigger gates V T+ is (higher/lower) than V T-.(5 points) ee201l_ttlgates.fm [Revised: 11/27/05] 2/9

4. Procedure: 4.1 Connect the power and ground to the 74LS04 chip. Refer to the pin-out given in the Appendix for connections. Use the constant power supplies available at the workstation to provide power and ground. 4.2 Connect the variable power supply to the input of one of the six inverters of the 74LS04. Connect the output to a multimeter. Change the input voltage starting at 0V and going up to 5V in steps of 0.4V up to 0.8V, then in steps of 0.1V up to 1.4V and then in steps of 0.4V up to 5V. Observe the output voltage for each value of the input and tabulate the results in the table provided in the report section. Draw a graph of the output versus input voltage (This is a voltage transfer characteristic graph). Mark the all the significant points (listed in the Appendix I) on the graph. 4.3 Setup the function generator for 1KHz square wave going from 0V to 5V. Configure the oscilloscope to view this waveform by connecting it to the channel 1. Now, apply this waveform to the input of the inverter. Display both the input (on channel 1) and output (on channel 2) on the oscilloscope. Draw the waveforms in your lab report. 4.4 Repeat step 4.3 with 0 to 5V triangular wave input and record the results. 4.5 Repeat step 4.3 with 0.5V to 2.5V triangular wave input. 4.6 Display the transfer characteristics (output vs. input) on the oscilloscope using xy-display mode. Feed a 1 KHz, 0 to 5V triangular wave as input to the inverter and also connect the same to Channel 1 (x-axis) of the oscilloscope. The output of the inverter shall be connected to Channel 2 (y-axis) of the oscilloscope. Place the input coupling switches of both the channels in GND position and using the vertical position adjustment of the CH2 and the horizontal adjustment for channel 1, adjust the dot (which is the 0,0 point of the XY-graph) to a convenient point on the screen. Then return the input coupling switches to the DC position. Now, you should see the XY-graph on the screen. Record it in the report together with relevant information such as (0,0) point, horizontal scale and vertical scale. (Report Q 5. 3:) 4.7 Next, we will repeat the above steps (4.1 to 4.6) for a Schmitt-trigger NAND gate 74LS13. We should be able to observe the phenomenon of hysteresis through this experiment. Connect the variable power supply to one of the four input pins of a Schmitt-trigger NAND gate in 74LS13. The remaining three inputs should be connected to (+5V/GND). Connect the output to a multimeter. Repeat step 4.2 above by gradually increasing the input voltage from 0V to 5V and recording the output. Now, start from 5V and decrease the input voltage gradually and record the output again. Record your observations in the table in section 5.4 and mark all the significant points on the graph. 4.8 Repeat steps 4.3, 4.4 and 4.5 with 74LS13. 4.9 Repeat step 4.6 using a 1 KHz, 0 to 5V triangular wave as input. ee201l_ttlgates.fm [Revised: 11/27/05] 3/9

5. Lab Report: Name: Lab Session: Date: TA s Signature: For TAs: Prelab (out of 20): Hardware (out of 10): Report (out of 70): Comments: Q 5. 1: Voltage Transfer Characteristic of 74LS04 Inverter (procedure step 4.2) (10 points): Input(V) Input(V) Input(V) 0 1.2 3.0 0.4 1.3 3.4 0.8 1.4 3.8 0.9 1.8 4.2 1.0 2.2 4.6 1.1 2.6 5.0 Using the data from the table above, draw the voltage transfer characteristic of the inverter. Discuss the results by comparing them with the transfer characteristic of an ideal inverter (Figure 1a in Appendix I). ee201l_ttlgates.fm [Revised: 11/27/05] 4/9

Q 5. 2: Record the results from Procedure steps 4.3, 4.4 and 4.5 in the grids below (15 points): 0-5V 1KHz Square Wave 0-5V 1KHz Triangular Wave 0.5-2.5V 2KHz Triangular wave Discuss the waveforms above by explaining the significant points and what interesting characteristics you observed from these waveforms. Q 5. 3: Record the results from Procedure steps 4.6 (5 pts): ee201l_ttlgates.fm [Revised: 11/27/05] 5/9

Q 5. 4: Voltage Transfer Characteristic of 74LS13 Schmitt-trigger Inverter (procedure step 4.7) (10 pts): Input(V) increasing decreasing Input(V) increasing decreasing Input(V) increasing decreasing 0 1.2 3.0 0.4 1.3 3.4 0.8 1.4 3.8 0.9 1.8 4.2 1.0 2.2 4.6 1.1 2.6 5.0 Using the data from the table above, draw the voltage transfer characteristic of the Schmitt-trigger inverter. Discuss the results by comparing them with the transfer characteristic of an ideal Schmitt-trigger inverter (Figure 1b in Appendix I). Q 5. 5: Record the results from Procedure steps 4.8 in the grids below. (15 pts): ee201l_ttlgates.fm [Revised: 11/27/05] 6/9

Discuss the waveforms above by explaining the significant points and what interesting characteristics can we observe from these waveforms. Q 5. 6: Record the results from Procedure steps 4.9 (5 pts): Q 5. 7: Is it possible to have a Schmitt-trigger gate that has V T+ LOWER than the V T-? Why? (10 points) ee201l_ttlgates.fm [Revised: 11/27/05] 7/9

Appendix I: Voltage Parameters & Transfer Characteristics Abbreviation Parameter Description V T Threshold voltage Input voltage value at which the output state changes from ON to OFF, or visa versa. V T+ Positive threshold voltage Threshold voltage; when the inputs goes from 0 to +5V. V T- Negative threshold voltage Threshold voltage; when the inputs goes from +5 to 0V. V IL Voltage Input Low Maximum input voltage that will be considered as LOW V IH Voltage Input High Minimum input voltage that will be considered as HIGH V OL Voltage Output Low Maximum output voltage that can be considered LOW V OH Voltage Output High Minimum output voltage that can be considered HIGH Table 1: Voltage Parameter and their explanation Typical Voltage Transfer Characteristics (a) Typical Inverter (b) Schmitt-trigger Inverter Figure1: Ideal Voltage Transfer Characteristics for (a) typical inverter and (b) Schmittrigger inverter (Reproduced from Digital Design: Principles & Practices, John F. Wakerly, Prentice Hall, 3rd edition, pages 100 and 124, respectively) ee201l_ttlgates.fm [Revised: 11/27/05] 8/9

Appendix II: Pin Configurations Logic Symbol Pin Configuration A Y 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 74LS04 VCC 6A 6Y 5A 5Y 4A 4Y Logic Symbol Pin Configuration A B C D Y 1A 1B 1C 1D 1Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 74LS13 VCC 2A 2B 2C 2D 2Y From the Motorola Data Sheet ee201l_ttlgates.fm [Revised: 11/27/05] 9/9