Low-power Sigma-Delta AD Converters

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Transcription:

Low-power Sigma-Delta AD Converters Willy Sansen KULeuven, ESAT-MICAS Leuven, Belgium willy.sansen@esat.kuleuven.be Willy Sansen 10-05 211

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Ref. Norsworthy, Delta-Sigma Converters, Wiley 1996 Ref. Op t Eynde, Peluso, Geerts, Marquez, Geerts, Yao, Kluwer/Springer Willy Sansen 10-05 212

Sigma-Delta ADC Sigma-Delta ADC exchanges resolution with speed by means of : Oversampling Noise shaping Willy Sansen 10-05 213

Quantization noise (4 bit) Number bits Quant. noise Quantization noise Step = V ref 2 B B = 8 bits SNR = 50 db B = 4 B =16 bits SNR = 98 db SNR 2 + 6B Willy Sansen 10-05 214

Sigma-Delta modulator Signal transfer function: Noise transfer function: H H x e ( z) ( z) H ( z) = 1 + H ( z) 1 = 1 + H ( z) Willy Sansen 10-05 215

Noise filtering x + - Σ k 2 y v H k 1 LPF k 2 e - + y v = H (x - k 2 y) y = k 1 v + e Noise shaping } k 1 H 1 1 1 y = x + e x + e 1 + k 1 k 2 H 1 + k 1 k 2 H k 1 k 2 H k 2 Willy Sansen 10-05 216

Feedback loop with low-pass filter H 1 1 y x + e k 1 k 2 H k 2 y f m f x k 2 SNR e k 1 k 2 H Noise shaping f m f Willy Sansen 10-05 217

Higher-order Sigma-delta converters Willy Sansen 10-05 218

Mash Sigma-delta topologies (2-1-1) Willy Sansen 10-05 219

SNR vs OSR for single-bit Σ SNR (db) Stability Power 10 20 30 Oversampling ratio OSR 100 Willy Sansen 10-05 2110

Multibit versus Single-bit Cascaded 2-1-1 Single loop 4th Cascaded 2-1 Multibit (4 bit) Ref. Marquez CAS Sept 98, 1232-1241 Willy Sansen 10-05 2111

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Willy Sansen 10-05 2112

Low Voltage SC: problem Φ 1 Switch: V in V out Φ 1 C 1 nmos: V in < pmos: V in > V DD -V GSn V DD -0.8 V V GSp 0.8 V Limit : V DD -V GSn = V GSp V DDmin > 1.6 V Willy Sansen 10-05 2113

Low Voltage switch : g DS versus input voltage g DS 5 V g DS 1 V nmos pmos nmos? pmos V Tp 0 V DD -V Tn V DD 0 V DD -V Tn V Tp V DD Willy Sansen 10-05 2114

Low Voltage switch : ON- resistance Ω 4.0 k 3.0 k V DD = 5 V 2.0 k 60 k 40 k 20 k 0 k 0 1.0 2.0 3.0 4.0 5.0 VIN 0 0.5 1.0 VIN 1.5 2.0 V DD = 1.8 V Willy Sansen 10-05 2115

Low Voltage SC: solutions Low V T techology special technology : cost switch-off leakage On-Chip voltage multipliers poor power efficiency applicability in submicron technologies? Switched Opamp Ref.Crols, ESSCIRC 93, JSSC Aug.94 Willy Sansen 10-05 2116

Smaller V DD require smaller V T Smaller V T is not possible because 1. Leakage : wi curve crosses axis! Minimum value : 0.3 V 2. Temperature variations : + 0.2 V log i DS leakage 3. Mismatch : + 0.1 V 0 V T V GS >>> V T cannot be smaller than 0.3 0.4 V Willy Sansen 10-05 2117

On-chip voltage multipliers Dickson,.., JSSC June 76, pp.374-378 Willy Sansen 10-05 2118

Voltage multipliers : power efficiency P loss R eq I 2 out P VDD I out V DD η 1 - R eq I out V DD 50 % R eq n fc 1 tan (2f R on,sw C) Willy Sansen 10-05 2119

Drawbacks of voltage multipliers High voltage technology: In deep submicron : V DD < 1.8 V in 0.18 µm CMOS Oxide cannot take more!! 800 V/µm or 0.8 V/nm Requires high-speed clock drivers Injection in substrate : coupling to Analog Low power-efficiency Willy Sansen 10-05 2120

Voltage multiplier for rail-to-rail opamp Vddx - Vdd 1 V 60 µa 10 MHz ripple I out 2C o f c 1 g m5 r o5 5 mv Duisters,.., JSSC July 98,pp.947-955 Willy Sansen 10-05 2121

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Principle : Switched-opamp filter Improved switching 0.9 V - 40 µw 12 bit CMOS SO Σ Other low-power Delta-sigma converters Willy Sansen 10-05 2122

Conventional SC Integrator C v IN Φ1 ac Φ2 - V DD v OUT Φ2 Φ1 + V REF A v = a Willy Sansen 10-05 2123

Switched Opamp Critical input switch is replaced by a switched opamp φ2 φ2 φ1 φ2 φ1 φ2 φ1 φ2 V ref V ref V ref V ref V ref V ref Crols,.., JSSC Aug.94, 936-942 Willy Sansen 10-05 2124

Switched-opamp schematic Vdd M10 M8 M7 M5 φ Ibias Vin- M1 M2 Vin+ Cc Vout M6 Vss M3 M4 M9 φ Crols,.., JSSC Aug.94, 936-942 Willy Sansen 10-05 2125

Switched-Opamp response 400mV 300 200 100 0 s 0.5u s 1.0u s 1.5u s 2.0u s 2.5u s Time 3.0u s s Willy Sansen 10-05 2126

Switched-opamp low-pass biquad One extra opamp per biquad V DD > V GS + V signal 1.2 V + 0.3 V = 1.5 V (0.6 V ptp ) Standard 2.4 µm CMOS (V Tn V Tp 0.9 V) Crols,.., JSSC Aug.94, 936-942 Willy Sansen 10-05 2127

Measured transfer characteristic BW = 1.5 khz Willy Sansen 10-05 2128

THD versus input signal swing -60 db for < 0.6 V ptp Input noise 140 µv RMS : DR > 70 db Crols,.., JSSC Aug.94, 936-942 Willy Sansen 10-05 2129

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Principle : Switched opamp filter Improved switching 0.9 V - 40 µw 12 bit CMOS SO Σ Other low-power Delta-sigma converters Willy Sansen 10-05 2130

1 Volt OTA 1 V (min: V T +2V DSsat ) Fully differential : 75 db 30 MHz 1 pf 80 µa < 100 ns 4 Switches 2n : Only 2nd stage switched off! Baschirotto,.. JSSC Dec.97,pp.1979-1986 Willy Sansen 10-05 2131

SO SC integrator CDC for level shift : CDC= CIN V O,DC = V DD /2 Baschirotto,.. JSSC Dec.97, pp.1979-1986 Willy Sansen 10-05 2132

SO SC integrator : Φ1 closed CDC for level shift : CDC= CIN V O,DC = V DD /2 Q TOT = V DD C IN Baschirotto,.. JSSC Dec.97,pp.1979-1986 Willy Sansen 10-05 2133

SO SC integrator : Φ2 closed CDC for level shift : CDC= CIN V O,DC = V DD /2 Q TOT = V DD C DC + V O C IN if C DC = C IN V DD /2 = V O Baschirotto,.. JSSC Dec.97,pp.1979-1986 Willy Sansen 10-05 2134

CMFB with level shifting C M = C P = 0.1 pf C CM = 0.1 pf C CMFB = 2 pf C FF = 0.1 pf provides zero V OUT,DC = V DD /2 Willy Sansen 10-05 2135

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Principle : Switched opamp filter Improved switching 0.9 V - 40 µw 12 bit CMOS SO Σ Other low-power Delta-sigma converters Willy Sansen 10-05 2136

Differential SO integrator C S Sampling C INT Integrat. C L Load C CM Level shift C CMS,eq CMFB V REF,hI = V DD V REF,lo = 0 Peluso,..., JSSC, Dec.98, 1887-1896 Peluso etal Design of low-voltage low-power CMOS Delta-Sigma ADC s, Kluwer 1999 Willy Sansen 10-05 2137

Σ topology with half-delay integrators - 3rd order single-loop implementation - coefficients a 1 = 0.2 ; a 2 = 0.5 ; a 3 = 0.5-1/2 phase delays in feedback path Willy Sansen 10-05 2138

Class AB differential Voltage amplifier 1 V V T = 0.6 V M3 V in2 M4 V GS -V T = 0.2 V V GS = 0.8 V V DSsat = 0.2 V V in1 M1 M2 V in2 i out M2 is source follower V GS1 = V in1 -V in2 I B1 I B2 i out ~ (V in1 -V in2 ) 2 >>> Class AB Peluso,..., JSSC, Dec.98,pp.1887-1896 Willy Sansen 10-05 2139

Differential class AB OTA Willy Sansen 10-05 2140

Class AB characteristic Larger input W/L Larger current source W/L Willy Sansen 10-05 2141

CMFB and level-shift out2 out1 Willy Sansen 10-05 2142

Low voltage comparator (level shift omitted) Two switches Input at V SS Willy Sansen 10-05 2143

The input integrator V REF,hi = V DD V REF,lo = 0 Willy Sansen 10-05 2144

Spectrum for maximum input signal (470 mv ptp ) BW 16 khz Clock freq. 1.5 MHz Peak SNR 76 db Peak SNDR 62 db Peluso,..., JSSC Dec.98,pp.1887-1896 Willy Sansen 10-05 2145

SNDR versus input signal level Peak SNR = 76 db DR = 77 db SNDR = 62 db Willy Sansen 10-05 2146

SO 12 bit 0.9 V 40 µw CMOS Σ INT1 INT2 INT3 COMP 0.5 µm CMOS V Tn = 0.62 V V Tp = 0.55 V V DD = 0.9 V 40 µw Peluso,... JSSC Dec.98, pp.1887-1896 Willy Sansen 10-05 2147

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Unity-gain-reset Optimized input switching Switched input resistor Full feedforward Willy Sansen 10-05 2148

Reset-opamp integrator / 2 / 2 V out = 0 1 V V out,av 0.5 V V in 0 V previous stage V dd /2 0.5 V On Φ 1 : Q 1 = C 1 V in Q 2 V out = 0 On Φ 2 : Q 1 = 0 Q 2 + C 1 V in V out Level shift needed to avoid forward biased junctions! Keskin,.., JSSC July 02, 817-824 Willy Sansen 10-05 2149

Pseudo-differential opamp 170 MHz 100 V/µs 3.5 pf 1 V 200 µa 0.35 µm CMOS V Tn 0.52 V V Tp 0.45 V Ref.Keskin, JSSC July 2002, 817-824 Willy Sansen 10-05 2150

1-Volt 2nd-order 13 -bit Σ modulator Willy Sansen 10-05 2151

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Unity-gain-reset Optimized input switching Switched input resistor Full feedforward Willy Sansen 10-05 2152

Σ Modulator on 1 Volt in 90 nm CMOS x + 0.2 0.3 0.4 z 1 z 1 z 1 + + + - + - + - y Single-loop third-order single-bit topology Simple and robust Tolerance to building block non-idealities Coefficients selected not sensitive to capacitance mismatches Yao,..., JSSC Nov.04, 1809-1818 Yao. etal. Low-Power Low-Voltage Σ modulators in Nanometer CMOS, Springer 06 Willy Sansen 10-05 2153

Gain enhancement 2I 1 inp M1 inn outn outn K*I 1 1:B M2 M3 A = (1 k )( V GS 2 0 V T ) 1 λ 3 = A 1 k Willy Sansen 10-05 2154

Stability I 1 I 2 The non-dominate pole must be > 3GBW for sufficient phase margin K*I 1 M1 M2 inn 1:B Cc M3 CL P P nd GBW = nd = gm2 2π C c = B gm 2π C 1 L > 3GBW k 2(1 k) I1 2π C ( V V = c L GS 2B I 2π C ( V C < 1 3B C c L 1 GS T ) 2 V T ) 1 Willy Sansen 10-05 2155

Full OTA circuit VDDA Bp CMFB 1:2 outp inp inn outn 1:K 0.8 0.2 1 : 10 50 db 57 MHz 6 pf 80 µa (1 V) VSSA Yao,..., JSSC Nov.04, 1809-1818 Willy Sansen 10-05 2156

Full modulator circuits refp refn refp refn cmo cmi refp refn cmo cmi cmi Lp Ln cmi Ln Lp c2 c1 Ln Lp c2 c1 Ci1p Ci2p Ci3p d d c1 inp c1 d c2 d c1 Cs1p c2 + _ c1 d c1 d Cs2p Cs2p c2 + _ c1 d c1 d Cs3p Cs3p c2 + _ c2 + _ Lp OTA1 cmo OTA2 cmo OTA3 QTZ inn c1 d c2 d Cs1n c1 cmi c2 _ + c1 d c1 d Cs2n Cs2n c2 _ + c1 d c1 d Cs3n Cs3n c2 _ + c2 _ + Ln Ln refp Lp refn Ci1n Lp Ln c2 c1 Ci2n Lp Ln c2 c1 Ci3n d d refp refn cmo cmi refp refn cmo cmi cmi Willy Sansen 10-05 2157

Measurement Output spectrum Output spectrum of a 5 khz input signal Willy Sansen 10-05 2158

Measured SNR and SNDR vs input amplitude Yao,..., JSSC Nov.04, 1809-1818 Willy Sansen 10-05 2159

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Unity-gain-reset Optimized input switching Switched input resistor Full feedforward Willy Sansen 10-05 2160

Switched-resistor integrator Input switch replaced by resistor R Larger resistor for better linearity Smaller resistor for higher speed Ahn,.. ISSCC 05, 166-167 Willy Sansen 10-05 2161

Input sampling : maintain constant V INCM C Ls added Baschirotto, JSSC Dec.1997, 1979-1986 R & C S doubled Ahn,.. ISSCC 05, 166-167 Willy Sansen 10-05 2162

Mash 2-2 Σ Audio ADC Low-distortion : - switched resistor - loop filter processes only quantization error OSR = 64 25 khz 3 MHz clock SNDR = 78 db 0.35 µm CMOS 0.6 V 1 mw Ahn,.. ISSCC 05, 166-167 Silva, Electronic Letters, June 01, 737-738 Willy Sansen 10-05 2163

4-th order Σ converter with switched-resistors Mash 2-2 OSR = 64 0.35 µm CMOS Two-stage opamp with folded cascode 0.6 V 1 mw 24 khz BW Willy Sansen 10-05 2164

Measured SNDR Low-distortion : Vref = 0.6 V SNR SNDR = 78 db at 1 khz Willy Sansen 10-05 2165

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Unity-gain-reset Optimized input switching Switched input resistor Full feedforward Willy Sansen 10-05 2166

Full Feedforward Topology Convent. Sigma-Delta topology Full feedforward topology H H x e ( z) ( z) ai 1 = 1 + ai 1 1 = 1 + ai 1 H H x e ( z) = 1 ( z) = 1 + 1 aci 1 1 Silva, Electronic Letters, June 01, 737-738 Willy Sansen 10-05 2167

4th-Order single-bit 1 Ms/s Σ modulator 1 1 1 2 0.2 0.4 0.1 0.1 Single feedback loop : processes quantization noise only Full feedforward : unity-gain transfer 4th order - single bit Optimization coefficients or equal swing Yao,.., VLSI Circuits 05 Yao. etal. Low-Power Low- Voltage Σ modulators in Nanometer CMOS, Springer 06 Willy Sansen 10-05 2168

Performance comparison 4th-order conventional topology Behavioral simulation with: a 1 =-0.1, a 2 =-0.1, A 0 =40 db 4th-order full feedforward topology Behavioral simulation with: a 1 =-0.1, a 2 =-0.1, A 0 =40 db Willy Sansen 10-05 2169

Output swing of integrators Output swings of each integrator in the conventional topology Output swings of each integrator in the full-feedforward topology Willy Sansen 10-05 2170

Single-stage OTA for fast settling (0.13 µm) Yao,.., VLSI Circ.05 Yao. etal. Low-Power Low-Voltage Σ modulators in Nanometer CMOS, Springer 06 Willy Sansen 10-05 2171

Circuit Realization OSR = 64 Clock of 64 MHz 1 V 6.1 ma + 1.3 ma Yao,.., VLSI Circuits, 05 Yao. etal. Low-Power Low-Voltage Σ modulators in Nanometer CMOS, Springer 06 Willy Sansen 10-05 2172

Measured output spectrum Willy Sansen 10-05 2173

Measured SNR versus Input voltage Willy Sansen 10-05 2174

Comparison of Low-power Σ converters Ref. Type V DD DR BW P FOM V db khz µw x 10-6 Ahn 05 SwR 0.6 78 24 1000 20 Sauerbrey 02 SO,LV 0.7 75 8 80 53 Peluso 98 SO 0.9 77 16 40 330 Dessouky 01 LV 1 88 25 950 275 Keskin 02 ResetOp. 1 74 20 5600 6 Yao 04 LV 1 88 20 140 1490 Rabii 96 SC, VM 1.8 92 25 5400 121 Yin 94 211 5 97 750 180k 346 Geerts 00 211 5 92 1100 200k 144 Vleugels 01 221 2.5 95 2000 150k 700 Gaggl 04 4 1.5 88 300 8k 400 Yao 05 4 1 88 500 7.4k 706 Doerrer 05 Track 1.5 74 2000 3k 280 Hezar 05 5 1.3 86 600 5.4k 737 FOM = 4kT DR BW / P Willy Sansen 10-05 2175

Low-voltage low-vt comparison Sauerbrey Ahn Sauerbrey,.., JSSC Dec.02 1662-1669 Willy Sansen 10-05 2176

Table of contents Delta-sigma modulation The switch problem The switched-opamp solution Other low-power Delta-sigma converters Willy Sansen 10-05 2177