A technique for noise measurement optimization with spectrum analyzers

Similar documents
ISSUE: April Fig. 1. Simplified block diagram of power supply voltage loop.

Experiment 7: Frequency Modulation and Phase Locked Loops Fall 2009

state the transfer function of the op-amp show that, in the ideal op-amp, the two inputs will be equal if the output is to be finite

Noise. Interference Noise

Amplifiers. Department of Computer Science and Engineering

Potentiostat stability mystery explained

Prof. Paolo Colantonio a.a

High Speed Voltage Feedback Op Amps

ECEN 5014, Spring 2013 Special Topics: Active Microwave Circuits and MMICs Zoya Popovic, University of Colorado, Boulder

A Novel Off-chip Capacitor-less CMOS LDO with Fast Transient Response

EXPERIMENT 7 NEGATIVE FEEDBACK and APPLICATIONS

Control of Light and Fan with Whistle and Clap Sounds

SAW STABILIZED MICROWAVE GENERATOR ELABORATION

OSCILLATORS. Introduction

6.976 High Speed Communication Circuits and Systems Lecture 16 Noise in Integer-N Frequency Synthesizers

New Technique Accurately Measures Low-Frequency Distortion To <-130 dbc Levels by Xavier Ramus, Applications Engineer, Texas Instruments Incorporated

EUP A, 30V, 340KHz Synchronous Step-Down Converter DESCRIPTION FEATURES APPLICATIONS. Typical Application Circuit

A Detailed Lesson on Operational Amplifiers - Negative Feedback

EUP3484A. 3A, 30V, 340KHz Synchronous Step-Down Converter DESCRIPTION FEATURES APPLICATIONS. Typical Application Circuit

Estimation and Compensation of IQ-Imbalances in Direct Down Converters

PLANNING AND DESIGN OF FRONT-END FILTERS

ENGR-4300 Spring 2008 Test 4. Name SOLUTION. Section 1(MR 8:00) 2(TF 2:00) 3(MR 6:00) (circle one) Question I (24 points) Question II (16 points)

RC AUTONOMOUS CIRCUITS WITH CHAOTIC BEHAVIOUR

Philadelphia University Faculty of Engineering Communication and Electronics Engineering. Amplifier Circuits-III

Complex RF Mixers, Zero-IF Architecture, and Advanced Algorithms: The Black Magic in Next-Generation SDR Transceivers

A MATLAB Model of Hybrid Active Filter Based on SVPWM Technique

Frequency-Foldback Technique Optimizes PFC Efficiency Over The Full Load Range

Finding Loop Gain in Circuits with Embedded Loops

ECE5984 Orthogonal Frequency Division Multiplexing and Related Technologies Fall Mohamed Essam Khedr. Channel Estimation

Lock-In Amplifiers SR510 and SR530 Analog lock-in amplifiers

A simple charge sensitive preamplifier for experiments with a small number of detector channels

Bode Plot based Auto-Tuning Enhanced Solution for High Performance Servo Drives

Thinking Outside the Band: Absorptive Filtering Matthew A. Morgan

An Ultrawideband CMOS Low-Noise Amplifier with Dual-Loop Negative Feedback

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder

A Physical Sine-to-Square Converter Noise Model

Analog to Digital in a Few Simple. Steps. A Guide to Designing with SAR ADCs. Senior Applications Engineer Texas Instruments Inc

APPLICATION NOTE #1. Phase NoiseTheory and Measurement 1 INTRODUCTION

Preprint. This is the submitted version of a paper published in Electronic environment.

Global Design Analysis for Highly Repeatable Solid-state Klystron Modulators

Philadelphia University Faculty of Engineering Communication and Electronics Engineering. Amplifier Circuits-IV

Predicting the performance of a photodetector

ELEC3106 Electronics. Lecture notes: non-linearity and noise. Objective. Non-linearity. Non-linearity measures

Very low noise AC/DC power supply systems for large detector arrays

Estimating the Resolution of Nanopositioning Systems from Frequency Domain Data

Chapter 25: Transmitters and Receivers

Custom Design of an Analogue Input Digital Output Interface Card for Small Size PLCs

Further developments on gear transmission monitoring

SMALL-SIGNAL ANALYSIS AND CONTROL DESIGN OF ISOLATED POWER SUPPLIES WITH OPTOCOUPLER FEEDBACK

APPLICATION NOTE. Making Accurate Voltage Noise and Current Noise Measurements on Operational Amplifiers Down to 0.1Hz. Abstract

Low Cost, General Purpose High Speed JFET Amplifier AD825

Analog ó Digital Conversion Sampled Data Acquisition Systems Discrete Sampling and Nyquist Digital to Analog Conversion Analog to Digital Conversion

Gert Veale / Christo Nel Grintek Ewation

Measuring the Speed of Light

The Application of Active Filters Supported by Pulse Width Modulated Inverters in the Harmonic Simulation of the High Power Electric Traction

ATA8401. UHF ASK/FSK Industrial Transmitter DATASHEET. Features. Applications

T5753C. UHF ASK/FSK Transmitter DATASHEET. Features

More Stability and Robustness with the Multi-loop Control Solution for Dynamic Voltage Restorer (DVR)

Homework Assignment 06

AP3598A 21 PVCC 15 VCC 9 FS HGATE1 BOOT1 PHASE1 23 LGATE1 16 PGOOD R LG1 3 EN 4 PSI 5 VID 8 VREF HGATE2 18 BOOT2 19 PHASE2 7 REFIN LGATE2 6 REFADJ

All Digital Phase-Locked Loops, its Advantages and Performance Limitations

High Speed Communication Circuits and Systems Lecture 10 Mixers

Current Feedback Loop Gain Analysis and Performance Enhancement

Consumers are looking to wireless

Study Guide for the First Exam

AN-1106 APPLICATION NOTE

Mini Project 3 Multi-Transistor Amplifiers. ELEC 301 University of British Columbia

Series Compensated Line Protection Issues

Software Defined Radio Forum Contribution

Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820

ADVANCED ANALOG CIRCUIT DESIGN TECHNIQUES

Analysis and Mitigation of Harmonic Currents and Instability due to Clustered Distributed Generation on the Low Voltage Network

SENSITIVITY IMPROVEMENT IN PHASE NOISE MEASUREMENT

Traditional Analog Modulation Techniques

ECE 5655/4655 Laboratory Problems

A DVS System Based on the Trade-off Between Energy Savings and Execution Time

Devices selection for the construction of a microwave transmission link at 2.45 GHz

ADAPTIVE LINE DIFFERENTIAL PROTECTION ENHANCED BY PHASE ANGLE INFORMATION

Power Optimization in Stratix IV FPGAs

A Low 1/f Noise CMOS Low-Dropout Regulator with Current-Mode Feedback Buffer Amplifier

Unit WorkBook 4 Level 4 ENG U19 Electrical and Electronic Principles LO4 Digital & Analogue Electronics 2018 Unicourse Ltd. All Rights Reserved.

Author Query Form. Page 1 of 1. Many thanks for your assistance. Journal:

Analysis and Design of Low-Phase-Noise Ring Oscillators

High Speed Communication Circuits and Systems Lecture 15 VCO Examples Mixers

Instrumentation for Gate Current Noise Measurements on sub-100 nm MOS Transistors

Study Guide for the First Exam

AN-742 APPLICATION NOTE One Technology Way P.O. Box 9106 Norwood, MA Tel: 781/ Fax: 781/

55:041 Electronic Circuits The University of Iowa Fall Exam 3. Question 1 Unless stated otherwise, each question below is 1 point.

Sinusoidal signal. Arbitrary signal. Periodic rectangular pulse. Sampling function. Sampled sinusoidal signal. Sampled arbitrary signal

i L1 I in Leave the 10µF cap across the input terminals Figure 1. DC-DC SEPIC Converter

AN-1106 Custom Instrumentation Amplifier Design Author: Craig Cary Date: January 16, 2017

With the proposed technique, those two problems will be overcome. reduction is to eliminate the specific harmonics, which are the lowest orders.

Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820

Frequency Hopped Spread Spectrum

Considerations on the ICARUS read-out and on data compression

Analog Frequency Synthesizers: A Short Tutorial. IEEE Distinguished Lecture SSCS, Dallas Chapter

AUDIO OSCILLATOR DISTORTION

Designing an Audio Amplifier Using a Class B Push-Pull Output Stage

Preliminary simulation study of the front-end electronics for the central detector PMTs

1. Motivation. 2. Periodic non-gaussian noise

Transcription:

Preprint typeset in JINST style - HYPER VERSION A technique or noise measurement optimization with spectrum analyzers P. Carniti a,b, L. Cassina a,b, C. Gotti a,b, M. Maino a,b and G. Pessina a,b a INFN - Istituto Nazionale di Fisica Nucleare, sezione di Milano-Bicocca, Piazza della Scienza 3, Milano, 2026-I, Italy b Università di Milano-Bicocca, Dipartimento di Fisica, Piazza della Scienza 3, Milano, 2026-I, Italy E-mail: paolo.carniti@mib.inn.it ABSTRACT: Measuring low noise o electronic devices with a spectrum analyzer requires particular care as the instrument could add signiicant contributions. A Low Noise Ampliier, LNA, is thereore necessary to be connected between the source to be measured and the instrument, to mitigate its eect at the LNA input. In the present work we suggest a technique or the implementation o the LNA that allows to optimize both low requency noise and white noise, obtaining outstanding perormance in a very broad requency range. KEYWORDS: Instrument optimization; Instrumental noise; Analogue electronic circuits. Corresponding author.

Contents. Introduction 2. Low noise measurements with spectrum analyzers 3. Low Noise Ampliier optimization or precise noise measurements 5 3. Noise measurement coniguration 6 3.2 Transer Function measurement 4. Conclusions 2. Introduction Measuring the noise spectrum o an electronic device is quite a common task or an electronic designer. Spectrum analyzers are used or this purpose but, as it happens very oten, the low level o the noise loor rom the instrument is not small enough and an unwanted contribution could be added to the measurement result. To mitigate this contribution, a Low Noise Ampliier, LNA, is put between the source to be measured and the instrument. The LNA becomes an important part o the measurement setup [, 2], as it must show a noise comparable or, better, smaller than the noise o the source to be characterized, and adequate gain and bandwidth. It is very diicult to meet all the speciications at the same time and a compromise is usually considered: a large bandwidth LNA with both good white noise and Low Frequency Noise, LFN, is hard to obtain. In the ollowing work some suggestions are given trying to meet all the requirements, obtaining a LNA as general purpose as possible. 2. Low noise measurements with spectrum analyzers Noise measurement o an electronic device, DUT or Device Under Test, ollows the simpliied scheme o Figure with a direct connection to the instrument, the Spectrum Analyzer,. In this case the noise rom the adds square summed) to the noise o the DUT and it must be at least 5 times smaller or contributing to less than 5%. DUT noise, n DUT, is reerred to its input or any other node o interest. A test signal that spans the requency range o interest is connected and the transer unction is measured by the. Then the test signal is removed and the noise is measured by the. The ratio between the noise and the transer unction gives the input noise: n 2 DUT measured = n 2 DUT + n 2 T DUT ) 2 2.)

n DUT DUT n Figure. Minimal setup or noise characterization o a DUT. is or Spectrum Analyser, n DUT is the DUT noise while n is the noise rom the. 0 3 n Measured noise Noise Fit 0 2 nv/ Hz 0 0 0 req Hz) Figure 2. Input noise spectrum o the used or this work, Agilent AG4395A. where n DUT measured is the actual measured noise at the input, expressed in nv / Hz rom now on, which is also contributed by the, divided by the DUT transer unction T DUT ). For simplicity T DUT ) will be considered equal to one in the ollowing. Figure 2 shows the noise o the used in this work, an Agilent AG4395A in 00 MHz requency range 0 Hz is the minimum settable requency). The measurement was taken connecting its input to ground with 50 Ω to match the instrument input impedance. Lines with non-optimal termination degrade the high requency perormance, unless the DUT is connected very close to the input terminal o the instrument. The measurement o Figure 2 shows a noise o a ew hundred nv / Hz at 0 Hz and more than 0 nv / Hz white noise. This noise level, very small or such an instrument, is not adequate or characterizing DUTs with a noise loor o a ew nv / Hz. In Figure 2 the noise spectrum is superimposed by its it, expressed by a unction which was ound rather general [3, 4]: n 2 a b = ) e + + a + b + c α + d 2.2) where is the requency, a, b, c, d, e, α, a and b being the itting parameters. Parameters e and α are introduced in order to take into account non-standard phenomena such as some residual 2

n DUT DUT n LNA LNA n Figure 3. Measurement setup o Figure, but with a Low Noise Ampliier, LNA, added between the DUT and the to mitigate the noise contribution o the. 0 2 LNA input reerred noise LNA noise it nv/ Hz 0 0 0 req Hz) Figure 4. Input reerred noise o the OPA657, when employed as the LNA o the setup o Figure 3. Noise is now reduced to about 30 nv / Hz at 0 Hz and 5 nv / Hz white. microphonism or low requency induced disturbances which can cause slight deviations o their values rom the usual ones o 2 and, respectively. To mitigate the noise contribution o the a Low Noise Ampliier, LNA, is put between the DUT and the, Figure 3. Now the DUT noise has to be compared with the LNA input noise n LNA, and the noise is contributing to n LNA attenuated by the LNA gain. Figure 4 shows the noise spectrum obtained when an OPA657, a large bandwidth Operational Ampliier, OA, is used. LFN is reduced to slightly above 30 nv / Hz and white noise is less than 5 nv / Hz. The OPA657 has a JFET input with a negligible parallel noise, omitted in Figure 3. Noise o Figure 4 is typical o a large bandwidth OA: adequately small white noise loor, but slightly large LFN that, or the case in Figure 4, is contributed also by larger gains are not recommended or OPA657 as its bandwidth suers when large value eedback resistors are used). The noise spectrum in Figure 4 was obtained dividing the spectrum, measured with the, by the measured and itted LNA transer unction, TF. The itting curve is the ollowing: TF = B + j 2 + 2 jχ 3 3 3 + 2 jχ 4 4 4 2.3) 3

0 2 Measured TF Fitted TF Gain V/V) 0 0 0 req Hz) Figure 5. Transer unction, TF, to the LNA input o the circuit o Figure 3. LNA n DUT DUT n LNA / n + n n i LNA LNA n Figure 6. Parallel combination o OAs or obtaining a low LNA series noise. Parallel noise o LNAs is increased and its eect depends on the output impedance o the DUT. where B is the gain which includes a actor 2 due to the coaxial line termination at both ends at the input), 2, 3 and 4 are requencies and χ 3 and χ 4 consider the complex part o the high requency poles. We consider 2 pairs o complex poles or redundancy: a good itting algorithm is able to decide whether it is necessary to mask the contribution o any pole. Figure 5 shows the measured TF and its it. The result o Figure 4 could be mathematically improved i the noise is square) subtracted rom the LNA output beore the division by the LNA TF is done. This technique can be applied without adding artiacts only i the contribution is adequately small. In this standard approach, LNAs with bipolar input transistors allow to obtain even smaller white noise, but parallel noise is larger and could contribute i the output impedance rom the DUT is not negligible. Current eedback ampliiers, CFAs, have very large bandwidth but cannot be conigured with a too large gain because this implies to use large eedback resistors, to which the bandwidth is inversely proportional. Another typical approach is shown in Figure 6 and consists o paralleling several similar LNAs. In this way the resulting series noise is reduced by a actor proportional to the square root o the number o LNAs used. For the circuit having the noise o Figure 4, 9 LNAs are needed to obtain a noise smaller than 0 nv / Hz at 0 Hz. Particular care could be needed when using this approach since the parallel noise o the combined LNAs increases 4

n DUT DUT n LNA LNA n i LNA Figure 7. Measurement setup o Figure 3 without neglecting the parallel noise source. by the same actor that scales the series noise and this can add noise i the DUT output impedance is not small enough. Further conigurations, not based on OAs, exists but they will not be considered here. The general case which takes also into account high output impedance DUTs can be easily derived rom the previous case, by analyzing the circuit shown in Figure 7. The parallel noise i LNA ) contribution to the input voltage is proportional to the DUT output resistance R o_dut. The R o_dut value at which the parallel noise starts to be dominant is R o_dut > n LNA i LNA. Typical values or series noise o commercial low noise operational ampliiers is o the order o a ew nv / Hz while parallel noise depends on the type o the input transistors. Low noise FET-input operational ampliiers have an input parallel noise o a ew A/ Hz, while in BJT-input operational ampliiers and CFAs it is a ew pa/ Hz. These numbers roughly give an estimation o which type o operational ampliier could be used with a speciic DUT in order to keep the parallel noise contribution negligible: FET-input opamps or output impedance DUTs up to a ew hundred kω while CFAs or BJT-input opamps or output impedance DUTs up to a ew hundred Ω. It is worth to mention that when noise is characterized on a broad requency range, the impedances that come into play along the signal path never exceed a ew hundred Ω or not degrading bandwidth due to the presence o parasitic capacitances. In the ollowing section a very simple approach will be shown, which allows to obtain low noise on the ull requency span, whatever the adopted LNA topology and technology may be. 3. Low Noise Ampliier optimization or precise noise measurements Our suggested approach to the LNA implementation is very simple and based on the ollowing consideration. The noise characterization consists in 2 steps: a) measurement o the noise at the output o the ampliying chain and b) measurement o the transer unction o the chain, to scale the noise at the DUT. The shape o the transer unction is thereore not important as long as it is known step b) above). Thereore, dierently rom the standard use o a lat gain across the whole requency range, we suggests or the LNA requency response an optimization with respect to the noise regions, choosing a proper ampliier in each one. LFN can be maintained small with a proper OA choice, which, normally, has a small bandwidth. Combining this OA with a large bandwidth OA, having small white noise, would allow to cover the whole requency span. The irst OA, optimized or LFN, will be given a large gain in order to minimize contributions rom both the and the second OA in this low requency region. In the next two subsections details and results are given. 5

+ OA or_lfn R A - n DUT DUT + R B C B + R C - OA or_lwn R D Figure 8. New suggested optimized coniguration or noise measurements. 0 3 Measured TF Fitted TF Gain V/V) 0 2 0 0 0 req Hz) Figure 9. Measured and itted TF o the circuit o Figure 8. 3. Noise measurement coniguration The schematic diagram o the suggested optimized coniguration is shown in Figure 8. Two OAs, OA or_lfn and OA or_lwn LWN is or Low White Noise), in non-inverting coniguration, read the same input node, the DUT, and have the outputs summed at the. The summing node is simply an additional OA in inverting coniguration. OA or_lfn is a LFN OA, an OPA40 in this implementation. Its gain is set by R B /R A + ) to 20 V /V R A = 00 Ω, R B = 20 kω), OA or_lwn is the OPA657 with R D /R C + ) set to 40 V /V R C = 00 Ω, RD = 3.9 kω). OA or_lfn has a bandwidth o a ew MHz with a dominant pole roll-o), while OA or_lwn has a bandwidth in the GHz range. Both OAs have JFETs as input transistors. As it can be seen in Figure 9, now the TF is not lat, but shows a dierent gain dependent on the requency region and the itting curve o equation 2.3 becomes: 6

OA or_lfn OA or_lwn Figure 0. Time domain response o the circuit o Figure 8. The ast transient is due to OA or_lwn, while the slower transient is due to OA or_lfn. The ratio o their amplitudes is related to the chosen gains. TF = A + j + B + j 2 + 2 jχ 3 3 3 + 2 jχ 4 4 4 3.) Compared to equation 2.3 now there is an additional term that accounts or the added stage. The TF has two requency regions, one at < where gain is TFl = A + B and one at higher requency where gain is TF h = B. At low requencies the measured DUT noise is: n 2 DUT measured l = n 2 DUT + A2 A + B n2 OA + B2 or_lfn A + B n2 OA + or_lwn A + B n2 3.2) Since the gain at low requency is much higher than the one at high requency A + B B), the terms depending on n OA or_lwn and n can be neglected and the LFN at the input is dominated only by the OA or_lfn noise. At high requency the irst term o TF is negligible and B becomes the dominant gain. The measured noise can be expressed with the ollowing equation: n 2 DUT measured h = n 2 DUT + n 2 OA + or_lwn B 2 n2 3.3) The time response o the circuit to a step is shown in Figure 0. Its noise spectrum is in Figure. Now at 0 Hz the measured noise is close to the white noise, a noticeable improvement with respect to that obtained with the standard approaches Figures 2 and 4). Going back to the coniguration o Figure 8, it is worth to remark the meaning o capacitor C B 820 pf). This capacitor is added to cut the bandwidth o OA or_lfn at 0 khz, the requency region needed or canceling the LFN contribution rom and OA or_lwn. I C B was missing, OA or_lfn would also contribute with its white noise and the resulting noise spectrum would be the 7

nv/ Hz 7 Measured noise 6.5 Fitted noise 6 5.5 5 4.5 4 3.5 3 req Hz) Figure. Measured and itted input noise or the new circuit o Figure 8. 8 7 Measured Noise Noise FIT 6 nv/ Hz 5 4 3 req Hz) Figure 2. Noise spectrum o the circuit in Figure 8, but without capacitance C B. The increase o white noise at about MHz is due to OA or_lfn, OPA40. one shown in Figure 2, with an increase in the white noise value around MHz. The responsibility or this increase is due to the OPA40 OA or_lfn) a rail-to-rail, r-t-r, output OA. We have noticed that several o this class o OAs suer rom this eect that starts when the closed loop output impedance increases. This is due to the noise o the output buer, a complex circuit or a r-t-r OA, which increases its noise contribution as soon as the requency bandwidth o the OA internal gain stage rolls o. This noise behavior is oten not addressed in the data-sheets, but there is a 8

n DUT DUT i CFA+ RA + - OA CFA R B C A i CFA C C R C Figure 3. Modiied version o the circuit diagram o Figure 8 when a CFA ampliier is used. 0 2 Measured Noise Noise FIT nv/ Hz 0 0 0 req Hz) Figure 4. Noise o the circuit o Figure 3 when C C and R C are missing. way to veriy it looking at the two plots, normally included in the data-sheets, that show the series noise and the output impedance versus requency in closed loop condition: the upper requency o the span or the ormer coincides with the requency at which the output resistance starts to increase. We, thereore, exploited the good LFN characteristic o the OPA40 and canceled its high requency contribution with C B. A simpler solution or the suggested circuit o Figure 8 can be implemented i the parallel noise has no eect on the output impedance o the DUT. In this case it is possible to take advantage o a particular characteristic o CFAs. This class o devices shows a requency bandwidth almost independent on the closed loop gain as long as the eedback resistance has a proper value and the resistance connected between the inverting input and ground is large enough. I these constraints are not met, the bandwidth lowers. Reerring to the circuit o Figure 3, the standard coniguration is obtained i C C and R C are missing. The settable gain or good perormance must be smaller than about 50 V /V or the AD800 adopted in this implementation, a quite general case indeed, and the resulting noise spectrum is shown in Figure 4. As it can be seen the noise at low requency is also contributed by the one rom the, resulting in about 20 nv / Hz at 0 Hz. 9

0 3 Measured TF Fit o the TF Gain V/V) 0 2 0 0 0 req Hz) Figure 5. TF o the circuit o Figure 3 or a large value o resistor R B and small high requency gain. In this implementation large values or resistors R A and R B are used R A = 0 Ω, R B = 3.6 kω) in order to obtain a gain o about 400 V /V at low requencies. Capacitor C C 3.3 nf) and resistor R C 470 Ω) are set in order to lower the gain at a value o less than 50 V /V ater a ew tens o khz, using the optimum suggested value or R C. The expression o the voltage gain o the circuit o Figure 3 is ω = 2π ): Gain = + R B R A jωc A R A + jωc A R A + jωc C R B + R C ) + R C R B R A jωc A R A jωc C R B + R C ) + jωc A R A + jωc C R B + R C ) 3.4) Assuming R B >> R A,R C, this equation can be separated in two dierent requency domains, one is given by the irst term which is dominant below the requency o the pole given by C C and R B + R C while the other one becomes the dominant contribution above the requency o the same pole. The irst term gives a gain o R B R A while the second one gives a gain o R C R A. This means that this simpler coniguration shown in Figure 3 is topologically equivalent to the one in Figure 8. Equation 3.4, with the addition o the loop gain roll-o at high requency, can thus be rewritten in a orm similar to equation 3.: TF = A 2 j 0 + j 0 + j + B 2 + j + 2 jχ 3 2 3 3 + 2 jχ 4 4 4 3.5) The above TF diers rom the one in equation 3. by the presence o the zero and the pole at 0 that accounts or the AC coupling which is added with C A 2000 µf 00 nf 0 nf) to maintain small the output oset due to the OA CFA input current and oset. The resulting it o the actual TF is shown in Figure 5, while the noise spectrum or this latter coniguration is shown in 0

5 Measured Noise 4.5 Noise Fit 4 3.5 nv/ Hz 3 2.5 2.5 req Hz) Figure 6. Noise o circuit o Figure 3 with the TF in Figure 5. Figure 6, again a very remarkable result in the 00 MHz range: noise at 0 Hz is 5 times lower than in a standard approach. As previously remarked this simpler solution can be implemented only i the output impedance o the DUT is suiciently low, so that the higher parallel noise o the CFA can be neglected. This condition is satisied i the output impedance R o_dut is lower than the ratio between series noise and parallel noise at the inverting input. Parallel noise at the non-inverting input should not contribute signiicantly given than R A is chosen low enough 0 Ω). In our solution this condition is satisied i R o_dut < n AD800 i AD800 000 Ω. = 2 nv / Hz 2 pa/ Hz numbers taken rom AD800 datasheet) or R o_dut < 3.2 Transer Function measurement The signal to be injected to measure the TF must ollow a path as similar as possible to the noise path. In Figure 7 a possible solution to address this is suggested. The switch SW can be implemented with a relay manageable by the instrument itsel by means o one o its digital ports the AG4395A has a ew o them and this is a quite common eature or many s). I this is the case, it must be guaranteed that disturbances at high requency are not injected during the noise measurement by the switched-o signal source through the series parasitic capacitance o the switch. In Figure 7 this is avoided thanks to the connection to ground o resistor R S. A large additional noise suppression actor is given by the attenuation R S2 R S, which is set to Ω 5 Ω. Finally, resistor R S3 is needed or increasing the small value o resistor R S2 at the LNA input. This setup does not need the test source to be removed during noise measurement. Alternatively, this signal coniguration network can be connected to the other input o the LNA and can be, obviously, used with both the optimized LNAs o Figure 8 and Figure 3. Finally, Figure 7 is conigured or an application in which the node or noise characterization is the one at the

DUT R DUT R s3 R A + - OA CFA R B V s SW R s R s2 C C R C Figure 7. TF measurement coniguration. output o the DUT, like, or instance, when the DUT is a voltage reerence or a supply voltage. I the node where the noise is measured is at the DUT input, the coniguration is similar and even simpler since resistor R S3 is unnecessary. 4. Conclusions Two circuit conigurations or a Low Noise Ampliier implementation in noise measurements with spectrum analyzers are suggested. The very simple yet powerul approach used in these conigurations is based on the use o dierent ampliiers, each one specialized or obtaining its best noise perormance in a restricted requency region. Outputs rom these ampliiers are then summed thus obtaining both a wide requency response and outstanding noise perormance. With the method described in this work it was possible to design two Low Noise Ampliiers with an almost lat white) noise over a requency span rom a ew Hz up to 00 MHz. Reerences [] C.D. Motchenbacher, J.A. Connelly, Low-noise electronic system design, J. Wiley, 993, chapter 5. [2] G. Vasilescu, Electronic noise and interering signals, Springer-Verlag Berlin Heidelberg, 2005, chapter 4. [3] A. Van Der Ziel, Fluctuation phenomena in semiconductors, London Butterworths Scientiic Publications, 959, chapters 4 and 5. [4] A. Van Der Ziel, Noise in solid state devices and circuits, John Wiley & Sons, 986, chapters 7 and 8. 2