Gate-Driver with Full Protection for SiC-MOSFET Modules

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Gate-Driver with Full Protection for SiC-MOSFET Modules Karsten Fink, Andreas Volke, Power Integrations GmbH, Germany Winson Wei, Power Integrations, China Eugen Wiesner, Eckhard Thal, Mitsubishi Electric Europe B. V., Germany Abstract This paper is presenting an advanced method of full protection by the gate driver unit for a SiC-MOSFET module using its sense terminals. The presented test results are including features like an adjustable overcurrent and short-circuit detection together with a Soft Shut Down function and Active Clamping, which is reducing the occurring over-voltage spikes at turn-off actively. 1. The SiC-MOSFET Module Today the need for highly efficient power energy conversion facilitates the introduction of full SiC-MOSFET modules, which consist of parallel-connected SiC-MOSFET and -diode chips. In [1, 2, 3, 4] a full 12V/8A SiC-MOSFET module FMF8DX-24A by Mitsubishi Electric is presented, which is designed for high power applications in the range of several 1 kw. With this power module designers should be able to realize applications with high switching frequencies up to 1 khz, high efficiency or high density, respectively. Compared to Si-IGBTs today s SiC-MOSFETs offer a limited short-circuit endurance of only a few microseconds. Therefore the FMF8DX-24A offers the feature of a Sense Output, which provides information on the actual drain current and can be used for an adjustable detection of overcurrent or short-circuit events. Due to this function high overcurrents or short-circuits can be turned-off safely by reducing the dissipated switching energy considerably as shown in the following. The MOSFET part of the FMF8DX-24A consists of eight paralleled 1A-chips, which are able to withstand a maximum short-circuit time of t SC = 2 µs as per datasheet. For a gate driver design it might be difficult to turn-off a short-circuit safely within this limited time without being too sensitive triggering falsely a short-circuit shut-down during normal switching operation. With this motivation an advanced method for overcurrent and short-circuit detection was derived. The FMF8DX-24A offers a separate source area which acts like a current-mirror to the main source terminal and provides a sense current ense, which is proportional to the drain-current i D. The equivalent circuit is given in Figure 1. The characteristics of the sense output can be taken from [4]. This sense current can be transformed via a shunt resistor R S to a voltage signal, which is ready to be be evaluated back into the information of the actual current value. This can be used to realize an overcurrent or short circuit protection. The gate of the FMF8DX-24A can be controlled with +15V/-1V, which are commonly used voltage levels to control IGBTs.

D id G isense Sense vsense S RS Fig. 1: Sense Output 2. Gate Driver for FMF8DX-24A The proposed driver circuit as depicted in Fig. 2(b) provides - besides the well known condition of the Gate-Source voltages, an Active Clamping circuit and dv /dt-feedback as described in [5, 6] - a circuitry for evaluating the sense output between the connectors Sense and S of the SiC-module (Fig. 1). By this the driver is able to measure the actual value of the drain current and thus shut-down overcurrents. The overcurrent limit is programmable by selecting the appropriate values of the sense resistor RS. Thus a combination of power module and driver is obtained, which virtually can t be damaged by electrical parameters such as overcurrent and over-voltage. OFF OFF vds vgs1 vgs1 is1 is is2 Pulses (Fiber) vpwm SO Feedback(Fiber) Control Driver (a) ESB Fig. 2: SiC-Module with attached Driver (b) Assembly of Driver board on module

The equivalent circuit of the FMF8DX-24A and the relevant parameters for testing the bottom switch of this setup are shown in Fig. 2(a). The block Control converts the PWM voltage signals into optical signals for the fiber-optic interface of the driver. On the other hand the status feedback fiber-optic signal is converted into the electrical signal SO. The main function of the block Driver is explained with Fig. 3. Here the Over-Voltage Detection is realized with a chain of TVS diodes that feeds into the gate and additionally gives a feedback to the ACL-pin of the gate driver core 2SC435 in case of drain-source-voltages higher than a static value of approximately 9V during the turn-off transient. The dynamic peak value of the resulting drain-source voltage during turn-off is always a bit higher due to the response time of the TVS chain. A chain of capacitors in series connection are provided for a dv/dt-feedback from Drain to Gate. For the following measurements it is not used but can be helpful to reduce the maximum drain-source-voltage slope for instance in case of the over-voltage detection is not responding fast enough. As a dv/dt-feedback implies additional losses it should only be implemented if needed. +15 V ACL Over-Voltage Detection dv dt -Feedback GH R G,ON GL D Secondary Side of Driver Core 2SC435 R G,OFF T1 G Sense -1 V VCE Latch + Vref v Sense R S S Overcurrent Detection Fig. 3: Equivalent Circuit of the Gate Drive for the Bottom Channel of a PI Driver Core The proposed overcurrent-protection is measuring the voltage across the shunt resistor R S and compares it with a constant reference value. If the actual value is higher than the reference, the MOSFET T 1 between Gate and Source of the FMF8DX-24A is turned-on over a large gate resistor value, which keeps the level of the turn-on resistance of the MOSFET relatively high. Thus a soft discharge or Soft Shut Down (SSD) of the SiC-Gate is realized. By this the draincurrent slope is reduced and thus the over-voltage peak during turning-off over- or short-circuit currents. In order to avoid an turn-on/turn-off oscillation of the transistor T 1 the output signal of the comparator is additionally latched. The constantly existing noise in power electronic circuits is filtered by a low-pass at the shunt resistor R S. With this circuitry an adjustable over-current protection is realized. 3. Measurements 3.1. Test Setup In order to prove the switching behavior of the gate-drive unit in combination with the FMF8DX- 24A the bottom MOSFET is double-pulse tested in a well known buck-converter topology as shown in Fig. 4(b). Turning constantly off the top switch of the half-bridge, provided

DC+ C DC C Snubber LLoad Fiber Interface Driver D G S Rs by the FMF8DX-24A, the built-in diode gives the freewheeling path for the load inductor L Load 3 µh. For an optimized stray inductance value of the commutation loop additional snubber capacitors are mounted between DC+ and DC- as close as possible to the SiC-module. The measurement signals depicted in Fig. 2(a) are measured with differential probes and cur- DC- (a) Photo (b) Equivalent Circuit Fig. 4: Setup for measurement of switching transients rent transducers, respectively. For the half-bridge configuration of the FMF8DX-24A gives no access to the drain current i D the source currents = 1 + 2 are measured instead. Fig. 4(a) shows a photograph of the setup with attached measurement equipment. 3.2. Switching without SSD The normal switching behavior of the FMF8DX-24A with the proposed gate driver is shown in Fig. 5, where Fig. 5(a) shows the turn-on transient at V DC =8V, I D =12A with a turn-on resistor value of R G,ON = 2.5Ω. Here the very fast reverse-recovery behavior of the SiC-Diode is obvious. The turn-off transient at V DC =8V, I D =185A in Fig. 5(b) shows the functionality of the incorporated Active-Clamping circuitry, which works properly even for SiC-MOSFETs. The drain-source voltage is limited to approximately 1V. In the time interval t =.7 µs....8 µs the driver keeps the SiC-gate within the active region thus it is reducing the drain-current slope. If a lower limitation of the drain-source voltage is needed the on-board provided dv/dt-feedback can be activated taking into account that it will lead to higher turn-off and turn-on switching losses. 3.3. Soft Shut Down (SSD) Activating the SSD functionality makes it possible to reduce the maximum switchable current for the FMF8DX-24A. In Fig. 6 the behavior during turn-off and turn-on at V DC = 8V with R S = 33Ω is documented. In order to check the current-limit value for each value of the shunt resistor R S the load current is increased step by step. In Fig. 6(a) the reference trigger (t = µs) is provided by the PWM-input signal and kept constant for better comparison. The blue lines are showing the normal switching behavior without SSD. If the current is slightly increased the driver starts detecting the programmed overcurrent of approximately 14A and initiates the SSD. Thus the green lines compared to the original blue ones are shifted to the left. Here the

14 2 12 1 15 8 6 1 4 2 5.6.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4.2.2.4.6.8 1 1.2 1.4 8 12 1 6 4 2 8 6 4 2.6.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4.2.2.4.6.8 1 1.2 1.4 15 15 1 1 5 5 5 5 1 1 15.6.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 15.2.2.4.6.8 1 1.2 1.4 (a) Turn-On at V DC = 8V (b) Turn-Off at V DC = 8V Fig. 5: Waveforms of switching transients without SSD gate voltage starts to show a soft turn-off behavior that is obvious in the reduced slope between the +15V-level to the Miller-Plateau. An even higher current that is detected by the sense circuit leads to the behavior shown with the red lines. Here the driver itself turns-off the current 1.5 µs before the original turn-off signal at t = µs. The SSD-MOSFET is discharging the gate very slowly. The Active-Clamping functionality is needed to keep the over-voltage withing the desired limit of 1V. Active Clamping can however be omitted if the SSD MOSFET behavior is slowed down. In Fig. 6(b) the driver turns on normally but close to the programmed limit. The blue line shows the normal behavior without SSD whereas the green line shows that the driver interrupts the turn-on command by itself because of the reached overcurrent limit at approximately 2.5 µs. This indicates that the SSD functionality works independently from the driver logic state and is permanently at guard protecting the SiC MOSFET in an overload situation. The overcurrent detection can be programmed by selecting the shunt resistor R S. Fig. 7(a) shows the waveforms and the resulting maximum current as a function of the value of R S. For the waveforms the point in time t = µs is again the trigger point of the PWM input signal. Evaluating the maximum of the drain current waveforms leads to the graph of I S,max = f (R S ) at 25 C. In comparison to [4] here the response time of the SSD-circuit is incorporated. For resistor values higher than 56Ω the signal-noise ratio of the detection circuit becomes very small. Thus the SiC-module might not be switchable anymore as every noise is detected as overcurrent.

15 14 12 1 5 1 8 6 4 2 1.5 1.5.5 1 1.5.5 1 1.5 2 2.5 3 3.5 4 4.5 12 1 8 6 4 2 w/o SSD start of SSD w/ SSD 1 8 6 4 2 1.5 1.5.5 1 1.5.5 1 1.5 2 2.5 3 3.5 4 4.5 2 1 1 1 1.5 1.5.5 1 1.5 1.5 1 1.5 2 2.5 3 3.5 4 4.5 (a) Stepwise SSD before Turn-Off (b) Turn-On with and without following SSD Fig. 6: Waveforms of switching transients with SSD at V DC = 8V with R S = 33Ω 2 15 1 5 12 1 22R 27R 33R 39R 47R 56R 1.8.6.4.2.2.4.6.8 1 8 6 4 2 1.8.6.4.2.2.4.6.8 1 18 6 5 4 3 2 1 1 8 6 4 2.5 1 1.5 2 2.5 3 3.5 4 4.5 5.5 1 1.5 2 2.5 3 3.5 4 4.5 5 15 1 5 5 1.5 1 1.5 2 2.5 3 3.5 4 4.5 5 I S,max 16 14 12 1 8 2 25 3 35 4 45 5 55 6 R S / Ω (a) Turn-Off with various R S at V DC = 8V v PWM 1 8 6 4 2.5 1 1.5 2 2.5 3 3.5 4 4.5 5 (b) Short-Circuit at V DC = 8V, R S = 33Ω Fig. 7: Behavior of SSD

Switching on a hard short-circuit (type I) realized by a short metal connection leads to the waveforms in Fig. 7(b). Here the shunt resistor value is 33Ω. The current rises to a maximum value of around 6 ka before it is shut down successfully by the overcurrent-detection circuit. The overall short-circuit time 1 is 1.2 µs and thus below the limit of 2 µs. During the negative slope of the source current the Active Clamping circuit is additionally protecting the SiC-MOSFET against over-voltages by keeping its gate in the active region. The slight oscillation after t = 2 µs is caused by the snubber capacitors, which exchanges energy with the main DC-link capacitors. The input PWM signal v PWM shows that the driver ignores the switching command of the superior control, which is 5 µs long, in order to protect the SiC-MOSFET. 4. Conclusions The presented gate driver design offers a full control of the SiC-MOSFET module FMF8DX- 24A with features like overcurrent/short-circuit detection and shut-down and an overvoltage protection with Active Clamping. With this the FMF8DX-24A is safely operating under nearly any electrical condition. Measurement results of a double-pulse test at room temperature were presented. The proposed gate driver will be part of the upcoming reference design RDHP-1417 by Power Integrations. 5. References [1] E. Thal, K. Masuda, and E. Wiesner. New 8A/12V Full SiC Module. In Bodo s Power Systems, pages 28 31, April 215. [2] Eugen Wiesner, Koichi Masuda, and Motonobu Joko. New 12V full SiC module with 8A rated current. In Power Electronics and Applications (EPE 15 ECCE-Europe), 215 17th European Conference on, pages 1 9, Sept 215. [3] Mitsubishi Electric Corporation. Mitsubishi Electric to Begin Shipment of Silicon Carbide Power Module Samples. In Press Release 2687, July 215. [4] Eugen Wiesner, Eckhard Thal, Andreas Volke, and Karsten Fink. Advanced protection for large current full SiC-modules. In International Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 216, May 216. [5] Olivier Garcia, Jan Thalheim, and Nils Meili. Safe Driving of Multi-Level Converters Using Sophisticated Gate Driver Technology. In International Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM ASIA 213, June 213. [6] Power Integrations Switzerland GmbH. SCALE TM -2 2SC435T, Preliminary Description & Application Manual. In Manual, January 216. 1 Determined from 1% to 1% of the maximum short circuit current.