Elimination of Harmonics using Modified Space Vector Pulse Width Modulation Algorithm in an Eleven-level Cascaded H- bridge Inverter

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Elimination of Harmonics ug Modified Space Vector Pulse Width Modulation Algorithm in an Eleven-level Cascaded H- Jhalak Gupta Electrical Engineering Department NITTTR Chandigarh, India E-mail: jhalak9126@gmail.com bridge Inverter Shimi S. L. Electrical Engineering Department NITTTR Chandigarh, India E-mail: shimi.reji@gmail.com Vimal Kumar Verma Electrical Engineering Department NITTTR Chandigarh, India E-mail: vimal.abps@gmail.com Abstract: This paper presented a modified space vector pulse-width modulation algorithm (MSVPWM) for an eleven-level cascaded h-bridge (CHB) inverter. Space vector diagram (SVD) of an eleven-level CHB is reduced into several number of two-level space vector hexagon diagrams. In comparison with the general two-level space vector method, the proposed method decreases the total calculation time, labyrinthine and efforts involved in simplifying the SVD of an eleven-level inverter; without affecting the performance of inverter or loss in the inverter output voltage. Simulation results by ug the proposed MSVPWM algorithm is presented. The results are compared with the newton-raphson based selective harmonic elimination (NRSHE) technique to validate the proposed algorithm. This method is completely general and can be applied to any type of n-level inverter. Keywords: 11-level CHB inverter, modified SVPWM, Space vector pulse-width modulation (SVPWM), Space vector diagram I. INTRODUCTION In recent year s multilevel converters are very efficiently used for medium voltage systems and high power applications [1]. Over the traditional converters these converters have several advantages: reduction in common mode voltage, operation in over modulation, lower harmonic distortion and wide range of linear modulation. Multilevel converters are widely used in the motor drives [2], reactive power and harmonic compensation [3], and other industrial applications like electric vehicle and traction. Mainly three types of multilevel converters are generally used: flying capacitor, diode clamped and cascaded H-bridge. Among them, CHB topology is mostly used in the applications where the dc sources are used [4]. The classical techniques for modulation and control of CHB inverters use usoidal pulsewidth modulation and space vector modulation [5], for generating the switching signals to control the inverter. Several modulation techniques for low switching frequency have also been proposed [6]. Modulation methods can be categorized into three groups namely fundamental/low switching frequency methods, high switching frequency methods and mixed switching frequency methods. Among all these mostly used modulation method is space vector pulse width modulation technique (SVPWM) due to its following advantages: better utilization of dc voltage, lower current ripple, easy hardware implementation, optimized switching pattern and highly suitable for digital implementation [7]. The major advantage of SVWPM is that it improves the harmonic performance of the inverter by ug degree of freedom of space vector placement in a switching cycle [8]. The basic concept of space vector modulation is to control the inverter output voltages. In space vector modulation algorithms identification of the adequate triangle becomes more complex as the inverter's level increases [9]. This problem can be solved by ug the concept of selecting the two-level hexagon among many in any sector of the space vector diagram of n-level inverter. This technique can be easily applied to all multilevel inverters and extended upto any level of inverter. Space vector diagrams are same for all types of multilevel inverter [10]. The realization of SVPWM algorithm involves mainly three steps. (1) Identification of the triangle in which the tip point of the reference vector is lying. (2) Calculation of duty cycles for each triangle. (3) Identification of switching states according to a desired switching sequence. There are many problems which come up with the previous SVPWM methods like as the number of level increases redundant states also increases which results increase in complexity and calculation time [11]. This paper proposes a simple modified SVPWM algorithm for eleven-level cascaded h-bridge inverter. The proposed scheme easily determines the location of the reference vector and calculates on-times. In this scheme eleven-level inverter problem easily reduced into generalized two-level inverter problem which in turn reduces the complexity RES Publication 2012 Page 27

and efforts involved in solving the space vector diagrams. To prove the validity of the proposed method simulation results of this algorithm is compared with the NRSHE technique. The diagram of eleven-level CHB inverter (three phase) is shown in Figure1. Figure1. Three Phase Eleven-level CHB II. DESCRIPTION OF PROPOSED MOD- IFIED SVPWM (MSVPWM) TECH- NIQUE The main idea of MSVPWM algorithm is based on resolving an eleven-level SVD as shown in Figure2 into appropriate two-level hexagons. Firstly eleven-level SVD can initially be divided into six sixlevel SVD as shown in Figure3. Centre of each six-level hexagon lies along the 0 0 -axis and centre of each subsequent hexagon is shifted by 60 o. These hexagons are selected depending upon the angle θ of the original reference vector Vref as shown in Table1. When six-level hexagon has been selected, a new reference vector V ref6 is originated from the centre of six-level hexagon and it reduces the problem into six-level SVD. The tip of new reference vector coincides with the tip of V ref. Consider the case in which the tip of reference V ref lies in hexagon I, as shown in Figure4. Vector V 6α is related with V ref depend on the following equations V 6α = V 11α 4E, V 6β = V 11β, Where V 11α, V 11β and V 6α, V 6β are the components of V ref and V ref6 along the real and imaginary axes, respectively. Figure2. SVD of Eleven-level Inverter Figure3. Selection of Six-level Hexagon from Eleven-level SVD Table1. Range of θ for Six-level Hexagon Hexagon Number Range of θ I -30 O to +30 O II +30 O to +90 O III +90 O to +150 O IV +150 O to -150 O V -150 O to -90 O VI -90 O to -30 O RES Publication 2012 Page 28

II II V 11α 5E V 11α 5E V 11β 5E V 11β 5E IV V 11α + 5E V 11β V V 11α 5E V 11β 5E VI V 11α 5E V 11β 5E Figure4. Six-level Hexagon I Reference Vector Figure5. Reduction of Six-level into Four-level and Two-level Further each six-level hexagon can be divided into inner four-level and outer two-level hexagons as shown in Figure5. The selection of fourlevel and two-level hexagons depends on the magnitude of new reference vector V ref6 and its angle θ6. If V ref6 magnitude is greater than 4E, than outer two-level hexagons are selected; otherwise, four-level hexagon is selected as shown in Table3. When Outer two-level hexagon has been selected, a new reference vector V oref2 is originated from the centre of outer two-level hexagons. The tip of new reference vector coincides with the tip of V ref6. Consider the case in which the tip of reference V ref6 lies in outer hexagon I. Vector V o2α is related with V ref6 depend on the following equations V o2α = V 6α 4E, V o2β = V 6β, Where V 6α, V 6β and V o2α, V o2β are the components of V ref6 and V oref2 along the real and imaginary axes, respectively. Table3. Selection of Four-level and Two-level Hexagon Four-level and Two-level Hexagon Four-level Hexagon Table2. Computation of V ref6 from V ref Hexagon Number V 6α V 6β I V 11α 5E V 11β Magnitude of RES Publication 2012 Page 29 V ref6 Angle θ 6 of V ref6 4E - OH1 > 4E -12 O to +12 O OH2 > 4E +12 O to +24 O OH3 > 4E +24 O to +36 O OH4 > 4E +36 O to +48 O OH5 > 4E +48 O to +72 O OH6 > 4E +84 O to +72 O OH7 > 4E +84 O to +96 O OH8 > 4E +96 O to +108 O OH9 > 4E +108 O to +132 O OH10 > 4E +132 O to +144 O OH11 > 4E +144 O to +156 O OH12 > 4E +156 O to +168 O OH13 > 4E +168 O to -168 O OH14 > 4E -168 O to -156 O OH15 > 4E -156 O to -144 O OH16 > 4E -144 O to -132 O OH17 > 4E -132 O to -108 O OH18 > 4E -108 O to -96 O OH19 > 4E -96 O to -84 O OH20 > 4E -84 O to -72 O OH21 > 4E -72 O to -48 O OH22 > 4E -48 O to -36 O OH23 > 4E -36 O to -24 O OH24 > 4E -24 O to -12 O When four-level hexagon has been selected, it is further divided into twelve outer two-level hexagons and one inner two-level hexagon. The selection of inner and outer two-level hexagons depends upon the magnitude of new reference vector V ref4 and angle θ4. If V ref4 magnitude is

greater than E, than outer two-level hexagons are selected; otherwise, inner two-level hexagon is selected. When Outer two-level hexagon has been selected, a new reference vector V iref2 is originated from the centre of outer two-level hexagons. The tip of new reference vector coincides with the tip of V ref4. Consider the case in which the tip of reference V ref4 lies in outer hexagon I, same as shown in Figure4. Vector V i2α is related with V ref4 depend on the following equations V i2α = V 4α 4E, V i2β = V 4β, Where V 4α, V 4β and V i2α, V i2β are the components of V ref4 and V iref2 along the real and imaginary axes, respectively. If inner two-level hexagon is selected from any four-level hexagon, the reference vector V ref4 is originated at the centre of inner two-level hexagon so there is no need for the generation of any new reference vector. The proper sector of inner two-level hexagon is then determined as per the angle θ4 of V ref4 as in conventional two-level SVM. The assortment of a two-level hexagon and the generation of reference vector V oref2 and V iref2 reduces the eleven-level SVM into a twolevel SVM problem. III. SWITCHING TIME CALCULATION AND SWITCHING SEQUENCE DESIGN The calculation of switching time and generation of switching sequence for the selected two-level hexagon can be performed in a similar way as in the generalized two-level space vector modulation technique. In which each two-level hexagon is divided into six sectors. The sector in which the tip of the reference vector V oref2 or V iref2 lies depends on its angle θ2. V oref2 or V iref2 can then be synthesized by the three stationary vectors of that sector. The switching time calculation for the stationary vectors is done on the basis of volt-second-balancing principle. Figure6 shows outer region two-level hexagon with reference vector V oref2 lies in sector I. Vectors V 1 (P5N5N5), V 2 (P5N4N5) and V 0 (P5N4N4, P4N5N5) zero voltage vector are the three nearest triangle vectors (NTVs). The volt-second-balancing equation for this sector is given as follows: V oref2 T s = V 1 T a +V 2 T b +V 0 T 0, where T s is the sampling time; and T a, T b and T 0 are the respective switching times for vectors V 1, V 2 and V 0. The values of T a, T b and T 0 are given below: T a = T s m a (π/3-θ/2) T b = T s m a (θ/2) T 0 = T s - T a -T b where m a is the modulation index given below: m a = ( 3 V oref2 )/E After determining the switching times, next step is to find out the proper switching sequence. The typical seven-segment switching sequence is used in this technique. Switching pattern for each sector selected in such a way that at a time only one inverter leg is affected when switching from one state to other state or minimum number of switching happened. For example seven segment switching sequence for sector I of outer two-level hexagon I as shown in Fig. 6 is written as: (P4N5N5), (P5N5N5), (P5N4N5), (P5N4N4), (P5N4N5), (P5N5N5), (P4N5N5). Similarly, the switching sequence for sector II is given as follows: (P5N4N4), (P5N4N5), (P4N4N5), (P4N5N5), (P4N4N5), (P5N4N5), (P5N4N4). Figure6. Outer Region Two-level Hexagon I with Reference and Stationary Vectors IV. SIMULATION RESULTS The modeling and simulation are done ug MATLAB 2016a package. Modified space vector pulse width modulation technique is used for controlling the cascaded multilevel inverter. The simulation results taken for eleven-level cascaded H-bridge inverter at voltage 200V are studied for frequency range from 600Hz to 1500Hz and modulation index from 0.6 to 1 as shown in Figure7. Figure7. Frequency versus Line and Phase Voltage THD (%) Results for three phase eleven-level cascaded h-bridge multilevel inverter are obtained at different modulation indexes where the THD is lowest as given in Figure8. RES Publication 2012 Page 30

Figure10. (b) Phase-to-phase Voltage for NRSHE Figure8. Modulation Index versus Line and Phase Voltage THD (%) Table4 and Figure11 shows comparison of THD% profile in line voltage of MSVPWM and NRSHE techniques. Figure9 (a), (b) shows line to line voltage waveforms for MSVPWM and NRSHE techniques and Figure10 (a), (b) shows phase to phase voltage waveform for MSVPWM and NRSHE techniques. Figure9. (a) Line-to-line Voltage for MSVPWM Table4. Comparison of Line Voltage THD % in NRSHE and MSVPWM Harmonic Order NRSH E THD % MSVP WM 3 rd 0.17 0.15 5 th 0.12 0.11 7 th 0.53 0.43 9 th 0.4 0.03 11 th 0.17 0.08 13 th 0.2 0.08 15 th 0.4 0.32 Total THD% In Line Voltage NRS MSVP HE WM 5.55 3.26 Figure9. (b) Line-to-line Voltage for NRSHE Figure11. Comparison of Line THD % and Harmonic Order in NRSHE and MSVPWM Figure10. (a) Phase-to-phase Voltage for MSVPWM V. CONCLUSION This paper has presented an eleven-level CHB inverter. With the incorporation of proposed MSVPWM technique, the generalized performance, total computational time, complexity and efforts involved in simplifying the space vector diagram of an eleven-level inverter has been improved. Specific harmonic reduction with wide range of modulation indexes for any level of inverter is possible ug proposed MSVPWM as an optimization method. The 3th, 5th, 7th, 11th, 13th and 15th order harmonics have been reduced by large amount in 11-level cascaded h-bridge multilevel inverter. As compared with the NRSHE technique proposed MSVPWM method reduces the THD % in large amount. Unlike the conventional SVPWM topology, the proposed RES Publication 2012 Page 31

MSVPWM method reduces the calculation time and efforts involved in computations. Proposed MSVPWM method is completely general and can be applied to any type of multilevel inverter and any number of level. REFERENCES [1] J. Rodriguez, J. S. Lai and F. Z. Peng, Multilevel Inverters: A survey of Topologies, Controls, and Applications, IEEE Transaction on Industrial Electronics, Vol. 49, No. 4, pp. 724 738, August 2002. [2] L. Tolbert, F. Z. Peng and T. Habetler, Multilevel Converters for Large Electric Drives, IEEE Transaction on Industrial Electronics, Vol. 35, No. 1, pp. 36 44, January / February 1999. [3] H. Rudnick, J. Dixon and L. Moran, Delivering Clean and Pure Power, IEEE Power Energy Magazine, Vol. 1, No. 5, pp. 32 40, September/October 2003. [4] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt and S. Kouro, Multilevel Voltage Source Converter Topologies for Industrial Medium- Voltage Drives, IEEE Transaction on Industrial Electronics, Vol. 54, No. 6, pp. 2930 2945, December 2007. [5] P. McGrath and D. G. Holmes, Multicarrier PWM Strategies for Multilevel Inverters, IEEE Transaction on Industrial Electronics, Vol. 49, No. 4, pp. 858 867, August 2002. [6] N. Celanovic and D. Boroyevich, A Fast Space-Vector Modulation Algorithm for Multilevel Three-Phase Converters, IEEE Transaction on Industrial Applications, Vol. 37, No. 2, pp. 637 641, March/April 2001. [7] J. Rodriguez, J. Pontt, P. Correa, P. Cortes and C. Silva, A New Modulation Method to Reduce Common-Mode Voltages in Multilevel Inverters, IEEE Transaction on Industrial Electronics, Vol. 1, No. 4, pp. 834 839, August 2004. [8] Y. Liu, H. Hong and A. Huang, Real-Time Calculation of Switching Angles Minimizing THD for Multilevel Inverters with Step Modulation, IEEE Transaction on Industrial Electronics, Vol. 56, No. 2, pp. 285 293, February 2009. [9] Z. Du, L. M. Tolbert, J. N. Chiasson and B. Ozpineci, Reduced Switching-Frequency Active Harmonic Elimination for Multilevel Converters, IEEE Transaction on Industrial Electronics, Vol. 55, No. 4, pp. 1761 1770, April 2008. [10] Seo, J.H., Choi, C.H., Hyun, D.S.: A new simplified space-vector PWM method for three-level inverters, IEEE Transaction on Power Electronics, Vol. 16, No. 4, pp. 545-550, July 2001. [11] I. Ahmed and V. B. Borghate, Simplified space vector modulation technique for seven-level cascaded H-bridge inverter, IET Power Electronics, Vol. 7, No. 5, pp. 604-613, March 2014. RES Publication 2012 Page 32