Design and Simulation of 5GHz Down-Conversion Self-Oscillating Mixer

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Australian Journal of Basic and Applied Sciences, 5(12): 2595-2599, 2011 ISSN 1991-8178 Design and Simulation of 5GHz Down-Conversion Self-Oscillating Mixer 1 Alishir Moradikordalivand, 2 Sepideh Ebrahimi and 3 Mahmoud Abdipour 1 Faculty of Electrical Engineering University Technology Malaysia. 2 Young Researchers Club, Islamic Azad University, Aligodarz Branch, Aligodarz, Iran. 3 Arak Islamic Azad university, Arak, Iran. Abstract: In this paper a self-oscillating mixer is presented fundamental signal generated by the oscillator subcircuit in the mixing process. The oscillator core consumes 3 ma of current from a 1.8 V DC supply and results in an output power of -0.88 dbm per oscillator and a measured phase noise of - 91, -102 and -107 dbc/hz at 100 KHz, 600 KHz and 1 MHz from the carrier, respectively. In the mixing process the proposed mixer achieved IIP3 of 0 dbm with conversation gain of 1.93 db. The circuit was designed and simulated in 0.18- m CMOS technology by ADS2010. Key words: Self-oscillating mixer (SOM), VCO, CMOS, Up-conversation Mixer. INTRODUCTION In modern microwave communication systems, low cost, small size and low power consumption circuits are required that combine multiple functions with a reduced number of components. For the realization of receiving systems, the harmonic self-oscillating mixer (SOM) is an attractive option (G.C. Wang et al., 1994; M.R. Tofighi and A.S. Daryoush, 2005; S.A. Winkler et al., 2007; F. Plessas et al., 2007; S. Ver Hoeye et al., 2011; L.F. Herrán et al., 2006) since a single transistor is employed to realize the local oscillator signal as well as a mixing operation between the input signal and a harmonic component of the self-oscillation. In harmonic balance (HB), several techniques have been presented for the nonlinear analysis and design of SOM-circuits (S. Ver Hoeye et al., 2011; L.F. Herrán et al., 2006). With these techniques the designer has an increased control over the SOM self-oscillating frequency, the harmonic content and the conversion gain. However, for the design of wide-band harmonic SOM circuits with high conversion gain, additional techniques are required. A common problem referring to SOM solutions has been the Lack RF-to-local oscillator (LO) isolation emerging by the combination of the two circuit functions into one device. This problem has been addressed in numerous publications and a common solution to bypass this issue is given by the use of a dual-gate FET, using one port for the oscillation feedback network and injecting the RF input signal at the second port (J. Zhang et al., 1999; J. Xu and K.Wu, 2005; Y. Chen and Z. Chen, 2003). Another possibility to eliminate this problem is the use of a balanced circuit structure (Winkler, S.A. et al., 2006; Gook-Ju Ihm, 2004; Yuan-Kai Chu et al, 2003; Xuezhen Wang and Robert Weber, 2004), which offers inherent RF-LO isolation, as well as a number of other important advantages such as lower AM noise, suppression of unwanted harmonics, etc. Furthermore, the input does not have to be matched both at LO and RF frequencies, which simplifies the input matching requirements. Efforts have been made to integrate SOMs with antennas to form receivers (J. Zhang et al., 1999; Y. Chen and Z. Chen, 2003; M. Tiebout and T. Liebermann). This allows for building a simple receiver circuit without the use of an input RF balun, as it would be required in conventional balanced mixers. Thus, the presented solution results in a planar design, which is highly desired in many commercial low-cost applications. Design of a 5 GHz VCO: The cross-coupled VCO is the most common microwave VCO topology used in CMOS technology. An LC VCO can be modeled with the capacitor and inductor in parallel with a resistor to model the losses in the tank as well as a negative resistance that models the active device. One way of generating the negative resistance to compensate for the losses in the LC tank is to use a cross-coupled differential pair as shown in Figure1. The resistance, R in looking into the cross-coupled pair is given by: 2 Rin g m (1) Corresponding Author: Alishir Moradikoradilivand, Faculty of Electrical Engineering University Technology Malaysia. E-mail: alimoradi2020@gmail.com 2595

Where g m is the transconductance of each of the BJTs in the cross-coupled pair. Therefore, with an appropriate device size and biasing, the value of negative resistance required to counteract the losses in the tank can be realized. Fig. 1: Negative resistance generated from cross-coupled BJT. A commonly used LC VCO circuit using the cross coupled differential pair is shown in Figure 2. In this implementation a relatively low supply voltage is possible since there are only two levels of transistors, but it requires two inductors, which can consume significant chip area. The VCO topology shown in Figure 2 was used (with FET transistor) in (S. Ver Hoeye et al., 2001). Fig. 2: Cross-coupled BJT VCO. In this work, CMOS 0.18 m technology was used to design fundamental C band VCO. The Diode varactor shown in Figure2 enables the frequency tuning. The signal output power was approximately -0.942dBm and the phase noise at a 1 MHz offset was -107.9dBc/Hz. Figure 3 shows Graph of phase noise. Figure 4 shows spectrum of output power and figure 5 shows Timedomain VCO outputs. Fig. 3: Phase noise 4.8GHz VCO. 2596

Fig. 4: Output power VCO. Fig. 5: Time-domain VCO outputs. Down-Conversion Self-Oscillating Mixer Design: The single balanced down-conversation mixer is shown at Fig. 6 Differential IF outputs are converted to single-ended operation with an external balun circuit (Ll, L2 and C1) and DC blocking capacitor C2. The increase of the bias current of Q1 results in the increase of not only the linearity but also noise in this single balanced mixer topology. The bias current of Q1 was determined to produce high IIP3 (> 0 dbm) with good input matching (> 15 db). The inductive degeneration using down-bond inductors improves input matching with only a small degradation in mixer noise. R1 and R2 in Fig. 6 were also used to increase the linearity at the cost of degradation of conversion gain. The noise and input matching was optimized with transistor sizing and on-chip components. The size of switching transistors (Q2, Q3) was traded-off between noise and buffer loading. As for sources of noise, the base resistance of the RF input stage (Q1) is one of the dominant factors; the RF input stage was optimized similar to that of an LNA design. The inductive degeneration using down-bond inductors improves input matching with only a small degradation in mixer noise. Fig. 6: Simplified schematic of down-conversion mixer. 2597

Fig. 7: Schematic of self oscillating down-conversion mixer. Simulation Results: The proposed up-conversion mixer is designed by TSMC 0.18-μm CMOS technology and simulated by using Advanced Design System (ADS2010). The total bias current consumed by the proposed mixer is 3-mA with supply voltage of 1.8-V. The input signal at 5.35GHz is down converted to 350 MHz through a 5 GHz Self LO signal. The conversion gain of the mixer was measurement at various RF_Power and the results are shown in Fig. 8.Fig 9 shows IF_spectrum. Table 1 provides the comparison between performance of the proposed mixer and the most recently published works. Fig. 8: Conversion gain at various RF_Power. Fig. 9: IF Output Spectrum 2598

Table 1: Performance Compare. Process Freq (GHz) Vdd (V) I (ma) CG (db) NF (db) IIP3 (dbm) RF freq Gook-Ju Ihm, 2004 0.18 5.25 1.8 12 10 14.5 18.5 Yuan-Kai Chu et al., 2003 0.18 5.8 1.8 6-4.5 14.6 0.8 Xuezhen Wang and Robert Weber, 2004 0.18 5.8 1.5 7.85 10.4 13.6-20.6 M. Tiebout and T. Liebermann, 0.13 2.15 1 40 5.5 14.5 0 This Work 0.18 5.35 1.8 3 1.93 12.5 0 Conclusion: This paper has presented the design and simulation of a CMOS up-conversion Self oscillating mixer at 5 GHz for wireless applications. Fundamental signal generated by the oscillator subcircuit in the mixing process the proposed mixer achieved IIP3 of 0dBm with conversation gain of 1.93 db and consumes only 5.4-mW power at 1.8-V supply. REFERENCES Bourhill, N., S. Iezekiel and D.P. Steenson, 2000. A balanced self-oscillating mixer, IEEE Microw. Guided Wave Lett., 10(11): 481-483. Chen, Y. and Z. Chen, 2003. A dual-gate FET subharmonic injection-locked self-oscillating active integrated antenna for RF transmission, IEEE Microw.Wireless Compon. Lett., 13(6): 199-201. Gook-Ju Ihm, 2004. A transmitter front-end design for 5GHz WLAN applications, Microwave and Millimeter Wave Technology, pp: 582-585. Herrán, L.F., S. Ver Hoeye and F. Las Heras, 2006. Nonlinear optimization tools for the design of microwave high-conversion gain harmonic selfoscillating mixers, IEEE Microw. Wireless Compon. Lett., 16(1): 16-18. Huang, T.C. and S.J. Chung, 2003. A new balanced self-oscillating mixer (SOM) with integrated antenna, in IEEE Int. AP-S Symp., Columbus, OH, USA, pp: 89-92. Plessas, F., A. Papalambrou and G. Kalivas, 2007. A subharmonic injectionlocked self-oscillating mixer, in Proc. IEEE Int. Symp. Circuits Syst., New Orleans, L.A., pp: 2626-2629. Siripon, N., K.S. Ang, M. Chongcheawchamnan and I.D. Robertson, 2000. Design and performance of a novel balanced self-oscillating mixer, in Proc. 30th Eur. Microw. Conf., Paris, France, pp: 16-19. Sironen, M., Y. Qian and T. Itoh, 2001. A subharmonic self-oscillating mixer with integrated antenna for 60-GHz wireless applications, IEEE Trans. Microw. Theory Tech., 49(3): 442-450. Tiebout, M., and T. Liebermann. A 1V fully integrated CMOS transformer based mixer with 5.5dB gain, 14.5dB SSB noise figure and 0dBm input IP3, IEEE Solid-State Circuits, pp: 577-580. Tofighi, M.R. and A.S. Daryoush, 2005. A 2.5-GHz InGaP/GaAs differential cross-coupled Self- Oscillating Mixer (SOM) IC, IEEE Microw. Wireless Compon. Lett., 15(4): 211-213. Ver Hoeye, S., L. Zurdo and A. Suárez, 2001. New nonlinear design tools for self-oscillating mixers, IEEE Microw.Wireless Compon. Lett., 11(8): 337-339. Wang, G.C. et al., 1994. A low cost DBS low noise block downconverter with a DR stabilized MESFET self-oscillating mixer, in IEEE MTT-S Int. Dig., 3: 1447-1450. Winkler, S.A., K. Wu and A. Stelzer, 2006. A novel balanced third and fourth harmonic self-oscillating mixer with high conversion gain, in Proc. 36th Eur. Microw. Conf., Manchester, U.K., pp: 1663-1666. Winkler, S.A., K. Wu and A. Stelzer, 2007. Integrated receiver based on a high-order subharmonic selfoscillating mixer, IEEE Trans. Microw. Theory Tech., 55(6): 1398-1404. Xu, J., and K.Wu, 2005. A subharmonic self-oscillating mixer using substrate integrated waveguide cavity for millimeter-wave application, in IEEE MTT-S Int. Microw. Symp. Dig., pp: 2019-2022. Xuezhen Wang and Robert Weber, 2004. A novel low power low voltage LNA and mixer for WLAN IEEE 802.11a standard, RFIC Symposium, pp: 231-234. Yuan-Kai Chu et al., 2003. 5.7 GHz 0.18 /spl mu/m CMOS gain-controlled LNA and mixer for 802.11a WLAN applications, RFIC Symposium, pp: 221-224. Zhang, J., Y. Wang and Z. Chen, 1999. Integration of a self-oscillating mixer and an active antenna, IEEE Microw. Guided Wave Lett., 9(3): 117-119. 2599