AAT4910 PRODUCT DATASHEET. 28V Half-Bridge Dual N-Channel MOSFET Driver. General Description. Features. Applications. Typical Application

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General Description The is a 28V half-bridge dual MOSFET driver for high-current DC-DC converter and motor driver applications. It drives both high-side and low-side N-channel MOSFET switches controlled by a logic input. The internal driver circuitry and MOSFET driver power comes from a 5V input allowing the use of low-threshold MOSFETs. The high-side driver output stage is allowed to float at up to 28V, allowing a broad range of power sources. The is available in a Pb-free, space-saving SC70JW-8 package and is rated over the -40 C to 85 C temperature range. Features Input Voltage Range up to 28V Dual N-Channel MOSFET Switches Shoot-Through Protection Over-Temperature Protection Available in 2.0 x 2.1 mm SC70JW-8 Package -40 C to 85 C Temperature Range Applications Class D Audio High Current Synchronous DC-DC Converter Motor Drivers Multiphase DC-DC Converters Typical Application Input Up to 28V +5V On/Off +5V +5V +5V Multi-Phase DC-DC Controller Output Voltage 4910.2008.09.1.0 www.analogictech.com 1

Pin Descriptions Pin numbers are preliminary and subject to change. Pin # Symbol Function 1 SW Switching node. SW is the switching node. This is the return for the high-side MOSFET drive. Connect SW to the high-side MOSFET source and the low-side MOSFET drain. 2 BST Boosted drive input for high side gate driver. BST supplies power to the high-side MOSFET gate driver allowing the gate drive voltage higher than the input voltage for full enhancement of the high-side MOS- FET. Connect the boost capacitor between SW and BST, and connect a diode from VCC to BST to charge the boost capacitor. 3 VCC Input supply voltage. Connect VCC to the 5V bias supply voltage. Bypass VCC to GND with a 1μF or greater capacitor as close to the as possible. 4 GND Ground. 5 Low-side MOSFET gate drive output. drives the gate of the low-side MOSFET. Connect the gate of the low-side MOSFET to. 6 Logic signal input. The state of determines if the high-side or low-side switch is on/off. Drive high to turn on the high-side switch, drive low to turn on the low-side switch. 7 EN Enable input. Drive EN high to turn on the, drive it low to turn it off. When EN is low, both DH and are driven low to turn off the external MOSFETs. For automatic operation, connect EN to VCC. 8 DH High-side MOSFET gate drive output. DH drives the gate of the high side MOSFET. Connect the gate of the high-side MOSFET switch to DH. Pin Configuration SC70JW-8 (Top View) SW 1 BST 2 VCC 3 GND 8 7 6 4 5 DH EN 2 www.analogictech.com 4910.2008.09.1.0

Absolute Maximum Ratings 1 Symbol Description Value Units VCC Voltage to GND -0.3 to 6.0 V Voltage to GND -0.3 to V + 0.3 V SW to GND -2 to 28 V DH Voltage to SW -0.3 to 6 V DH Voltage to BST +0.3 to -6 V BST Voltage to SW -0.3 to 6.0 V, EN Voltage to GND -0.3 to 6.0 V Operating Junction Temperature Range -40 to 150 C Maximum Soldering Temperature (at leads, 10 sec) 300 C Thermal Information Symbol Description Value Units P D Maximum Power Dissipation (SC70JW-8) 625 mw θ JA Thermal Resistance (SC70JW-8) 2 160 C/W 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time. 2. Mounted on a FR4 board. 4910.2008.09.1.0 www.analogictech.com 3

Electrical Characteristics 1 T A = -40 C to 85 C, unless otherwise noted. Typical values are T A = 25 C, V VCC = V BST = 5.0V. Symbol Description Conditions Min Typ Max Units In-Circuit Operating Input Voltage 28 V VCC Input Voltage 4.5 5.5 UVLO Threshold V VCC rising 4.3 V Hysteresis 150 mv DH UVLO Threshold V BST to V SW Falling 2.0 V V = 0V; V CC = 5V 600 Quiescent Current V = 5V; V CC = 5V 16 μa V = 0V to 5V, 100kHz; V CC = 5V 350 Shutdown Current EN = GND 1.0 μa, DH Drive Resistance Pull-Up 3 Pull-Down 1.7 Ω t R() Rise Time C = 0.5nF 2 ns t R(DH) DH Rise Time C DH = 0.5nF 2 ns t F() Fall Time C = 0.5nF 2 ns t F(DH) DH Fall Time C DH = 0.5nF 22 ns High to DH High Propagation Delay (t2) 130 ns -Low to DH-Low Propagation Delay (t4) 35 ns -Low to -High Propagation Delay (t5) 75 ns High to Low Propagation Delay (t1) 65 ns -Low to (DH-LX)-High (t3) 65 ns (DH-LX)-Low to -High (t6) 40 ns SW Leakage Current V = 5.5, V SW = 0 1 μa EN Threshold Low 0.6 V EN Threshold High 1.4 V EN Leakage Current V = 5.5V, V EN = 0V -1.0 1.0 μa Over-Temperature Shutdown Threshold 140 C Over-Temperature Shutdown Hysteresis 15 C 1. The is guaranteed to meet performance specifications over the -40 C to +85 C operating temperature range and is assured by design, characterization, and correlation with statistical process controls. 4 www.analogictech.com 4910.2008.09.1.0

Timing Diagram t R(DH) t F(DH) DH-LX t F() t R() t 1 t 3 t 4 t 6 t 2 t 5 4910.2008.09.1.0 www.analogictech.com 5

Typical Characteristics V CC Supply Current vs. V CC Voltage (V = 0V) V CC Supply Current vs. Temperature (V = 0V; V CC = 5V) VCC Supply Current (µa) 800 700 600 500 400 300 200 100 0 4.0 4.25 4.5 4.75 5.0 5.25 5.5 VCC Supply Current (µa) 800 700 600 500 400 300 200 100 0-40 -15 10 35 60 85 V CC Voltage (V) Temperature ( C) V CC Supply Current vs. V CC Voltage (V = 5V) V CC Supply Current vs. Temperature (V = 5V; V CC = 5V) VCC Supply Current (µa) 20 18 16 14 12 10 8 6 4 2 0 4.0 4.25 4.5 4.75 5.0 5.25 5.5 VCC Supply Current (µa) 20 18 16 14 12 10 8 6 4 2 0-40 -15 10 35 60 85 V CC Voltage (V) Temperature ( C) V CC Supply Current vs. V CC Voltage (V = 0V to 5V; 100KHz) Propagation Delay and Break-Before-Make (V Rising; Q G = 5.6nC) 450 VCC Supply Current (µa) 400 350 300 250 200 150 100 50 0 4.0 4.25 4.5 4.75 5.0 5.25 5.5 Voltage (5V/div) V V V(DH-SW) V CC Voltage (V) Time (20ns/div) 6 www.analogictech.com 4910.2008.09.1.0

Typical Characteristics Propagation Delay and Break-Before-Make (V Falling; Q G = 5.6nC) Rise and Fall Time vs. C LOAD (V = 0V to 5V; 100kHz; V CC = 5V) Voltage (5V/div) V Time (ns) 140 120 100 80 60 40 rise fall DH rise DH fall V V (DH-SW) 20 0 0.1 1 10 Time (10ns/div) Capacitance (nf) Shutdown Current (na) Shutdown Current vs. Temperature (V VCC = V BST = V = 5V; V EN = 0V; DH = = SW = Float) 40 35 30 25 20 15 10 5 0-5 -40-15 10 35 60 85 Temperature ( C) V EN(L) (V) 1.4 1.3 1.2 1.1 1 0.9 Input Low Threshold vs. Input Voltage 0.8-40 C 0.7 25 C 85 C 0.6 4.5 4.75 5 5.25 5.5 Input Voltage (V) Input High Threshold vs. Input Voltage 1.4 1.3 1.2 V EN(H) (V) 1.1 1 0.9 0.8-40 C 0.7 25 C 85 C 0.6 4.5 4.75 5 5.25 5.5 Input Voltage (V) 4910.2008.09.1.0 www.analogictech.com 7

Functional Block Diagram 5V Up to 28V VCC On/Off EN Internal Power BST DH SW GND Functional Description The is a dual MOSFET driver that takes a logic input () and drives both high and low-side N-channel MOSFETs. It can be used to drive the power section of DC/DC converters, Class D audio power amplifiers, or other high-power devices requiring switched voltage. The device is powered from a 5V rail and includes circuitry to drive the high-side N-channel MOSFET with up to 28V power input. When driven low, the enable input (EN) turns off the driver and reduces the operating current to less than 1μA. Over-temperature shutdown protects the in the case of a short circuit or defective MOSFET. High-side driver under-voltage lockout turns off the high-side MOSFET when there is insufficient voltage to drive the MOSFET preventing damage at startup or if the input is held high continuously. High-Side/Low-Side MOSFET Driver The turns on the high-side external MOSFET when is driven high, and turns on the low-side MOSFET when is driven low. The low 3Ω pull-up and 1.7Ω pull-down resistance allow fast turn-on and turn-off times and/or the capability to drive multiple large MOSFETs. The lower pull-down resistance ensures that the MOSFETs remain off during fast drain-voltage switching transients. The high-side driver powers the gate of the external MOSFET to a voltage greater than the input, allowing it to fully turn on without a separate power supply rail. The high-side driver boost capacitor between SW and BST is charged when the low-side MOSFET is on via the 5V power source and the external rectifier. Once the capacitor is charged, the DH MOSFET gate driver output is powered from BST, allowing sufficient MOSFET gate voltage for full enhancement. An under-voltage lockout feature on the BST-to-SW voltage turns off the DH output if the voltage falls below the under-voltage threshold. This ensures that should the boost capacitor excessively discharge or is not able to fully charge, the MOSFET will not be driven to an intermediate state that would result in excessive power dissipation and could cause the MOSFET to fail. High-to-low and low-to-high transitions include a breakbefore-make dead time when both MOSFETs are turned off. This insures that one MOSFET is fully turned off before the other MOSFET is turned on to prevent the possibility of shoot-through current. Thermal overload protection turns off the should the die temperature exceed the 140 C threshold. This protects the from high ambient temperature conditions and MOSFET failures. At 15 C hysteresis prevents rapid cycling in and out of thermal shutdown. 8 www.analogictech.com 4910.2008.09.1.0

Application Information Supply Capacitor The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the. A 4.7μF to 10μF X7R or X5R low ESR/ESL ceramic capacitor selected for the input is ideal for this function. To minimize tray resistance, the capacitor should be placed as closely as possible to the input pin in order to minimize EMI and input voltage ripple. Bootstrap Capacitor In order to fully turn on the high side external MOSFET while the low side MOSFET turns OFF, a bootstrap capacitor is connected between the BST pin and the SW pin. This capacitor is charged up to V CC through an external diode when the low side MOSFET is ON. The boost strap capacitor voltage rating should be able to withstand at least twice the maximum voltage supply, and its value should be at least fifteen times larger than the gate capacitor value. The bootstrap capacitance can be estimated by Equation 1: Q GATE Eq. 1: C BST(M) = 15 V CC - V DIODE For example, a Si4908DY dual N-channel MOSFET has a total gate charge of Q GATE = 6nC at V GS = 5V. Using V CC = 5V and V DIODE = 1V, then C BST(M) = 15 6nC 5V - 1V = 0.04µF A 0.1μF/12V low ESR X7R ceramic capacitor is selected to handle twice the maximum supply voltage (5.5V) and to prevent voltage transient at the drain of the high side MOSFET. Shoot-Through Protection The high-side and low-side MOSFETs of the cannot conduct at the same time in order to prevent shoot-through current. When the clock pulse at pin rises, is first pulled down. The shoot-through protection circuit waits for about 60ns before pulling up DH. Similarly, when the clock pulse goes low, DH is pulled down first, and the circuit pulls up after about 40ns. In this way, the high-side and low-side MOSFETs are never turned on at the same time to prevent the supply voltage shorts to ground. The time between the DH and pulses should be kept as short as possible to minimize current flows through the body diode of the lowside MOSFET(s). The break-before-make shoot-through protection significantly reduces the losses associated with the driver at high frequency. Output Inductor Selection A 2.2μH to 10μH inductor value with appropriate DCR is selected to maintain the peak inductor current below the maximum current of the high-side and low-side MOSFETs. The peak inductor current, which varies according to the driving frequency (PWM), should not exceed the inductor saturation current. In application where the driving frequency below 100KHz, a 4.7μH to 10μH inductor should be used to avoid the peak inductor current exceeding the maximum current of the MOSFETs. Thermal Calculations The power dissipation of the MOSFETs driver includes power dissipation in the MOSFETs due to charging and discharging the gate capacitance, quiescent current power dissipation, and transient power in the driver during output transitions (the transient power is usually very small and losses in it can be neglected). The maximum package power dissipation can be estimated by Equation 2: Eq. 2: P D(MAX) = V CC I = Where: T J(MAX) - T A θ JA = I Q V CC + Q G(HS) F SW V CC + Q G(LS) F SW V CC T J(MAX) is the junction temperature of the dice (C ). T AMB is the ambient temperature (C ). θ JA =160 C/W is the thermal resistance (C /W). I Q is the operating current of the driver (ma). Q G(HS) and Q G(LS) are the gate charge of high side and low side MOSFET (nc). F SW is the switching frequency (MHz). The maximum junction temperature can be derived from Equation 2 for the SC70JW-8 package: Eq. 3: T J(MAX) = P D(MAX) θ JA + T AMB 4910.2008.09.1.0 www.analogictech.com 9

For example, consider the drives the Si4908DY dual N-channel MOSFET whose maximum gate charge specified as 6nC for V GS = 5V. The total power dissipation in the driver at a switching frequency of 100kHz equals: P TOTAL = 5V 450μA + 2(5V 6nC 100kHz) = 8.25mW The maximum junction temperature at 100kHz is determined by Equation 3: T J(MAX) = 8.25mW 160 C/W + 85 C = 86.3 C This is well within the thermal limits for safe operation of the device. Gate Drive Current Ratings Assuming the maximum gate charge of high side and low side MOSFET are equal to each other, the maximum gate drive capability for the designed maximum junction temperature without an external resistor can be derived from Equation 2: Eq. 4: 1 T J(MAX) - T AMB Q G(MAX) = - I 2 F SW θ JA V Q The relationship between gate capacitance, turn-on/ turn-off time, and the MOSFET driver current rating can be determined by Equation 5: Eq. 5: I G(MAX) = C G(MAX) dv dt Where: I G(MAX) is the peak drive current for a given apply voltage C G(MAX) is the maximum gate capacitance dv is gate-to-source voltage of the MOSFET dt is rising time of the MOSFET gate voltage The relationship between C G(MAX), Q G(MAX), and V GS is given by Equation 6: Eq. 6: C G(MAX) = Q G(MAX) V GS The peak current drive requirements for a given MOSFET gate voltage can be derived from Equations 5 and 6: Design Example V = 5V V GS = 5V F SW = 500 khz θ JA = 160 C/W I Q = 8mA T J(MAX) = 120 C T AMB = 85 C t RISE = dt = 60ns Q G(MAX) = 1 2 500KHz Eq. 7: I G(MAX) = Q G(MAX) dt 120 C - 85 C 160 C/W 5V C = Q G(MAX) G(MAX) V = 36nC = 7nF GATE 5V - 8mA = 36nC Q G(MAX) 36nC I G(MAX) = = = 0.6A dt 60ns Figure 1 shows that the maximum gate drive capability of the MOSFET driver will derate when the switching frequency increases. Maximum Gate Charge (nc) Maximum Gate Charge vs. Frequency @ 25 C (T J = 120 C) 1000 100 10 1 100 1000 Frequency (khz) Figure 1: Maximum Gate Charge vs. Switching Frequency. 10000 10 www.analogictech.com 4910.2008.09.1.0

Typical Applications Multi-Phase Synchronous Buck Converter The most common applications include multiphase DC/DC converter output power stages, DC motor drive, and Class D audio power amplifier. Figure 2 shows a typical configuration when used as a 2-phase buck converter power stage with synchronous rectification. The EN pin can be used to force the LX output to a high impedance state which enables the output inductor to operate in discontinuous conduction mode (DCM) in order to improve the efficiency under light load conditions. The body diode associated with the low side switching MOSFET gives the inductive switching capability, and clamps the LX node at one diode drop below GND during the break-before-make time. The multiphase buck converter assures a stable and high performance topology for high currents and low voltages which are demanded in desktop computers, workstations, and servers. Figure 3 shows an output ripple current reduction due to 2-phase cancellation. Input Up to 28V +5V On/Off BS EN DH SW1 L1 IL1 +5V +5V IL1+IL2 Output Voltage BS PWM1 EN Multi-Phase DC-DC Controller PWM2 DH SW1 L2 IL2 FB Figure 2: 2-Phase Synchronous Buck Converter Power Stage. 4910.2008.09.1.0 www.analogictech.com 11

FastSwitch TM Class D Audio Amplifier I L1 SW 1 I L1 + I L2 I L2 SW 2 The is also ideally suited for use as an efficient output driver for a Class D audio amplifier. In this type of amplifier, the switches are either fully on or fully off, significantly reducing conduction losses in the output power devices. In this way, Class D audio offers a superior efficiency over 90%, which can not be achieved with traditional Class AB audio. A typical Class D audio amplifier block diagram is illustrated in Figure 5, in which the audio signal is modulated by the PWM carrier signal which drives the terminal of the. A low pass filter (L1, C1) at the last stage removes the high frequency of the PWM carrier signal. Typically, a 1000μF DC blocking capacitor (C2) is used at the output to provide DC short circuit protection. Figure 3: Output Current Ripple Reduction (I L1 + I L2 ) due to 2-Phase Cancellation. Motor Drive The is also ideally suited for use as an efficient output driver for DC brushless motor control. The inductive load switching capability of the eliminates the need for external diodes. A typical half-bridge motor control circuit is illustrated in Figure 4. In half-bridge motor control, one end of the motor is connected to the SW node of the driver, and the other end is connected to the power supply or ground. The speed of the motor is controlled by the PWM duty cycle at the terminal of the. When the high-side MOSFET turns OFF and the low-side MOSFET turns ON, the current flows through the motor to ground from the supply voltage (blue arrow). During the ON time, the low-side MOSFET turns OFF and the high-side MOSFET turns ON. The winding current keeps the induced current flowing in the same direction but exponentially decays toward zero. EN CLK V 5V EN VCC GND BST DH SW High side ON DC Brushless Motor Low side ON Up to 28V 10µF/30V + V 5V Layout FEEDBACK COMP EN VCC GND BST DH SW Up to 28V 10µF/30V Figure 5: Typical Class D Audio Amplifier Block Diagram. The suggested PCB layout for the is shown in Figures 7 and 8. The following guidelines should be used to help ensure a proper layout. 1. Place the driver as close as possible to the MOSFETs. 2. Place the decoupling capacitor C3 as close as possible to the VCC and GND pins. 2. DH, LX,, and GND should connect as closely as possible to the MOSFETs to minimize propagation delay. 4. The high-current loop between the high-side and low-side MOSFETs and the input capacitor should be kept as small as possible. 5. The trace connected to the drain and source MOSFETs should be large to improve heat dissipation. L1 C1 C2 Figure 4: Half-Bridge Motor Drive Using MOSFET Driver. 12 www.analogictech.com 4910.2008.09.1.0

VCC 5V Up to 28V D1 BAS16 3 C3 2 10µF/ VCC BST 7 6.3V EN C2 0.1µF 8 DH 2 7,8 Si4908 DY C4 10µF/28V SW 1 1,5,6 L1 2.2uH/5A V OUT PWM 6 GND 4 5 4 3 Si4908 DY C1 10µF/30V Figure 6: Evaluation Board Schematic. Figure 7: Evaluation Board Top Side Layout. Figure 8: Evaluation Board Bottom Side Layout. 4910.2008.09.1.0 www.analogictech.com 13

Ordering Information Package Marking 1 Part Number (Tape and Reel) 2 SC70JW-8 5HXXY IJS-T1 All AnalogicTech products are offered in Pb-free packaging. The term Pb-free means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/about/quality.aspx. Package Information SC70JW-8 0.50 BSC 0.50 BSC 0.50 BSC 1.75 ± 0.10 2.20 ± 0.20 0.225 ± 0.075 2.00 ± 0.20 0.85 ± 0.15 1.10 MAX 0.15 ± 0.05 0.100 0.45 ± 0.10 7 ± 3 4 ± 4 0.048REF 0.05 ± 0.05 2.10 ± 0.30 All dimensions in millimeters. 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611 Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech s terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. 14 www.analogictech.com 4910.2008.09.1.0