Power MOSFET PROUCT SUMMRY V S (V) 100 R S(on) (Ω) V GS = 5.0 V 0.54 Q g (Max.) (nc) 6.1 Q gs (nc) 2.0 Q gd (nc) 3.3 Configuration Single PK (TO-252) G S IPK (TO-251) G S G S N-Channel MOSFET FETURES Halogen-free ccording to IEC 61249-2-21 efinition ynamic dv/dt Rating Repetitive valanche Rated Surface Mount (IRLR110, SiHLR110) Straight Lead (IRLU110, SiHLU110) vailable in Tape and Reel Logic-Level Gate rive R S(on) Specified at V GS = 4 V and 5 V Compliant to RoHS irective 2002/95/EC ESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The PK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRLU, SiHLU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 W are possible in typical surface mount applications. ORERING INFORMTION Package PK (TO-252) PK (TO-252) PK (TO-252) IPK (TO-251) Lead (Pb)-free and Halogen-free SiHLR110-GE3 SiHLR110TR-GE3 SiHLR110TRL-GE3 SiHLU110-GE3 Lead (Pb)-free IRLR110PbF IRLR110TRPbF a IRLR110TRLPbF IRLU110PbF SiHLR110-E3 SiHLR110T-E3 a SiHLR110TL-E3 SiHLU110-E3 SnPb IRLR110 IRLR110TR a IRLR110TRL a IRLU110 SiHLR110 SiHLR110T a SiHLR110TL a SiHLU110 Note a. See device orientation. BSOLUTE MXIMUM RTINGS T C = 25 C, unless otherwise noted PRMETER SYMBOL LIMIT UNIT rain-source Voltage V S 100 Gate-Source Voltage V GS ± 10 V Continuous rain Current V GS at 5.0 V T C = 25 C 4.3 I T C = 100 C 2.7 Pulsed rain Current a I M 17 Linear erating Factor 0.20 Linear erating Factor (PCB Mount) e 0.020 W/ C Single Pulse valanche Energy b E S 100 mj Repetitive valanche Current a I R 4.3 Repetitive valanche Energy a E R 2.5 mj Maximum Power issipation T C = 25 C 25 P Maximum Power issipation (PCB Mount) e T = 25 C 2.5 W Peak iode Recovery dv/dt c dv/dt 5.5 V/ns Operating Junction and Storage Temperature Range T J, T stg - 55 to 150 Soldering Recommendations (Peak Temperature) for 10 s 260 d C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V = 25 V, starting T J = 25 C, L = 8.1 mh, R g = 25 Ω, I S = 4.3 (see fig. 12). c. I S 5.6, di/dt 140 /μs, V V S, T J 150 C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply ocument Number: 91323 S10-1139-Rev. C, 17-May-10 1
THERML RESISTNCE RTINGS PRMETER SYMBOL MIN. TYP. MX. UNIT Maximum Junction-to-mbient R thj - - 110 Maximum Junction-to-mbient (PCB Mount) a R thj - - 50 Maximum Junction-to-Case (rain) R thjc - - 5.0 Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICTIONS T J = 25 C, unless otherwise noted PRMETER SYMBOL TEST CONITIONS MIN. TYP. MX. UNIT Static rain-source Breakdown Voltage V S V GS = 0 V, I = 250 μ 100 - - V V S Temperature Coefficient ΔV S /T J Reference to 25 C, I = 1 m - 0.12 - V/ C Gate-Source Threshold Voltage V GS(th) V S = V GS, I = - 250 μ 1.0-2.0 V Gate-Source Leakage I GSS V GS = ± 10 V - - ± 100 n V S = 100 V, V GS = 0 V - - 25 Zero Gate Voltage rain Current I SS V S = 80 V, V GS = 0 V, T J = 125 C - - 250 μ rain-source On-State Resistance R S(on) V GS = 5.0 V I = 2.6 b - - 0.54 V GS = 4.0 V I = 2.2 b - - 0.76 Ω Forward Transconductance g fs V S = 50 V, I = 2.6 2.3 - - S ynamic Input Capacitance C iss V GS = 0 V, - 250 - Output Capacitance C oss V S = 25 V, - 80 - pf Reverse Transfer Capacitance C rss f = 1.0 MHz, see fig. 5-15 - Total Gate Charge Q g - - 6.1 Gate-Source Charge Q gs I V GS = 5.0 V = 5.6, V S = 80 V, see fig. 6 and 13 b - - 2.0 nc Gate-rain Charge Q gd - - 3.3 Turn-On elay Time t d(on) - 9.3 - Rise Time t r V = 50 V, I = 5.6, - 47 - Turn-Off elay Time t d(off) R g = 12 Ω, R = 8.4 Ω, see fig. 10 b - 16 - ns Fall Time t f - 17 - Internal rain Inductance L Between lead, - 4.5-6 mm (0.25") from package and center of nh G Internal Source Inductance L S die contact c - 7.5 - rain-source Body iode Characteristics S C/W Continuous Source-rain iode Current I S MOSFET symbol - - 4.3 showing the G integral reverse Pulsed iode Forward Current a I SM p - n junction diode S - - 17 Body iode Voltage V S T J = 25 C, I S =4.3, V GS = 0 V b - - 2.5 V Body iode Reverse t rr - 100 130 ns Recovery Time T J = 25 C, I F = 5.6, di/dt = 100 /μs b Body iode Reverse Recovery Charge Q rr - 0.50 0.65 μc Forward Turn-On Time t on Intrinsic turn-on time is negligible (turn-on is dominated by L S and L ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. ocument Number: 91323 2 S10-1139-Rev. C, 17-May-10
TYPICL CHRCTERISTICS 25 C, unless otherwise noted Fig. 1 - Typical Output Characteristics, T C = 25 C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, T C = 150 C Fig. 4 - Normalized On-Resistance vs. Temperature ocument Number: 91323 S10-1139-Rev. C, 17-May-10 3
Fig. 5 - Typical Capacitance vs. rain-to-source Voltage Fig. 7 - Typical Source-rain iode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating rea ocument Number: 91323 4 S10-1139-Rev. C, 17-May-10
V S R R g V GS.U.T. - V 5.0 V Pulse width 1 µs uty factor 0.1 % Fig. 10a - Switching Time Test Circuit V S 90 % 10 % V GS t d(on) t r t d(off) t f Fig. 9 - Maximum rain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case ocument Number: 91323 S10-1139-Rev. C, 17-May-10 5
Vary t p to obtain required I S R g V S L.U.T I S - V V S t p V S V 5.0 V t p 0.01 Ω I S Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum valanche Energy vs. rain Current Current regulator Same type as.u.t. Q G 50 kω V GS 12 V 0.2 µf 0.3 µf Q GS Q G.U.T. V - S V G V GS Charge Fig. 13a - Basic Gate Charge Waveform 3 m Fig. 13b - Gate Charge Test Circuit I G I Current sampling resistors ocument Number: 91323 6 S10-1139-Rev. C, 17-May-10
Peak iode Recovery dv/dt Test Circuit.U.T. - Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer - - R g dv/dt controlled by R g river same type as.u.t. I S controlled by duty factor.u.t. - device under test - V river gate drive P.W. Period = P.W. Period V GS = 10 V a.u.t. l S waveform Reverse recovery current Body diode forward current di/dt.u.t. V S waveform iode recovery dv/dt V Re-applied voltage Inductor current Body diode forward drop Ripple 5 % I S Note a. V GS = 5 V for logic level devices Fig. 14 - For N-Channel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?91323. ocument Number: 91323 S10-1139-Rev. C, 17-May-10 7
Package Information TO-252 Case Outline E b3 C2 MILLIMETERS INCHES IM. MIN. MX. MIN. MX. L3 2.18 2.38 0.086 0.094 1-0.127-0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 H b3 4.95 5.46 0.195 0.215 C 0.46 0.61 0.018 0.024 C2 0.46 0.89 0.018 0.035 b e1 e b2 L4 L5 gage plane height (0.5 mm) C 1 L 5.97 6.22 0.235 0.245 1 4.10-0.161 - E 6.35 6.73 0.250 0.265 E1 4.32-0.170 - H 9.40 10.41 0.370 0.410 e 2.28 BSC 0.090 BSC e1 4.56 BSC 0.180 BSC L 1.40 1.78 0.055 0.070 L3 0.89 1.27 0.035 0.050 1 L4-1.02-0.040 L5 1.01 1.52 0.040 0.060 E1 ECN: T16-0236-Rev. P, 16-May-16 WG: 5347 Notes imension L3 is for reference only. Revision: 16-May-16 1 ocument Number: 71197 For technical questions, contact: pmostechsupport@vishay.com THIS OCUMENT IS SUBJECT TO CHNGE WITHOUT NOTICE. THE PROUCTS ESCRIBE HEREIN N THIS OCUMENT RE SUBJECT TO SPECIFIC ISCLIMERS, SET FORTH T /doc?91000
Package Information TO-251 (HIGH VOLTGE) 4 E1 Thermal P 1 4 (atum ) L1 5 L3 θ2 3 E 4 b4 C C 0.010 0.25 M C B L2 4 B 3 θ1 c2 C Seating plane B B L View - 3 x b2 3 x b 2 x e 0.010 0.25 M C B c 1 Lead tip Plating (c) 5 b1, b3 Base metal c1 5 (b, b2) Section B - B and C - C MILLIMETERS INCHES MILLIMETERS INCHES IM. MIN. MX. MIN. MX. IM. MIN. MX. MIN. MX. 2.18 2.39 0.086 0.094 1 5.21-0.205-1 0.89 1.14 0.035 0.045 E 6.35 6.73 0.250 0.265 b 0.64 0.89 0.025 0.035 E1 4.32-0.170 - b1 0.65 0.79 0.026 0.031 e 2.29 BSC 2.29 BSC b2 0.76 1.14 0.030 0.045 L 8.89 9.65 0.350 0.380 b3 0.76 1.04 0.030 0.041 L1 1.91 2.29 0.075 0.090 b4 4.95 5.46 0.195 0.215 L2 0.89 1.27 0.035 0.050 c 0.46 0.61 0.018 0.024 L3 1.14 1.52 0.045 0.060 c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15' c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35' 5.97 6.22 0.235 0.245 ECN: S-82111-Rev., 15-Sep-08 WG: 5968 Notes 1. imensioning and tolerancing per SME Y14.5M-1994. 2. imension are shown in inches and millimeters. 3. imension and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions b4, L2, E1 and 1. 5. Lead dimension uncontrolled in L3. 6. imension b1, b3 and c1 apply to base metal only. 7. Outline conforms to JEEC outline TO-251. ocument Number: 91362 Revision: 15-Sep-08 1
pplication Note 826 RECOMMENE MINIMUM PS FOR PK (TO-252) 0.224 (5.690) 0.090 (2.286) 0.087 (2.202) 0.420 (10.668) 0.243 (6.180) 0.180 (4.572) 0.055 (1.397) Recommended Minimum Pads imensions in Inches/(mm) Return to Index Return to Index PPLICTION NOTE ocument Number: 72594 Revision: 21-Jan-08 3
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