Programmable Dual RS-/ Transceiver Description The SP is a programmable RS- and/or transceiver IC. The SP contains four drivers and four receivers when selected in RS- mode; and two drivers and two receivers when selected in mode. The SP also contains a dual mode which has two RS- drivers/receivers plus one differential driver/receiver. The RS- transceivers can typically operate at 0kbps while adhering to the RS- specifications. The transceivers can operate up to 0Mbps while adhering to the specifications. The SP includes a self-test loopback mode where the driver outputs are internally configured to the receiver inputs. This allows for easy diagnostic serial port testing without using an external loopback plug. The RS- and drivers can be disabled (High-Z output) by controlling a set of four select pins. Typical Applications Circuit FEATURES 5V Only Operation Software Programmable RS- or Selection Four RS- Transceivers in RS- Mode Two Full-Duplex Transceivers in Mode Two RS- Transceivers and One Transceiver in Dual Mode Self-Testing Loopback Mode Full Driver Tri-State (Hi-Z) Control Ideal for RS- to conversion Ordering Information - Back Page 5V 5V 5V 9 0 8 C C- C C- SEL A SEL B 00KΩ 00KΩ TI RX RX RX 5 VCC SP 0 V V- SEL D RI RI 5 RI 8 RI RX 5 GND SEL C /
Absolute Maximum Ratings These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. V CC...V Input Voltages Logic... -0.5V to (V CC 0.5V) Drivers... -0.5V to (V CC 0.5V) Receivers...± @ 00mA Driver Outputs...±5V Maximum Data Rate... 8Mbps () Storage Temperature...-5 C to 50 C Power Dissipation Package Derating -pin WSOIC... 000mW -pin WSOIC Ѳ JA... 0 C/W NOTE:. Exceeding the maximum data rate of 8Mbps at TA = 85 C may permanently damage the device. Electrical Characteristics Limits are specified at T A = 5 C and V CC = 5. unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS Logic Inputs V IL 0.8 V V IH.0 V Logic Outputs V OL 0. V I OUT = -.ma V OH. V I OUT =.0mA RS- Driver DC Characteristics HIGH Level Output 5.0 5.0 V R L = kω, V IN = 0.8V LOW Level Output -5.0-5.0 V R L = kω, V IN =. Open Circuit Voltage -5 5 V Short Circuit Current ±00 ma V OUT = Power Off Impedance 00 Ω V CC =, V OUT = ±. AC Characteristics Slew Rate 0 V/µs R L = kω, C L = 50pF; V CC = 5., T A @ 5 C Transistion Time.5 µs R L = kω, C L = 500pF; between ±V, T A @ 5 C Maximum Data Rate 0 5 kbps R L = kω, C L = 500pF Propagation Delay t PHL 8 µs Measured from.5v of V IN to 50% of V OUT ; Propagation Delay t PLH 8 µs R L = kω RS- Receiver DC Characteristics HIGH Threshold..0 V LOW Threshold 0.8. V Receiver Open Circuit Bias.0 V Input Impedance 5 kω V IN = 5V to -5V /
Electrical Characteristics (Continued) Limits are specified at T A = 5 C and V CC = 5. unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS RS- Receiver (Continued) AC Characteristics Maximum Data Rate 0 5 kbps Propagation Delay t PHL 0.5 µs Propagation Delay t PLH 0.5 µs Driver DC Characteristics Open Circuit Voltage.0 V Differential Output.5 5.0 V R L = 5Ω, C L = 50pF Balance ±0. V V T - V T Common-Mode Output.0 V Output Current.0 ma R L = 5Ω Measured from 50% of V IN to.5v of V OUT Short Circuit Current ±50 ma Terminated in -V to AC Characteristics Maximum Data Rate 0 Mbps R L = 5Ω Maximum Data Rate 8 Mbps T A = 85 C () Output Transition Time 0 50 ns Rise/Fall time, 0% - 90% Propagation Delay t PHL 80 0 ns See Figures &, R DIFF = 5Ω, Propagation Delay t PLH 80 0 ns C L = C L = 00pF Driver Output Skew 0 0 ns Per Figure, t SKEW = t PHL - t PLH Enable Timing Enable Time (see Figures and 5) Enable to LOW 90 50 ns C L = 5pF, S Closed Enable to HIGH 90 50 ns C L = 5pF, S Closed Disable Time (see Figures and 5) Disable from LOW 80 0 ns C L = 5pF, S Closed Disable from HIGH 80 0 ns C L = 5pF, S Closed Receiver DC Characteristics Common Mode Range -.0 V Receiver Sensitivity ±0. ±0. V -V V CM V Input Impedance 5 kω -V V CM V AC Characteristics Maximum Data Rate 0 Mbps Maximum Data Rate 8 Mbps T A = 85 C () Propagation Delay t PHL 0 00 ns See Figures &, R DIFF = 5Ω, Propagation Delay t PLH 0 00 ns C L = C L = 00pF Differential Receiver Skew 0 0 ns t SKEW = t PHL - t PLH, R DIFF = 5Ω, C L = C L = 00pF /
Electrical Characteristics, Continued Limits are specified at T A = 5 C and V CC = 5. unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS Power Requirements Supply Voltage V CC.5 5.5 V Supply Current I CC No Load (T X Disabled) 0 5 ma SEL_A SEL_D = "000" No Load (RS- Mode) 5 0 ma SEL_A SEL_D = "0000" No Load ( Mode) 0 ma SEL_A SEL_D = "00" Environmental Operating Temperature Commercial (_C_) 0 0 ºC Industrial (_E_) -0 85 ºC Storage Temperature -5 50 ºC NOTE:. Exceeding the maximum data rate of 8Mbps at T A = 85 C may permanently damage the device. Receiver Input Graph RECEIVER.0mA -V -V Test Circuits -0.mA V V Unit Load Maximum Input Current Versus Voltage D V OD R DI A B R L C L A B RO R V OC C L 5pF Figure. Driver DC Test Load Circuit Figure. Driver / Receiver Timing Test Circuit Output Under Test C L 500Ω S V CC S Figure. Driver Timing Test Load # Circuit /
Switching Waveforms DRIVER INPUT DRIVER OUTPUT DIFFERENTIAL OUTPUT V A V B V B A V O V O V O /V O f MHz; t R 0ns; t F 0ns.5V.5V t PLH t PHL t DPLH t DPHL t R t F /V O t SKEW = t DPLH - t DPHL Figure. Driver Propagation Delays V DE 5V A, B.V V OL f = MHz; t R < 0ns; t F < 0ns.5V.5V t ZL t LZ Output normally LOW 0.5V A, B V OH.V t ZH Output normally HIGH 0.5V t HZ Figure 5. Driver Enable and Disable Times f = MHz; t R 0ns; t V F 0ns OD A B V INPUT OD V OH RECEIVER OUT.5V OUTPUT.5V V OL t PHL t PLH Figure. Receiver Propagation Delays 5/
Switching Waveforms (Continued) TTL Input TTL INPUT Driver Output A Driver Output B DRIVER OUTPUT Differential Output VA - VB Figure. Typical RS- Driver Output Figure 8. Typical Driver Output Pinout TI SEL_B VCC GND C V (VDD) C C C V (VSS) 5 8 9 0 SP 5 0 8 5 SEL_C SEL_A SEL_D RX RX RX RX RI RI RI RI Figure 9. SP Pinout /
/ Typical Operating Circuits SEL A C C- C C- SEL B 5V VCC 5 GND 8 9 0 V V- SEL C 0 5 5 RI RI TI RX RX 8 RI RI RX RX 00KΩ 00KΩ SEL D 5V 5V 5V GND VCC V V- SEL C RS- T T TI RI RI RI RI RX RX RX RX 5 8 0 C C- C C- 9 5 8 0 SEL B SEL A 5 R R 5KΩ 00KΩ RS- RS- RS- RS- RS- RS- RS- SEL D SP SP 00KΩ 00KΩ 00KΩ 5KΩ 5KΩ 5KΩ Figure 0. Typical Operating Circuits
Function Table for Select Pins A B C D Mode Function 0 0 0 0 RS- All four RS- drivers active 0 0 0 RS- All four RS- drivers tri-state 0 0 0 RS- All four RS- drivers tri-state 0 0 RS- RS- ( ch) Loopback 0 0 0 RS- / and T active RS-; tri-state 0 0 RS- / and T tri-state RS-; active 0 0 RS- / and T active RS-; tri-state 0 RS- / RS- ( ch) / ( ch) Loopback 0 0 0 / RS- active ; and T active RS- 0 0 / RS- tri-state ; active RS-; T active RS- 0 0 / RS- All and RS- drivers tri-state 0 / RS- ( ch) / RS- ( ch) Loopback 0 0 and active 0 tri-state ; active 0 active ; tri-state ( ch) Loopback Table. Mode Function Table (Refer to Control Logic Confirmations for Block Diagrams) Theory of Operation The SP is made up of four separate circuit blocks: the charge pump, drivers, receivers, and decoder. Each of these circuit blocks is described in more detail below. Charge-Pump The charge pump is an Exarpatented design (U.S. 5,0,95) and uses a unique approach compared to older less efficient designs. The charge pump still requires four external capacitors, but uses a four-phase shifting technique to attain symmetrical power supplies. Figure 5(a) shows the waveform found on the positive side of capacitor C, and Figure 5(b) shows the negative side of capacitor C. There is a free-running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. Phase : V SS Charge Storage During this phase of the clock cycle, the positive side of capacitors C and C are initially charged to 5V. C is then switched to ground and charge on C is transferred to C. Since C is connected to 5V, the voltage potential across capacitor C is now. Phase : V SS Transfer Phase two of the clock connects the negative terminal of C to the V SS storage capacitor and the positive terminal of C to ground, and transfers the generated - to C. Simultaneously, the positive side of capacitor C is switched to 5V and the negative side is connected to ground. Phase : V DD Charge Storage The third phase of the clock is identical to the first phase; the charge transferred in C produces -5V in the negative terminal of C, which is applied to the negative side of capacitor C. Since C is at 5V, the voltage potential across C is. Phase : V DD Transfer The fourth phase of the clock connects the negative terminal of C to ground and transfers the generated across C to C, the V DD storage capacitor. Again, simultaneously with this, the positive side of capacitor C is switched to 5V and the negative side is connected to ground, and the cycle begins again. Since both V and V are separately generated from V CC in a noload condition, V and V will be symmetrical. Older charge pump approaches that generate V from V will show a decrease in the magnitude of V compared to V due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 5kHz. The external capacitors must be with a V breakdown rating. 8/
V CC = 5V V CC = 5V 5V C C C V DD Storage Capacitor V SS Storage Capacitor C C C V DD Storage Capacitor V SS Storage Capacitor 5V 5V C C Figure. Charge Pump Phase Figure. Charge Pump Phase V CC = 5V V CC = 5V 5V C C C V DD Storage Capacitor V SS Storage Capacitor C C C V DD Storage Capacitor V SS Storage Capacitor 5V 5V C C Figure. Charge Pump Phase Figure. Charge Pump Phase a) C GND GND b) C- - Figure 5. Charge Pump Waveforms 9/
External Power Supplies For applications that do not require 5V only, external supplies can be applied at the V and V pins. The value of the external supply voltages must be no greater than ±. The current drain for the ± supplies is used for RS-. For the RS- driver the current requirement will be.5ma per driver. The external power supplies should provide a power supply sequence of:, then 5V, followed by -. Drivers The SP has four independent RS- single-ended drivers and two differential drivers. Control for the mode selection is done via a fourbit control word. The drivers are pre-arranged such that for each mode of operation the relative position and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the requirements of clock, data, and control line signal levels. Unused driver inputs can be left floating; however, to ensure a desired state with no input signal, pullup resistors to 5V or pull down resistors to ground are suggested. Since the driver inputs are both TTL or CMOS compatible, any value resistor less than 00kΩ will suffice. When in RS- mode, the single-ended RS- drivers produce compliant RS-E and ITU V. signals. Each of the four drivers output single-ended bipolar signals in excess of ±5V with a full load of kω and 500pF applied as specified. These drivers can also operate at least 0kbps. When programmed to mode, the differential RS- 85 drivers produce complaint signals. Each RS- 85 driver outputs a unipolar signal on each output pin with a magnitude of at least.5v while loaded with a worst case of 5Ω between the driver s two output pins. The signal levels and drive capability of the drivers allow the drivers to also comply with RS- levels. The transmission rate for the differential drivers is 0Mbps. The RS- receiver has a singleended input with a threshold of 0.8V to.v. The RS- receiver has an operating voltage range of ±5V and can receive signals up to 0kbps. RS- receivers are used in RS- mode for all signal types include data, clock, and control lines of the RS- serial port. The differential receiver has an input impedance of 5kΩ and a differential threshold of ±00mV. Since the characteristics of an RS- receiver are actually subsets of, the receivers for RS- requirements are identical to the receivers. All of the differential receivers can receive data up to 0Mbps. Select Mode Pins Similar to our SP500 family of multiprotocol products, the SP has the ability to change the configuration of the drivers and receivers via a bit switch. Referring to Table ; RS- mode, mode, or two different combinations of RS-/ can be configured using the SEL_A and SEL_B pins. The drivers can be put into tri-state mode by using the SEL_C and SEL_D pins. All receivers remain active during any tri-state condition of the drivers. Loopback Mode Loopback is invoked by asserting xx into the select pins. In RS- / or / RS- loopback mode, the RS- driver outputs loop back into the RS- receiver inputs and the differential driver loops back into the receiver. During loopback, the driver outputs and receiver inputs are disconnected from the outside world. The driver outputs are in tri-state and the receiver inputs are disabled. The input impedance of the receivers during loopback is approximately 5kΩ to ground. Receivers The SP has four single-ended receivers when programmed for RS- mode and two differential receivers when programmed for mode. Control for the mode selection is done via a bit control word, as in the drivers. As the operating mode of the receivers is changed, the electrical characteristics will change to support the requirements of the appropriate serial standard. Unused receiver inputs can be left floating without causing oscillation. To ensure a desired state of the receiver output, a pullup resistor of 00kΩ to 5V should be connected to the inverting input for a logic low, or the noninverting input for a logic high. For single-ended receivers, a pulldown resistor to ground of 5kΩ is internally connected, which will ensure a logic high output. 0/
SP Control Logic Configuration (Refer to Table) SEL A 0 0 0 0 0 0 SEL B 0 0 0 0 0 0 SEL C 0 0 0 0 0 0 0 0 SEL D 0 0 0 0 0 0 0 0 T T TI T TI T RX RI 5 RX RI 5 RX RI 5 RI RX RI 5 RI 0 RX R RI RX RI RX R RI 8 0 RX R RI RX RI RI 8 RX RI RX R RI 8 RX RI RI 8 SP Loopback (Refer to Table) SEL A 0 0 SEL B 0 0 SEL C SEL D T T TI T TI T RX RI 5 0 RX RI R RX RI RX RI 8 R RX RI 5 0 RX R RI RI RX RI 8 RX RI 5 RI RX RI RX R RI 8 RX RX RI RI RI RI 5 8 /
Mechanical Dimensions WSOIC Top View Side View Front View Drawing No: POD-000000 Revision: B /
Ordering Information () Part Number Operating Temperature Range Lead-Free Package Packaging Method SPCT-L SPCT-L/TR SPET-L SPET-L/TR 0 C to 0 C -0 C to 85 C Yes () -pin WSOIC Tube Reel Tube Reel NOTE:. Refer to www.exar.com/sp for most up-to-date Ordering Information.. Visit www.exar.com for additional information on Environmental Rating. Revision History Revision Date Description 0/0/05 -- Legacy Sipex Datasheet 0//0.0.0 0//8.0. Convert to Exar Format. Add Revision History table. Change revision to.0.0. Add Note and change maximum data rate at 85C. Update ABS Max Rating table. Update to MaxLinear logo. Update format and ordering information table. Driver Enable Timing moved on page. Corporate Headquarters: 59 La Place Court Suite 00 Carlsbad, CA 9008 Tel.: (0) 9-0 Fax: (0) -8598 www.maxlinear.com High Performance Analog: 00 Rincon Circle San Jose, CA 95 Tel.: (9) 5-00 Fax: (9) 5-0 Email: serialtechsupport@exar.com www.exar.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc.. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc. Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of MaxLinear, Inc. is adequately protected under the circumstances. MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property. Company and product names may be registered trademarks or trademarks of the respective owners with which they are associated. 00-08 MaxLinear, Inc. All rights reserved SP_DS_08 /