N-CHANNEL 100V - 0.009 Ω - 140A MAX247 MESH OVERLAY POWER MOSFET STY140NS10 100V <0.011Ω 140A TYPICAL R DS (on) = 0.009Ω STANDARD THRESHOLD DRIVE 100% AVALANCHE TESTED DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS HIGH CURRENT, HIGH SWITCHING SPEED SWITCH MODE POWER SUPPLY (SMPS) August 2001. TYPE V DSS R DS(on) I D ABSOLUTE MAXIMUM RATINGS ( ) Pulse width limited by safe operating area. Max247 1 2 3 INTERNAL SCHEMATIC DIAGRAM Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 100 V V DGR Drain-gate Voltage (R GS = 20 kω) 100 V V GS Gate- source Voltage ± 20 V I D Drain Current (continuos) at T C = 25 C 140 A I D Drain Current (continuos) at T C = 100 C 99 A I DM ( ) Drain Current (pulsed) 560 A P tot Total Dissipation at T C = 25 C 450 W Derating Factor 3 W/ C E AS (1) Single Pulse Avalanche Energy 2900 mj dv/dt (2) Peak Diode Recovery voltage slope 5 V/ T stg Storage Temperature -55 to 175 C T j Operating Junction Temperature -55 to 175 C (1) Starting T j = 25 o C, I D = 70A, V DD= 50V (2) I SD 140A, di/dt 200A/µs, V DD V (BR)DSS, T j T JMAX. 1/8
THERMAL DATA Rthj-case Rthj-amb T j Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max Typ 0.33 30 300 C/W C/W C ELECTRICAL CHARACTERISTICS (T case = 25 C unless otherwise specified) OFF V (BR)DSS ON (1) I DSS I GSS DYNAMIC Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (V DS = 0) I D = 250 µa, V GS = 0 100 V V DS = Max Rating V DS = Max Rating T C = 125 C 1 10 V GS = ± 20V ±100 na V GS(th) Gate Threshold Voltage V DS = V GS I D = 250 µa 2 4 V R DS(on) Static Drain-source On Resistance V GS = 10 V I D = 70 A 0.009 0.011 Ω g fs (*) Forward Traconductance V DS = 20 V I D = 70 A 50 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Trafer Capacitance V DS = 25V, f = 1 MHz, V GS = 0 12600 2100 690 µa µa pf pf pf 2/8
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON t d(on) t r Turn-on Delay Time Rise Time V DD = 50 V I D = 70 A R G = 4.7 Ω V GS = 10 V (Resistive Load, Figure 1) 40 150 Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =50V I D =140A V GS =10V (see test circuit, Figure 2) 450 70 170 600 nc nc nc SWITCHING OFF t d(off) t f Turn-off Delay Time Fall Time SOURCE DRAIN DIODE (*) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. ( )Pulse width limited by safe operating area. V DD = 50 V I D = 70 A R G = 4.7Ω, V GS = 10 V (Resistive Load, Figure 1) I SD I SDM ( ) Source-drain Current Source-drain Current (pulsed) V SD (*) Forward On Voltage I SD = 140 A V GS = 0 1.5 V t rr Q rr I RRM Safe Operating Area Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 140 A di/dt = 100A/µs V r = 20 V T j = 150 C (Inductive Load, Figure 3) Thermal Impedance 465 270 140 560 275 2 15 A A µc A 3/8
Output Characteristics Trafer Characteristics Traconductance Gate Charge vs Gate-source Voltage Static Drain-source On Resistance Capacitance Variatio 4/8
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics.. Normalized Breakdown Voltage vs Temperature 5/8
Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 2: Gate Charge test Circuit Fig. 3: Test Circuit For Diode Recovery Behaviour 6/8
Max247 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q 7/8
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