A New Approach for Op-amp based VCO Design Using 0.18um CMOS Technology

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International Journal of Industrial Electronics and Control. ISSN 0974-2220 Volume 6, Number 1 (2014), pp. 1-5 International Research Publication House http://www.irphouse.com A New Approach for Op-amp based VCO Design Using 0.18um CMOS Technology 1 Mr. Ashutosh Gupta, 2 Mr. Jaikaran Singh, 3 Mr. Sanjay Rathore 1 M.tech Pursuing department of electronics, S.S.S.I.S.T, Bhopal, India 2 H.O.D department of electronics, S.S.S.U.T, M.S, Bhopal, India 3 Associate Professor Department of physics, S.S.S.U.T, M.S, Bhopal, India Abstract A CMOS voltage controlled Op-Amp oscillator based on N-stage single-ended chain of different inverter types is described in this paper. This paper describes a performance and comparison of a ring oscillator based VCO and an Op-Amp based oscillator based VCO. The VCO is intended to operate in a op-amp based VCO to generate local oscillator frequency for an system. An oscillator topology an improved phase noise performance is proposed in this paper. It exploits the time-variant phase noise model with insights into the phase noise conversion mechanisms. The paper presents a new circuit technique intended to improve the voltage- controlled oscillators (VCO) designs. It introduces a new, extremely simple, sinusoidal oscillator based on 0.18 um BSIM Technology Op-amps. The circuit employs only four components, two internally compensated op-amp, one resistor and a grounded capacitor, and can generate sinusoidal oscillations of frequencies up to the gain bandwidth product of the op-amps. With some modifications, using an additional op-amp or two analogue multipliers, the circuit can be readily converted into a VCO. We can also NMOS implementation for these. Although simulations indicated that future technology nodes could perform the necessary computation with full-swing static logic by using microwind software. Keywords phase noise, voltage-controlled oscillator (VCO). ring oscillator, CMOS, Operational amplifiers I. INTRODUCTION A voltage controlled oscillator (VCO) is one of the most important basic building blocks in analog and digital circuits [1]-[6]. There are many different implementations of VCOs. One of them is a oscillator based VCO, which is commonly used in the

2 Mr. Ashutosh Gupta et al clock generation subsystem. The main reason of oscillator popularity is a direct consequence of its easy integration. Due to their integrated nature, oscillators have become an essential building block in many digital and communication systems. The Several novel control strategies have been investigated in order to improve the operation performance, i.e., the vector oriented control (VOC) [3], direct power control [4], and predictive current control [5]. The traditional class-b oscillator is the most prevalent architecture due its simplicity and robustness. However, its phase noise and power efficiency performance drops dramatically just by replacing the ideal current source with a real one. Indeed, the traditional oscillator reaches its best performance for the oscillation amplitude of near supply voltage V DD. II. CMOS RING VCO A ring oscillator is comprised of a number of delay stages, with the output of the last stage fed back to the input of the first. To achieve oscillation, the ring must provide a phase shift of 2π and have unity voltage gain at the oscillation frequency. Each delay stage must provide a phase shift of π =N, where N is the number of delay stages. The remaining phase shift is provided by a dc inversion [7]. This means that for an oscillator with single-ended delay stages, an odd number of stages are necessary for the dc inversion. If differential delay stages are used, the ring can have an even number of stages if the feedback lines are swapped. Examples of these two circuits are shown in Fig. 1. Fig. 1. Ring oscillator types: (a) single-ended and (b) differential III. CMOS VCO REVIEW A Design Technique for low-voltage voltage-controlled oscillator (VCO) with a wide tuning range and low sensitivity to process, voltage, and temperature variations [7].For wide tuning range, a switched tuning scheme is employed coupled with voltageboosting techniques in a manner that improves the quality factor and tuning range of a switched capacitor array. To minimize the design overhead required for a robust VCO, an adaptive body-biasing technique is proposed, which relaxes the start-up constraint and increases the VCO s immunity to variations. The proposed VCO is implemented in 0.18µm CMOS technology and operates at 2.4 GHz. It achieves phase noise of -117 dbc/hz at 1MHz offset and a tuning range 20% while consuming 0.365mW of power. The figure-of-merit with the tuning rangeis-197dbc/hz, which is the lowest among recent state-of-the-art low-voltage VCOs.[7] A circuit topology suitable for low-power Colpitts voltage-controlled oscillators (LCVCOs) [8] by

A New Approach for Op-amp based VCO Design 3 employing the proposed voltage-to-current positive-feedback network; the required trans conductance for VCO start up can be reduced, leading to the minimized dc power for sustaining VCO oscillation. Moreover, the Q factor enhanced varactor is used in this VCO design for phase noise improvement. Based on the proposed architecture, the fabricated VCO in standard 0.18 µ m CMOS exhibits a 3.58% tuning range. Operating at 1.35V supply voltage, the VCO core consumes 3.3mW dc power. The measured phase noise is -110.82dBc/Hz at 1 MHz offset from 18.9 GHz oscillation frequency. Compared with the recently published K-band 0.18µm CMOS VCOs, it is observed that the proposed Colpitts VCO exhibits comparable circuit performance under low dc power consumption.[8] IV. COMPARATIVE STUDY V. COMPARISON BETWEEN RING VCO AND OP-AMP BASED VCO Tuning range: In RING VCO Tuning range is very wide due to current variation while in op-amp based VCO it is narrow, proportional to the square root of varactor tuning. Phase noise: In RING VCO phase noise is very poor, while in op-amp based VCO it is very good, filtering inherent to LC tank. Power consumption: In RING VCO Power consumption can vary greatly. Higher power is needed for good phase noise. While in op-amp based VCO power consumption is greater than ring VCO with equivalent frequency coverage but consumes lower power for same phase noise. Layout: In RING VCO area is small while op-amp based VCO requires large area due to the requirement of inductor. Also it requires a lot of characterization, poor integration and more complicated to design.

4 Mr. Ashutosh Gupta et al VI. PROPOSED METHEDOLOGY In 0.18µm technology, design VCO using CMOS differential voltage-controlled oscillator for finding the area efficient CMOS VCO to reduce the overall area of opamp based VCO must up to 3 GHz for tuning frequency. Also to avoid large area, the W/L ratio of transistor can be varied to minimize the severity of problem. Implementation can be done by the available tools like input voltage, output voltage, V DD and V SS. Fig 2: Op-amp design Fig 3. Op-amp based VCO An extremely simple sine-wave oscillator configuration is introduced which uses the op-amp compensation poles in the design and employs only two external passive components (a resistor and a grounded capacitor). The proposed circuit can generate sinusoidal oscillations up to a frequency nearly equal to the geometric mean of the two 0.18um CMOS technology op-amps used. I done some modifications by using an additional op-amp or analogue multipliers, the oscillations can be made voltagecontrollable. Using a 0.18 um CMOS op-amp, MOS capacitor and a CMOS resistor, a CMOS-compatible version oscillator is also possible. Now I am going to implement a VCO with the help of 0.18 um NMOS based CMOS technology. CONCLUSION The VCO is intended to operate in a op-amp based VCO to generate local oscillator frequency for an acquisition system. An oscillator topology demonstrating an improved phase noise performance is proposed in this paper. It exploits the timevariant phase noise model with insights into the phase noise conversion mechanisms.. I done some modifications by using an additional op-amp or analogue multipliers, the oscillations can be made voltage-controllable. Using a 0.18 um CMOS op-amp, MOS

A New Approach for Op-amp based VCO Design 5 capacitor and a CMOS resistor, a CMOS-compatible version oscillator is also possible. REFERENCES [1] G.A. Rincon-Mora, P.E. Allen, A low-voltage, low quiescent current, low drop-out regulator, IEEE J. Solid-State circuits, 33(1), pp. 36 44, January 1998. [2] Cornel Stanescu, Buffer stage for fast response LDO, Proceedings of CAS 2003 International Semiconductor Conference, pp. 357 360, 2003. [3] Cornel Stanescu, Radu Iacob, Cristian Dinca, Cristi Caracas, Ovidiu Profirescu, 0.5A FAST CMOS LDO, Proceedings of CAS 2009 International Semiconductor Conference, pp. 473 476, Oct. 2009. [4] Akira Yamazaki, Kouhei Yamada, Satishi Sugahara, A Frequency Compensation Technique for Variable Output Low Dropout Regulators, Proceedings of APCCAS 2006 IEEE Asia Pacific Conference on Circuits and Systems, pp. 1595 1598, Dec. 2006. [5] Mohamed El-Nozahi, Ahmed Amer, Joselyn Torres, Kamran Entesari, Edgar Sanchez-Sinecio, High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique, IEEE J. Solid-State circuits, 45(3), pp. 565 577, March 2012. [6] C. H. Park, O. Kim, B. Kim, A 1.8-GHz self-calibrated phase locked loop with precise I/Q matching, IEEE J. Solid-State Circuits, vol. 36, pp. 777 783, May 2001. [7] L. Sun and T. A. Kwasniewski, A 1.25-GHz 0.35-μm monolithic CMOS PLL based on a multiphase ring oscillator, IEEE J. Solid-State Circuits, vol. 36, pp. 910 916, June 2001. [8] J. Savoj and B. Razavi, A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector, IEEE J. Solid-State Circuits, vol. 36, pp. 761 767, May 2001. [9] C. K. K. Yang, R. Farjad Rad, M. A. Horowitz, A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling, IEEE J. Solid- State Circuits, vol. 33, pp. 713 722, May 1998. [10] M. Alioto, G. Palumbo, Oscillation frequency in CML and ESCL ring oscillators, IEEE Trans. Circuits Syst. I, vol. 48, pp. 210 214, Feb.2001. [11] B. Razavi, A 2-GHz 1.6-mW phase-locked loop, IEEE J. Solid-State Circuits, vol. 32, pp. 730 735, May 1997. [12] S. Docking, M. Sachdev, A Method to Derive an Equation for the Oscillation Frequency of a Ring Oscillator, IEEE Trans. on Circuits and Systems - I: Fundamental Theory and Applications, vol. 50, No. 2, pp. 259-264, February 2003. [13] G. Jovanović, M. Stojčev, Current starved delay element with symmetric load, International Journal of Electronics, pp. 167-175, Vol. 93, No 3, March 2006.

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