PWM Controller General Description The includes all necessary function to build an eas y and cost effective solution for low power supplies to meet the international power conservation requirements. offers complete protection coverage with automatic self-recovery feature including Cycle-by-Cycle current limiting (OCP), over voltage protection (OVP), over temperature protection (OTP), soft-start and Burst mode operation. Excellent EMI performance is achieved with frequency modulation. The device provides an advanced platform well suited for low standby-power and cost-effective flyback converters. Applications DVB Power Supplies Power Adapter Battery Charger Open-frame SMPS Package/Order Information Order codes Package SOT23-6 Features Proprietary Frequency Jitter for EMI Green Mode Control Audio Noise Free Internal Slope Compensation Owning soft start-up function Good Protection Coverage With Auto Self- Recovery Line Input Compensated Cycle-by-Cycle Over-current Threshold Setting (OCP) Overload Protection (OLP) VDD Over Voltage Protection (OVP) Over Temperature Protection (OTP) Typical Application 1
Pin Definitions Table 1. Pin Definitions Pin Number Pin Name Pin Function Description 18 GND Ground 27 FB 3(5) TS Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and CS pin input. Over temperature sense pin. Connected through a NTC resistor to ground. 4 CS Current sense input pin. Connected to MOSFET current sensing resistor node. 5(2) VDD Power supply pin. 6 (1) GATE Totem-pole gate drive output for the power MOSFET. Note: Pin number (*) is DIP8 definitions Absolute Maximum Ratings Supply voltage Pin VDD...-0.3~28V FB Input Voltage. -0.3~7V SENSE Input Voltage. -0.3~7V TS Input Voltage. -0.3~7V VDD Clamp Current... 10mA VDD Clamp Voltage 32V Electrostatic Discharge Human bady mode. 2000V Electrostatic Discharge Machine Mode...200V Junction Temperature.. -40~150 Storage Temperature Range. -55~150 Lead Temperature (Soldering, 10secs) 260 Recommended Operating Condition VDD Voltage 12V to 25V Operating Ambient Temperature. -20 C to + 85 C 2
Electrical Characteristics ( T J =25 C, VDD=18V, unless otherwise specified) Table 2. Control section SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT OSCILLATOR section Fosc Normal Oscillation Frequency VDD=14V, FB=5V, CS=0V 60 65 71 KHZ f_temp Frequency Temperature Stability 1 % f_vdd Frequency Voltage Stability 1 % Fosc_BM Burst Mode Base Frequency 25 KHZ f_osc Frequency Modulation range /Base frequency 4 % f_jitter Jitter Frequency 32 HZ FB section AVCS PWM Input Gain VFB /Vcs 1.8 V/V VFB_Open VFB Open Loop Voltage 4.1 V IFB_ShoTS FB pin shots circuit current Short FB pin to GND and measure current 0.4 ma Vref_green The threshold enter green mode 1.95 V Vref_Burst_H Vref_Burst_L The threshold exit burst mode 1.2 V The threshold enter burst mode 1.1 V VTH_PL Power Limiting FB Threshold Voltage 3.6 V TD_PL Power limiting Debounce Time 70 88 105 msec ZFB_IN Input Impedance 16 Kohm DC_MAX Maximum Duty Cycle VDD=14V, FB=3V, CS=0V 70 80 90 % CS section T_blanking Leading edge blanking time 270 500 ns ZSENSE_IN Input Impedance 40 Kohm 3
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT TD_OC VTH_OC Over Current Detection and Control Delay Over Current Threshold Voltage at zero Duty Cycle 120 nsec 0.75 V t SS Soft-start up time 8 ms GATE section VOL Output Low Level VDD = 14V, Io = 5mA 0.5 V VOH Output High Level VDD = 14V, Io = 20mA 9.5 V V_Clamp Output Clamp Voltage Level 15 V T_r Output Rising Time VDD = 12V, CL = 1nf 160 nsec T_f Output Falling Time VDD = 12V, CL = 1nf 90 nsec SUPPLY section I_VDD_Start VDD Start up Current VDD =14.5V, Measure Leakage 5 20 ua current into VDD I_VDD_Ops Operation Current VFB=3V 1.8 ma UVLO(down) UVLO(up) VDD Under Voltage Lockout Enter VDD Under Voltage Lockout Exit (Recovery) 8 9 9.5 V 14.3 15.5 16.3 V VDD_Clamp VDD Zener Clamp Voltage IVDD = 5 ma 30 V VDD_Ovp Over voltage protection voltage CS=0V,FB=3V 26 28 29 V VDD_Pull Pull-up PMOS active 13 V TS section I TS Output current of TS pin 95 100 105 ua Vth_otp Threshold voltage for OTP 0.96 1 1.04 V Td_otp OTP debounce time 6 cycle VTS_open Float voltage at TS pin 2.65 V VTS_ovp External OVP threshold voltage 4 V 4
Typical circuit VOUT L N EMI Filter GND GND FB TS GATE VDD CS Functional Description 1. Overview description The includes all necessary function to build an eas y and cost effective solution for low power supplies to meet the international power conservation requirements. 2. Start-up current Startup current of is designed to be very low so that VDD could be charged up above UVLO (up) threshold level and device starts up quickly. Also a large value startup resistor can be used to minimize the power loss. 3. Green Mode Operation At light load or no load condition, the switch loss become the major loss of the power supply, to reduce the power wasted in such conditions, based on a special designed voltage controlled oscillator, green mode operation of the power supply can be achieved by using. The controller will judge the load condition base on the voltage of FB pin. In light load the FB voltage will decrease, when VFB is lower than a set threshold voltage, the operating frequency of the power supply begin to decrease, the minimum frequency is set to above 22kHZ to avoid audio noise. When V FB decrease further, the power supply will enter into burst mode operation to decrease the power consumed at no load condition. 4. Built-in Slope Compensation The sensed voltage across the CS resistor is used for PWM control, and pulse by pulse current limit, Built-in slope 5
compensation circuit adds a voltage ramp onto the current sense input voltage. This greatly improves the close loop stability and prevents the sub-harmonic oscillation of peak current mode operation. 5. Gate Driver The output stage of is a fast totem pole gate driver. Dead time has been added to minimize heat dissipation, increases efficiency and enhances reliability. The output driver is clamped by an internal 15V Zener diode in order to protect power MOSFET transistors against undesirable gate over voltage. A soft driving waveform is implemented to minimize EMI. 6. Frequency Jitter The frequency jitter function is integrated in the controller, the jitter is modulated by a periodic signal, the modulate signal frequency is much smaller than the oscillator frequency, By this waythe EMI noise has a wider spectrum with lower amplitudes. 7. Over Temperature Protection A NTC resistor in series with a regular resistor should connect between TS and GND for temperature sensing and protection. NTC resistor value becomes lower when the ambient temperature rises. With the fixed internal current flowing through the resistors, the voltage at TS pin becomes lower at high temperature. The internal OTP circuit is triggered and shutdown the MOSFET when the sensed input voltage is lower than Vth_otp. 10. Protection To increase the reliability of power supply system, many protection functions is integrated in this controller, including Cycle-by-Cycle current limiting (OCP), Over Load Protection (OLP) and over voltage clamp, Under Voltage Lockout on VDD (UVLO). At overload condition when FB input voltage exceeds power limit threshold value for more than TD_PL (power limit debounce time), the controller reacts to shut down the output power MOSFET. Device restarts when VDD voltage drops below UVLO limit. VDD is supplied by transformer auxiliary winding output. It is clamped when VDD is higher than threshold value. The power MOSFET is shut down when VDD drops below UVLO limit and device enters power on start-up sequence thereafter. 6
Package Dimensions Table 3. SOT23 mechanical data Size Size Min(mm) Max(mm) symbol symbol Min(mm) Max(mm) A 1.050 1.250 E1 2.650 2.950 A1 0.000 0.100 e 0.950TYP A2 1.050 1.150 e1 1.800 2.000 b 0.300 0.400 L 0.700REF c 0.100 0.200 L1 0.300 0.600 D 2.820 3.020 8ºTYP E 1.500 1.700 Figure1. Package dimensions TOP MARK XXXXX Note: XXXX:Internal Code Package SOT23-6 7