S-9xxxA Series www.ablicinc.com FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) ABLIC Inc., 22 Rev.._2 The S-9xxxA Series, developed by using CMOS technology, is a voltage detector IC for automotive 25C operation. The detection voltage is fixed internally with an accuracy of 3.% (V DET = 2.4 V). The release voltage is set to the same value as the detection voltage, since there is no hysteresis width. It operates with current consumption of 27 na typ. The release signal can be delayed by setting a capacitor externally, and the delay time accuracy at Ta = 25C is 5%. The operation temperature range is Ta = 4 C to 25 C. Two output forms Nch open-drain and CMOS output are available. Compared with conventional CMOS voltage detectors, the S-9xxxA Series has super-low current consumption and small packages. Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the purpose, contact to ABLIC Inc. is indispensable. Features Detection voltage:.2 V to 4.6 V ( V step) Detection voltage accuracy: 3.% (2.4 V V DET 4.6 V, Ta = 4 C to 25 C) (2.5% 2 mv) (.2 V V DET 2.4 V, Ta = 4 C to 25 C) Current consumption: 27 na typ. (.2 V V DET 2.3 V) Operation voltage range:.6 V to. V (CMOS output product) Delay time accuracy: 5% (C D = 4.7 nf, Ta = 25C) Output form: Nch open-drain output (active "L") CMOS output (active "L") Operation temperature range: Ta = 4 C to 25 C Lead-free (Sn %), halogen-free AEC-Q qualified * *. Contact our sales office for details. Applications For automotive use (engine, transmission, suspension, ABS, related-devices for EV / HEV / PHEV, etc.) Packages SOT-23-5 SC-82AB
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Block Diagrams. Nch open-drain output product VDD * Delay circuit * V REF * VSS *. Parasitic diode CD Figure 2. CMOS output product VDD * Delay circuit * V REF * * VSS *. Parasitic diode CD Figure 2 2
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series AEC-Q Qualified This IC supports AEC-Q for operation temperature grade. Contact our sales office for details of AEC-Q reliability specification. Product Name Structure Users can select the output form, the detection voltage value and the package type for the S-9xxxA Series. Refer to ". Product name" regarding the contents of product name, "2. Packages" regarding the package drawings.. Product name S-9 x xx A - xxxx U *. Refer to the tape drawing. 2. Packages Environmental code U: Lead-free (Sn %), halogen-free Package abbreviation and IC packing specifications * M5T2: SOT-23-5, Tape N4T2: SC-82AB, Tape Operation temperature A: Ta = 4C to 25C Detection voltage value 2 to 46 (e.g., when the detection voltage is.2 V, it is expressed as 2.) Output form N: Nch open-drain output (active "L") C: CMOS output (active "L") Table Package Drawing Codes Package Name Dimension Tape Reel SOT-23-5 MP5-A-P-SD MP5-A-C-SD MP5-A-R-SD SC-82AB NP4-A-P-SD NP4-A-C-SD NP4-A-C-S NP4-A-R-SD 3
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Pin Configurations. SOT-23-5 Top view 5 4 2 3 Table 2 Pin No. Symbol Description Voltage detection output pin 2 VDD Input voltage pin 3 VSS GND pin 4 NC * No connection 5 CD Connection pin for delay capacitor *. The NC pin is electrically open. The NC pin can be connected to the VDD pin or the VSS pin. Figure 3 2. SC-82AB Top view 4 3 Table 3 Pin No. Symbol Description VSS GND pin 2 VDD Input voltage pin 3 CD Connection pin for delay capacitor 4 Voltage detection output pin 2 Figure 4 4
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series Absolute Maximum Ratings Table 4 (Ta = 4 C to 25 C unless otherwise specified) Item Symbol Absolute Maximum Rating Unit Power supply voltage V SS 2 V CD pin input voltage V CD V SS.3 to.3 V Output voltage Nch open-drain output product V SS.3 to 2. V V CMOS output product V SS.3 to.3 V Output current I 5 ma Power dissipation SOT-23-5 6 * mw P D SC-82AB 35 * mw Operation ambient temperature T opr 4 to 25 C Storage temperature T stg 4 to 5 C *. When mounted on board [Mounted board] () Board size: 4.3 mm 76.2 mm t.6 mm (2) Name: JEDEC STANDARD5-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 5
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Electrical Characteristics. Nch open-drain output product Table 5 (Ta = 4 C to 25 C unless otherwise specified) Test Item Symbol Condition Min. Typ. Max. Unit Circuit Detection voltage * V DET.2 V V DET 2.4 V V DET(S).975.2 V DET(S) V DET(S).25.2 V 2.4 V V DET 4.6 V V DET(S).97 V DET(S) V DET(S).3 V.2 V V DET 2.3 V.27.8 A 2 Current consumption I SS = V DET.6 V 2.3 V V DET 3.6 V.42 2.2 A 2 3.6 V V DET 4.6 V.39 2.2 A 2 Operation voltage.8. V Output current I Output transistor Nch V DS *2 =.5 V =.7 V S-9N2 to 4 =.2 V S-9N5 to 46 = 2.4 V S-9N27 to 46 4.4 ma 3.68.33 ma 3.2 2.39 ma 3 Leakage current I LEAK Output transistor Nch 2.4 A 3 =. V, V =. V Delay time t D C D = 4.7 nf. 26. 57. ms 4 *. V DET : Actual detection voltage value, V DET(S) : Set detection voltage value (The center value of the detection voltage range.) *2. V DS : Drain-to-source voltage of the output transistor 6
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series 2. CMOS output product Table 6 (Ta = 4 C to 25 C unless otherwise specified) Test Item Symbol Condition Min. Typ. Max. Unit Circuit Detection voltage * V DET.2 V V DET 2.4 V 2.4 V V DET 4.6 V V DET(S).975.2 V DET(S).97 V DET(S) V DET(S).25.2 V DET(S) V DET(S).3 V V.2 V V DET 2.3 V.27.8 A 2 Current consumption I SS = V DET.6 V 2.3 V V DET 3.6 V.42 2.2 A 2 3.6 V V DET 4.6 V.39 2.2 A 2 Operation voltage.6. V Output current I Output transistor Nch V DS *2 =.5 V Output transistor Pch V DS *2 =.5 V =.7 V S-9C2 to 4 =.2 V S-9C5 to 46 = 2.4 V S-9C27 to 46 = 4.8 V S-9C2 to 39 = 6. V S-9C4 to 46 4.4 ma 3.68.33 ma 3.2 2.39 ma 3.42 2.6 ma 5.58 2.86 ma 5 Delay time t D C D = 4.7 nf. 26. 57. ms 4 *. V DET : Actual detection voltage value, V DET(S) : Set detection voltage value (The center value of the detection voltage range.) *2. V DS : Drain-to-source voltage of the output transistor 7
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Test Circuits A V VDD VSS CD V R * k VDD VSS CD *. R is unnecessary for CMOS output product. Figure 5 Test Circuit Figure 6 Test Circuit 2 V VDD VSS CD V A V DS P.G. VDD VSS CD R * k Oscilloscope *. R is unnecessary for CMOS output product. Figure 7 Test Circuit 3 Figure 8 Test Circuit 4 V VDD V A V DS VSS CD Figure 9 Test Circuit 5 8
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series Timing Charts. Nch open-drain output product Detection voltage (V DET ) Release voltage (V DET ) Minimum operation voltage V SS VDD R k Output from pin CD VSS V V SS t D Remark The release voltage is set to the same value as the detection voltage, since there is no hysteresis width. Figure 2. CMOS output product Detection voltage (V DET ) Release voltage (V DET ) Minimum operation voltage V SS VDD CD VSS V Output from pin V SS t D Remark When is the minimum operation voltage or less, the output voltage from the pin is indefinite in the shaded area. The release voltage is set to the same value as the detection voltage, since there is no hysteresis width. Figure 9
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Operation. Basic operation: CMOS output (active "L") product () When the power supply voltage ( ) is the release voltage (V DET ) or more, the Nch transistor is OFF and the Pch transistor is ON to output ("H"). At this time, as shown in Figure 2, the comparator input voltage (R B R C ) is. R A R B R C (2) When decreases to V DET or less (point A in Figure 3), the Nch transistor is ON and the Pch transistor is OFF so that V SS is output. (3) The output is indefinite by decreasing to the IC s minimum operation voltage or less. If the output is pulled up, it will be. (4) V SS is output by increasing to the minimum operation voltage or more. Although is less than V DET, the output is V SS. (5) When increasing to V DET or more (point B in Figure 3), the Nch transistor is OFF and the Pch transistor is ON so that is output. At this time, is output from the pin after the passage of the delay time (t D ). VDD * R A Delay circuit Pch * V REF R B * Nch * VSS R C CD C D *. Parasitic diode Figure 2 Operation () (2) (3) (4) (5) A B Detection voltage (V DET ) Release voltage (V DET ) Minimum operation voltage V SS Output from pin V SS Remark The release voltage is set to the same value as the detection voltage, since there is no hysteresis width. t D Figure 3 Operation 2
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series 2. Delay circuit The delay circuit delays the output signal to the pin from the time at which the power supply voltage ( ) exceeds the release voltage (V DET ) when the power supply voltage ( ) is turned on. The output signal is not delayed when decreases to the detection voltage (V DET ) or less (refer to "Figure 3 Operation 2"). The delay time (t D ) is determined by the time constant of the built-in constant current (approx. na) and the attached delay capacitor (C D ), or the delay time (t D ) when the CD pin is open, and calculated from the following equation. When the C D value is sufficiently large, the t D value can be disregarded. t D [ms] = Delay coefficient C D [nf] t D [ms] Operation Temperature Table 7 Delay Coefficient Delay Coefficient Min. Typ. Max. Ta = 25 C.96 3.5 5.5 Ta = 5 C 2.58 3.7 5.4 Ta = 25 C 4.7 5.47 6.24 Ta = 4 C 5.64 8.4 2. Operation Temperature Table 8 Delay Time Delay Time (t D ) Min. Typ. Max. Ta = 4 C to 25 C. ms ms.8 ms Caution. When the CD pin is open, a double pulse shown in Figure 4 may appear at release. To avoid the double pulse, attach pf or more capacitor to the CD pin. Do not apply voltage to the CD pin from the exterior. V Time Figure 4 2. Mounted board layout should be made in such a way that no current flows into or flows from the CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot be provided. 3. There is no limit for the capacitance of C D as long as the leakage current of the capacitor can be ignored against the built-in constant current value. Leakage current causes deviation in delay time. When the leakage current is larger than the built-in constant current, no release takes place.
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Standard Circuit VDD R * k CD C D *2 VSS *. R is unnecessary for CMOS output products. *2. The delay capacitor (C D ) should be connected directly to the CD pin and the VSS pin. Figure 5 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 2
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series Explanation of Terms. Detection voltage (V DET ) The detection voltage is a voltage at which the output in Figure 8 turns to "L". The detection voltage varies slightly among products of the same specification. The variation of detection voltage between the specified minimum (V DET min.) and the maximum (V DET max.) is called the detection voltage range (refer to Figure 6). Example: In the S-9C2A, the detection voltage is either one in the range of.938 V V DET 2.62 V. This means, at the operation temperature 4 C to 25 C, some S-9C2A have V DET =.938 V and some have V DET = 2.62 V. 2. Release voltage (V DET ) The release voltage is a voltage at which the output in Figure 8 turns to "H". The release voltage varies slightly among products of the same specification. The variation of release voltages between the specified minimum (V DET min.) and the maximum (V DET max.) is called the release voltage range (refer to Figure 7). The release voltage (V DET ) is the same value as the actual detection voltage (V DET ) of a product. Example: In the S-9C2A, the release voltage is either one in the range of.938 V V DET 2.62 V. This means, at the operation temperature 4 C to 25 C, some S-9C2A have V DET =.938 V and some have V DET = 2.62 V. V DET max. V DET min. Detection voltage Detection voltage range Release voltage V DET max. V DET min. Release voltage range Delay time Figure 6 Detection Voltage Figure 7 Release Voltage R * V VDD VSS CD C D k V *. R is unnecessary for CMOS output product. Figure 8 Test Circuit of Detection Voltage and Release Voltage 3
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 3. Delay time (t D ) The delay time in the S-9xxxA Series is a period from the input voltage to the VDD pin exceeding the release voltage (V DET ) until the output from the pin inverts. The delay time changes according to the delay capacitor (C D ). V DET 4. Feed-through current t D Figure 9 Delay Time Feed-through current is a current that flows instantaneously at the time of detection and release of a voltage detector. The feed-through current is large in CMOS output product, small in Nch open-drain output product. 5. Oscillation In applications where a resistor is connected to the voltage detector input (Figure 2), taking a CMOS output (active "L") product for example, the feed-through current which is generated when the output goes from "L" to "H" (release) causes a voltage drop equal to [feed-through current] [input resistance] across the resistor. When the input voltage drops below the detection voltage (V DET ) as a result, the output voltage goes to low level. In this state, the feed-through current stops and its resultant voltage drop disappears, and the output goes from "L" to "H". The feed-through current is then generated again, a voltage drop appears, and repeating the process finally induces oscillation. VDD R A V IN S-9C R B VSS Figure 2 Example for Bad Implementation Due to Detection Voltage Change Caution The release voltage is set to the same value as the detection voltage, since there is no hysteresis width in the S-9xxxA Series. Therefore, the output goes from "H" to "L" if the power supply voltage ( ) reaches the detection voltage. The voltage which once became to "L" goes from "L" to "H" again. This repeating process may induce oscillation as well. Perform thorough evaluation using the actual application. 4
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series Precautions Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. In CMOS output product, the feed-through current flows at the detection and the release. If the input impedance is high, oscillation may occur due to the voltage drop by the feed-through current during releasing. In CMOS output product, oscillation may occur when a pull-down resistor is used, and falling speed of the power supply voltage ( ) is slow near the detection voltage. When designing for mass production using an application circuit described herein, the product deviation and temperature characteristics of the external parts should be taken into consideration. ABLIC Inc. shall not bear any responsibility for patent infringements related to products using the circuits described herein. ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 5
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 Characteristics (Typical Data). Detection voltage (V DET ) vs. Temperature (Ta) S-9N2.4 VDET [V].35.3.25.2.5 VDET, +VDET. 4 25 25 5 75 25 Ta [ C] S-9N46 5. 4.9 4.8 4.7 4.6 4.5 VDET, +VDET 4.4 4.3 4.2 4 25 25 5 75 25 Ta [ C] VDET [V] 2. Current consumption (I SS ) vs. Input voltage ( ) S-9C2 2..75 Ta = +25 C.5 Ta = +5 C.25 Ta = +25 C..75.5.25 Ta = 4 C 2. 4. 6. 8.. ISS [μa] VDD [V] S-9C46 2..75.5.25..75.5.25 ISS [μa] 2. Ta = +25 C Ta = +5 C Ta = +25 C Ta = 4 C 4. VDD [V] 6. 8.. 3. Current consumption (I SS ) vs. Temperature (Ta) S-9N2/9C2. = V DET.6 V S-9N46/9C46. = V DET.6 V ISS [μa].75.5.25 S-9C2 S-9N2 4 25 25 5 75 25 Ta [ C] ISS [μa].75.5.25 S-9C46 S-9N46 4 25 25 5 75 25 Ta [ C] 6
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series 4. Nch transistor output current (I ) vs. V DS S-9N46 6 4 2 8 6 4 2 I [ma].5. VDD =.2 V VDD =. V.5 VDD = 3.6 V 2. VDS [V] 2.5 Ta = 4 C VDD = 2.4 V 3. 3.5 4. S-9N46 6 4 2 8 6 4 2 I [ma].5. VDD =.2 V VDD =. V.5 VDD = 3.6 V 2. VDS [V] 2.5 Ta = 25 C VDD = 2.4 V 3. 3.5 4. S-9N46 Ta = 5 C 6 4 2 VDD = 3.6 V 8 6 VDD =. V VDD = 2.4 V 4 2 VDD =.2 V.5..5 2. 2.5 3. 3.5 4. I [ma] VDS [V] S-9N46 Ta = 25 C 6 4 2 VDD = 3.6 V 8 6 VDD =. V VDD = 2.4 V 4 2 VDD =.2 V.5..5 2. 2.5 3. 3.5 4. I [ma] VDS [V] 5. Pch transistor output current (I ) vs. V DS S-9C2 4 35 3 25 2 5 5 I [ma] Ta = 4 C VDD = 8.4 V VDD = 7.2 V VDD = 6. V VDD = 4.8 V VDD = 3.6 V VDD = 2.4 V. 2. 3. 4. 5. 6. 7. 8. 9. VDS [V] S-9C2 4 35 3 25 2 5 5 I [ma]. 2. VDD = 8.4 V VDD = 7.2 V 3. 4. 5. VDS [V] 6. Ta = 25 C VDD = 6. V VDD = 4.8 V VDD = 3.6 V VDD = 2.4 V 7. 8. 9. S-9C2 4 35 3 25 2 5 5 I [ma]. Ta = 5 C VDD = 8.4 V VDD = 7.2 V VDD = 6. V VDD = 4.8 V VDD = 3.6 V VDD = 2.4 V 2. 3. 4. 5. 6. 7. 8. 9. VDS [V] S-9C2 4 35 3 25 2 5 5 I [ma]. Ta = 25 C VDD = 8.4 V VDD = 7.2 V VDD = 6. V VDD = 4.8 V VDD = 3.6 V VDD = 2.4 V 2. 3. 4. 5. 6. 7. 8. 9. VDS [V] Remark V DS : Drain-to-source voltage of the output transistor 7
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 6. Nch transistor output current (I ) vs. Input voltage ( ) S-9N46 4. 3.5 3. 2.5 2..5..5 I [ma] Ta = 4 C Ta = +25 C. Ta = +5 C Ta = +25 C 2. 3. VDD [V] 4. V DS =.5 V 7. Pch transistor output current (I ) vs. Input voltage ( ) S-9C2 4. 3.5 Ta = 4 C 3. Ta = +25 C 2.5 2..5..5 2. 4. I [ma] VDD [V] 6. 5. V DS =.5 V Ta = +5 C Ta = +25 C 8. 6.. 8. Minimum operation voltage (V ) vs. Input voltage ( ) S-9N2.6 Pull-up to Pull-up resistance: k S-9N46 6 Pull-up to Pull-up resistance: k V [V].2.8.4.2.4 Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C.6.8 VDD [V]..2.4 V [V] 5 4 3 2 Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C. 2. VDD [V] 3. 4. 5. S-9N2 2 Pull-up to V Pull-up resistance: k S-9N46 2 Pull-up to V Pull-up resistance: k V [V] 8 6 4 Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C V [V] 8 6 4 Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C 2 2.2.4.6.8 VDD [V]..2.4. 2. VDD [V] 3. 4. 5. Remark V DS : Drain-to-source voltage of the output transistor 8
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series 9. Dynamic response characteristics vs. Output pin capacitance (C ) (CD pin; open) 9. V DET =.2 V S-9C2 Ta = 4 C S-9N2 Ta = 4 C...... C [μf]...... C [μf] S-9C2 Ta = 25 C S-9N2 Ta = 25 C...... C [μf]...... C [μf] S-9C2 Ta = 5 C S-9N2 Ta = 5 C...... C [μf]...... C [μf] S-9C2 Ta = 25 C S-9N2 Ta = 25 C...... C [μf]..... C [μf]. 9
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2 9. 2 V DET = 4.6 V S-9C46 Ta = 4 C S-9N46 Ta = 4 C...... C [μf]..... C [μf]. S-9C46 Ta = 25 C S-9N46 Ta = 25 C...... C [μf]..... C [μf]. S-9C46 Ta = 5 C S-9N46 Ta = 5 C...... C [μf]..... C [μf]. S-9C46 Ta = 25 C S-9N46 Ta = 25 C...... C [μf]..... C [μf]. 2
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) Rev.._2 S-9xxxA Series s s V IH * Input voltage *2 V IL *3 Output voltage t PHL t PLH *3 9% V R * VDD k * VSS CD C V *3 % *. V IH = V *2. V IL =.8 V *3. CMOS output product: Nch open-drain product: Figure 2 Test Condition of Response Time *. R and are unnecessary for CMOS output product. Figure 22 Test Circuit of Response Time Caution. The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 2. When the CD pin is open, a double pulse may appear at release. To avoid the double pulse, attach pf or more capacitor to the CD pin. Response time when detecting (t PHL ) is not affected by CD pin capacitance. Besides, response time when releasing (t PLH ) can be set the delay time by attaching CD pin. Refer to ". Delay time (t D ) vs. CD pin capacitance (C D ) (without output pin capacitance) for details.. Delay time (t D ) vs. CD pin capacitance (C D ) (without output pin capacitance) S-9C2 td [ms] Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C S-9C46 td [ms] Ta = 4 C Ta = +25 C Ta = +5 C Ta = +25 C CD [nf] CD [nf] 2
FOR AUTOMOTIVE 25 C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) S-9xxxA Series Rev.._2. Delay time (t D ) vs. Temperature (Ta) S-9N2 5 td [ms] 4 3 2 C D = 4.7 nf 4 25 25 5 75 25 Ta [ C] S-9N46 5 td [ms] 4 3 2 C D = 4.7 nf 4 25 25 5 75 25 Ta [ C] s V IH * Input voltage V IL *2 Output voltage t D 9% V VDD VSS CD C D R * k V V SS *. V IH = V *2. V IL =.8 V Figure 23 Test Condition of Delay Time *. R is unnecessary for CMOS output product. Figure 24 Test Circuit of Delay Time Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 22
Disclaimers (Handling Precautions). All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein. 4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the products outside their specified ranges. 5. When using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc. Especially, the products cannot be used for life support devices, devices implanted in the human body and devices that directly affect human life, etc. Prior consultation with our sales office is required when considering the above uses. ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products. 9. Semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system must be sufficiently evaluated and applied on customer's own responsibility.. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use.. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 2. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 3. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party without the express permission of ABLIC Inc. is strictly prohibited. 4. For more details on the information described herein, contact our sales office. 2.-28. www.ablicinc.com