TPA mW MONO AUDIO POWER AMPLIFIER

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TPA3 SLOS207C JANUARY 998 REVID MAY 2003 Fully Specified for 3.3-V and 5-V Operation Wide Power Supply Compatibility 2.5 V 5.5 V Output Power for R L = 8 Ω 350 mw at V DD = 5 V, BTL 250 mw at V DD = 5 V, 250 mw at V DD = 3.3 V, BTL 75 mw at V DD = 3.3 V, Shutdown Control I DD = 7 µa at 3.3 V I DD = 60 µa at 5 V BTL to Mode Control Integrated Depop Circuitry Thermal and Short-Circuit Protection Surface Mount Packaging SOIC PowerPAD MSOP description The TPA3 is a bridge-tied load (BTL) or single-ended () audio power amplifier developed especially for low-voltage applications where internal speakers and external earphone operation are required. Operating with a 3.3-V supply, the TPA3 can deliver 250-mW of SHUTDOWN BYPASS /BTL IN D OR DGN PACKAGE (TOP VIEW) continuous power into a BTL 8-Ω load at less than % THD+N throughout voice band frequencies. Although this device is characterized out to 20 khz, its operation was optimized for narrower band applications such as cellular communications. The BTL configuration eliminates the need for external coupling capacitors on the output in most applications, which is particularly important for small battery-powered equipment. A unique feature of the TPA3 is that it allows the amplifier to switch from BTL to on the fly when an earphone drive is required. This eliminates complicated mechanical switching or auxiliary devices just to drive the external load. This device features a shutdown mode for power-sensitive applications with special depop circuitry to virtually eliminate speaker noise when exiting shutdown mode and during power cycling. The TPA3 is available in an 8-pin SOIC surface-mount package and the surface-mount PowerPAD MSOP, which reduces board space by 50% and height by 40%. 2 3 4 8 7 6 5 V O GND V DD V O + Audio Input RI RF 4 IN VDD/2 VDD VO+ 6 5 CC CS CI 2 BYPASS + CBF From System Control From HP Jack 3 SHUTDOWN /BTL Bias Control + VO 8 GND 7 350 mw Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 998 2003, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TERMINAL NAME TA SMALL OUTLINE (D) AVAILABLE OPTIONS PACKAGED DEVICES MSOP (DGN) MSOP Symbolization 40 C to 85 C TPA3D TPA3DGN AAB The D and DGN packages are available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA3DR). NO. I/O BYPASS 2 I GND 7 GND is the ground connection. IN 4 I IN is the audio input terminal. Terminal Functions DESCRIPTION BYPASS is the tap to the voltage divider for internal mid-supply bias. This terminal should be connected to a 0.-µF to -µf capacitor when used as an audio amplifier. /BTL 3 I When /BTL is held low, the TPA3 is in BTL mode. When /BTL is held high, the TPA3 is in mode. SHUTDOWN I SHUTDOWN places the entire device in shutdown mode when held high (IDD = 60 µa, ). VDD 6 VDD is the supply voltage terminal. VO+ 5 O VO+ is the positive output for BTL and modes. VO 8 O VO is the negative output in BTL mode and a high-impedance output in mode. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V DD........................................................................ 6 V Input voltage, V I............................................................ 0.3 V to V DD +0.3 V Continuous total power dissipation..................... internally limited (see Dissipation Rating Table) Operating free-air temperature range, T A (see Table 3)................................ 40 C to 85 C Operating junction temperature range, T J........................................... 40 C to 50 C Storage temperature range, T stg................................................... 65 C to 50 C Lead temperature,6 mm (/6 inch) from case for 0 seconds............................... 260 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA 25 C DERATING FACTOR TA = 70 C TA = 85 C D 725 mw 5.8 mw/ C 464 mw 377 mw DGN 2.4 W 7. mw/ C.37 W. W Please see the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document. 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 recommended operating conditions SLOS207C JANUARY 998 REVID MAY 2003 MIN MAX UNIT Supply voltage, VDD 2.5 5.5 V SHUTDOWN 0.9 VDD Á High-level voltage, VIH Á V /BTL 0.9 VDD Á SHUTDOWN 0. VDD Á Low-level voltage, VIL ÁÁ /BTL 0. VDD V ÁÁ Operating free-air temperature, TA (see Table 3) 40 Á 85 electrical characteristics at specified free-air temperature, V DD = 3.3 V, T A = 25 C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SHUTDOWN = 0 V, /BTL = 0 V, Output offset voltage (measured differentially), Á 5 20 mv RF = 0 kω ÁÁ BTL mode 85 ÁÁ Power supply rejection ratio VDD = 32Vto34V 3.2 3.4 V Á modeáá 83 ÁÁ db SHUTDOWN = 0 V, Á ÁÁ BTL mode 0.7.5 /BTL = 0.33 V, RF = 0 kω Supply current (see Figure 6) ÁÁ SHUTDOWN = 0 V, mode /BTL = 2.97 V, RF = 0 kω 0.35 0.75 ma Supply current, shutdown mode SHUTDOWN = VDD, /BTL = 0 V, (see Figure 7) RF = 0 kω 50 µa VOO ÁÁ PSRR ÁÁ IDD ÁÁ IDD(SD) 7 Á SHUTDOWN,, VI = VDD IIH High-level input current Á /BTL,, VI = VDD µa SHUTDOWN,, VI = 0 V Á Á IIL Low-level input current /BTL,, VI = 0 V C µa operating characteristics, V DD = 3.3 V, T A = 25 C, R L = 8 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Á ÁÁ ÁÁ THD = 0.5%, BTL mode, See Figure 4 250 ÁÁ Á PO Output power, see Note ÁÁ THD = 0.5%, mode 0 ÁÁ mw Total harmonic distortion plus ÁÁ THD + N PO = 250 mw, f = 20 Hz to 4 khz,áá AV = 2 V/V, noise ÁÁ See Figure 2.3% Á BOM Maximum output power bandwidth ÁÁ AV = 2 V/V, THD = 3%, ÁÁ See Figure 2 ÁÁ 0 ÁÁ khz B Unity-gain bandwidth Open loop, See Figure 36.4 MHz Á Á Á f = khz, CB = µf, BTL mode, Á See Figure 5 7 Á Á Supply ripple rejection ratio ÁÁ f = khz, CB = µf, ÁÁ mode, Á See Figure 3 86 db Noise output voltage ÁÁ AV = V/V, CB = 0. µf, ÁÁ RL = 32 Ω, ÁÁ 5ÁÁ µv(rms) Vn BTL, See Figure 42 NOTE : Output power is measured at the output terminals of the device at f = khz. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 electrical characteristics at specified free-air temperature, V DD = 5 V, T A = 25 C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Á SHUTDOWN = 0 V, /BTL = 0 V, VOO Output offset voltage (measured differentially) ÁÁ, RF = 0 kω 5 20 mv Á BTL mode 49Vto5V ÁÁ 78 ÁÁ PSRR Power supply rejection ratio VDD = 4.9 5. V db mode 76 Á SHUTDOWN = 0 V, ÁÁ BTL mode /BTL = 0.5 V, RF = 0 kω 0.7.5 Á IDD Supply current (see Figure 6) SHUTDOWN = 0 V, Á mode /BTL = 4.5 V, RF = 0Ω Á 0.35 0.75 ma Supply current, shutdown mode SHUTDOWN = VDD, /BTL = 0 V, IDD(SD) 60 00 µa (see Figure 7) RF = 0 kω, ÁÁ SHUTDOWN, VDD = 5.5 V, VI = VDD Á IIH High-level input current /BTL, VDD = 5.5 V, VI = VDD µa ÁÁ SHUTDOWN, VDD = 5.5 V, VI = 0 V Á Á IIL Low-level input current /BTL, VDD = 5.5 V, VI = 0 V Á µa operating characteristics, V DD = 5 V, T A = 25 C, R L = 8 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ÁÁ THD = 0.5%, BTL mode, ÁÁ See Figure 8 ÁÁ Output power, see Note 2 mw ÁÁ THD = 0.5%, mode Total harmonic distortion plus ÁÁ PO = 350 mw, f = 20 Hz to 4 khz, ÁÁ AV = 2 V/V, ÁÁ noise ÁÁ See Figure 6 Á ÁÁ Maximum output power bandwidth AV = 2 V/V, THD = 2%, See Figure 6 khz Á 700 ÁÁ PO Á 300 ÁÁ Á THD + NÁ % ÁÁ Á Á BOM 0 ÁÁ Á B Unity-gain bandwidth ÁÁ Open loop, See Figure 37.4 ÁÁ MHz Á Á Á ÁÁ f = khz, CB = µf, ÁÁ BTL mode, ÁÁ See Figure 5 65 Supply ripple rejection ratio db f = khz, Á CB = µf, mode, ÁÁ ÁÁ 75 ÁÁ See Figure 4 ÁÁ Vn Noise output voltage AV = V/V, CB = 0. µf, ÁÁ RL = 32 Ω, ÁÁ BTL, See Figure 43 Á 5 µv(rms) NOTE 2: Output power is measured at the output terminals of the device at f = khz. 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 PARAMETER MEASUREMENT INFORMATION SLOS207C JANUARY 998 REVID MAY 2003 Audio Input RI RF 4 IN VDD/2 VDD VO+ 6 5 CS µf VDD CI 2 BYPASS + CB 0. µf VO 8 3 SHUTDOWN /BTL Bias Control + GND 7 Figure. BTL Mode Test Circuit Audio Input RI RF 4 IN VDD/2 VDD VO+ 6 5 CS µf VDD CI CB 0. µf 2 BYPASS + CC 330 µf RL = 32 Ω VO 8 VDD 3 SHUTDOWN /BTL Bias Control + GND 7 Figure 2. Mode Test Circuit POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Supply voltage rejection ratio Frequency 3, 4, 5 IDD Supply current Supply voltage 6, 7 PO Output power THD +N Total harmonic distortion plus noise Supply voltage 8, 9 Load resistance 0, Frequency Output power 2, 3, 6, 7, 20, 2, 24, 25, 28, 29, 32, 33 4, 5, 8, 9, 22, 23, 26, 27, 30, 3, 34, 35 Open loop gain and phase Frequency 36, 37 Closed loop gain and phase Frequency 38, 39, 40, 4 Vn Output noise voltage Frequency 42, 43 PD Power dissipation Output power 44, 45, 46, 47 Supply Voltage Rejection Ratio db 0 0 20 30 40 50 60 70 80 90 SUPPLY VOLTAGE REJECTION RATIO CB = µf CB = 0. µf BYPASS = /2 VDD Supply Voltage Rejection Ratio db 0 0 20 30 40 50 60 70 80 90 SUPPLY VOLTAGE REJECTION RATIO CB = µf CB = 0. µf BYPASS = /2 VDD 00 20 00 k 0 k 20 k 00 20 00 k 0 k 20 k Figure 3 Figure 4 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 Supply Voltage Rejection Ratio db 0 0 20 30 40 50 60 70 80 90 SUPPLY VOLTAGE REJECTION RATIO CB = µf BTL I DD Supply Current ma. 0.9 0.7 0.5 0.3 0. SHUTDOWN = 0 V RF = 0 kω SUPPLY CURRENT SUPPLY VOLTAGE /BTL = 0. VDD /BTL = 0.9 VDD 00 20 00 k Figure 5 0 k 20 k 0. 2 3 4 5 6 VDD Supply Voltage V Figure 6 I DD(SD) Supply Current µ A 90 80 70 60 50 40 30 20 0 SUPPLY CURRENT (SHUTDOWN) SUPPLY VOLTAGE SHUTDOWN = VDD /BTL = 0 V RF = 0 kω 0 2 2.5 3 3.5 4 4.5 5 VDD Supply Voltage V 5.5 Figure 7 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS 000 800 THD+N % BTL SUPPLY VOLTAGE 350 300 THD+N % SUPPLY VOLTAGE Output Power mw O P 600 400 200 RL = 32 Ω Output Power mw O P 250 200 50 00 RL = 32 Ω 50 0 2 2.5 3 3.5 4 4.5 5 5.5 VDD Supply Voltage V Figure 8 0 2 2.5 3 3.5 4 4.5 VDD Supply Voltage V Figure 9 5 5.5 800 700 LOAD RESISTANCE THD+N = % BTL 350 300 LOAD RESISTANCE THD+N = % Output Power mw O P 600 500 400 300 200 P O Output Power mw 250 200 50 00 00 50 0 8 6 24 32 40 48 56 64 RL Load Resistance Ω Figure 0 0 8 4 20 26 32 38 44 50 RL Load Resistance Ω Figure 56 62 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 0 0. PO = 250 mw BTL AV = 0 V/V AV = 20 V/V AV = 2 V/V 0.0 20 00 k 0k 20k 0 0. AV = 2 V/V BTL PO = 50 mw PO = 25 mw PO = 250 mw 0.0 20 00 k 0k 20k Figure 2 Figure 3 0 0. f = khz AV = 2 V/V BTL 0.0 0.04 0. 0.6 0.22 0.28 0.34 0.4 PO Output Power W 0 0. f = 0 khz f = 20 khz f = khz f = 20 Hz AV = 2 V/V BTL 0.0 0.0 0. PO Output Power W Figure 4 Figure 5 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 9

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS 0 0. PO = 350 mw BTL AV = 0 V/V AV = 20 V/V AV = 2 V/V 0.0 20 00 k 0k 20k 0 0. AV = 2 V/V BTL PO = 350 mw PO = 50 mw PO = 75 mw 0.0 20 00 k 0k 20k Figure 6 Figure 7 0 0. f = khz AV = 2 V/V BTL 0.0 0. 0.25 0.40 0.55 0.70 0.85 PO Output Power W 0 0. f = 20 Hz f = 20 khz f = 0 khz f = khz AV = 2 V/V BTL 0.0 0.0 0. PO Output Power W Figure 8 Figure 9 0 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 0 0. 0.0 PO = 30 mw RL = 32 Ω AV = V/V Figure 20 AV = 5 V/V AV = 0 V/V 0.00 20 00 k 0k 20k 0 0. 0.0 RL = 32 Ω AV = V/V PO = 30 mw PO = 5 mw 0.00 20 00 k 0k Figure 2 PO = 0 mw 20k 0 0. f = khz RL = 32 Ω AV = V/V 0.0 0.02 0.025 0.03 0.035 0.04 0.045 0.05 PO Output Power W 0 f = 20 khz f = 0 khz 0. f = khz f = 20 Hz RL = 32 Ω AV = V/V 0.0 0.002 0.0 0.02 0.03 0.05 PO Output Power W Figure 22 Figure 23 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS 0 0. 0.0 PO = 60 mw RL = 32 Ω AV = 5 V/V AV = 0 V/V AV = V/V 0.00 20 00 k 0k Figure 24 20k 0 0. 0.0 RL = 32 Ω AV = V/V PO = 30 mw PO = 60 mw 0.00 20 00 k 0k Figure 25 PO = 5 mw 20k 0 0. f = khz RL = 32 Ω AV = V/V 0.0 0.02 0.04 0.06 0.08 0. 0.2 0.4 PO Output Power W 0 0. f = 20 khz f = 0 khz f = khz f = 20 Hz RL = 32 Ω AV = V/V 0.0 0.002 0.0 0. 0.2 PO Output Power W Figure 26 Figure 27 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 0. PO = 0. mw RL = 0 kω AV = V/V AV = 2 V/V AV = 5 V/V 0.0 20 00 k 0k 20k 0. RL = 0 kω AV = V/V PO = 0.05 mw 0.0 20 00 k 0 k PO = 0.3 mw PO = 0. mw 20 k Figure 28 Figure 29 0 0. 0.0 f = khz RL = 0 kω AV = V/V 0.00 50 75 00 25 50 75 200 PO Output Power µw Figure 30 0 0. 0.0 RL = 0 kω AV = V/V f = 20 Hz f = 20 khz PO Output Power µw Figure 3 f = khz f = 0 khz 0.00 5 0 00 500 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS 0. PO = 0.3 mw RL = 0 kω AV = V/V AV = 2 V/V AV = 5 V/V 0.0 20 00 k 0k 20k 0. RL = 0 kω AV = V/V 0.0 20 00 k 0k PO = 0.3 mw PO = 0.2 mw PO = 0. mw 20k Figure 32 Figure 33 0 0. 0.0 f = khz RL = 0 kω AV = V/V 0.00 50 25 200 275 350 425 500 PO Output Power µw Figure 34 0 0. 0.0 RL = 0 kω AV = V/V f = 20 Hz PO Output Power µw Figure 35 f = 0 khz f = 20 khz f = khz 0.00 5 0 00 500 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 40 30 OPEN-LOOP GAIN AND PHA Gain Phase RL = Open BTL 80 20 Open-Loop Gain db 20 0 0 0 60 0 60 Phase 20 20 30 80 0 02 03 04 f Frequency khz Figure 36 40 30 OPEN-LOOP GAIN AND PHA Gain Phase RL = Open BTL 80 20 Open-Loop Gain db 20 0 0 0 60 0 60 Phase 20 20 30 0 02 03 80 04 f Frequency khz Figure 37 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS 0.75 0.5 CLOD-LOOP GAIN AND PHA Phase 80 70 Closed-Loop Gain db 0.25 0 0.25 0.5 0.75.25.5.75 PO = 0.25 W CI = µf BTL Gain 60 50 40 30 2 20 0 02 03 04 05 06 Figure 38 Phase 0.75 0.5 CLOD-LOOP GAIN AND PHA Phase 80 70 Closed-Loop Gain db 0.25 0 0.25 0.5 0.75.25.5.75 PO = 0.35 W CI = µf BTL Gain 60 50 40 30 2 20 0 02 03 04 05 06 Figure 39 Phase 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 Closed-Loop Gain db Closed-Loop Gain db 7 6 5 4 3 2 0 2 CLOD-LOOP GAIN AND PHA RL = 32 Ω AV = 2 V/V PO = 30 mw CI = µf CC =470 µf Phase Gain 80 70 60 50 40 30 20 0 3 00 0 02 03 04 05 06 7 6 5 4 3 2 0 Figure 40 CLOD-LOOP GAIN AND PHA RL = 32 Ω AV = 2 V/V PO = 60 mw CI = µf CC =470 µf Phase Gain 40 30 20 0 2 00 0 02 03 04 05 06 Figure 4 80 70 60 50 Phase Phase POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 TYPICAL CHARACTERISTICS V(rms) Output Noise Voltage µ 00 0 OUTPUT NOI VOLTAGE BW = 22 Hz to 22 khz RL = 32 Ω CB =0. µf AV = V/V VO BTL VO+ V n V(rms) Output Noise Voltage µ 00 0 OUTPUT NOI VOLTAGE BW = 22 Hz to 22 khz RL = 32 Ω CB =0. µf AV = V/V VO BTL VO+ V n 20 00 k 0 k 20 k 20 00 k 0 k 20 k Figure 42 Figure 43 300 POWER DISSIPATION 80 POWER DISSIPATION P D Power Dissipation mw 270 240 20 80 50 20 90 0 00 200 300 400 PO Output Power mw Figure 44 BTL P D Power Dissipation mw 72 64 56 48 40 32 24 6 8 0 0 RL = 32 Ω 30 60 90 20 PO Output Power mw Figure 45 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 TYPICAL CHARACTERISTICS SLOS207C JANUARY 998 REVID MAY 2003 720 POWER DISSIPATION 80 POWER DISSIPATION 640 60 P D Power Dissipation mw 560 480 400 320 240 60 0 200 400 600 800 000 200 PO Output Power mw Figure 46 BTL P D Power Dissipation mw 40 20 00 80 60 40 RL = 32 Ω 0 50 00 50 200 250 300 PO Output Power mw Figure 47 bridge-tied load versus single-ended mode APPLICATION INFORMATION Figure 48 shows a linear audio power amplifier (APA) in a BTL configuration. The TPA3 BTL amplifier consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground referenced load. Plugging 2 V O(PP) into the power equation, where voltage is squared, yields 4 the output power from the same supply rail and load impedance (see equation ). V (rms) Power V O(PP) 2 2 2 V (rms) R L () POST OFFICE BOX 655303 DALLAS, TEXAS 75265 9

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 APPLICATION INFORMATION bridge-tied load versus single-ended mode (continued) VDD VO(PP) VDD RL 2x VO(PP) VO(PP) Figure 48. Bridge-Tied Load Configuration In typical portable handheld equipment, a sound channel operating at 3.3 V and using bridging raises the power into an 8-Ω speaker from a single-ended (, ground reference) limit of 62.5 mw to 250 mw. In terms of sound power that is a 6-dB improvement, which is loudness that can be heard. In addition to increased power there are frequency response concerns. Consider the single-supply configuration shown in Figure 49. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µf to 000 µf), tend to be expensive, heavy, and occupy valuable PCB area. These capacitors also have the additional drawback of limiting low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 2. f c 2 R L C C (2) For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor. 20 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 APPLICATION INFORMATION SLOS207C JANUARY 998 REVID MAY 2003 bridge-tied load versus single-ended mode (continued) VDD VO(PP) 3 db CC RL VO(PP) Figure 49. Single-Ended Configuration and Frequency Response Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable, considering that the BTL configuration produces 4 the output power of the configuration. Internal dissipation versus output power is discussed further in the thermal considerations section. BTL amplifier efficiency Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sinewave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from V DD. The internal voltage drop multiplied by the RMS value of the supply current, I DD rms, determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 50). fc VO IDD V(LRMS) IDD(RMS) Figure 50. Voltage and Current Waveforms for BTL Amplifiers POST OFFICE BOX 655303 DALLAS, TEXAS 75265 2

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 BTL amplifier efficiency (continued) APPLICATION INFORMATION Although the voltages and currents for and BTL are sinusoidal in the load, currents from the supply are very different between and BTL configurations. In an application the current waveform is a half-wave rectified shape whereas, in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform, both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency. Efficiency P L P SUP (3) where P L V L rms2 R L V L rms V P 2 V 2 p 2R L P SUP V DD I DD rms V DD 2V P R L I DD rms 2V P R L Efficiency of a BTL Configuration V P 2V DD P L R L 2 2 2V DD (4) Table employs equation 4 to calculate efficiencies for three different output power levels. The efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. The internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. Table. Efficiency Vs Output Power in 3.3-V 8-Ω BTL Systems (W) EFFICIENCY (%) PEAK-TO-PEAK VOLTAGE (V) INTERNAL DISSIPATION (W) 0.25 33.6.4 0.26 0.25 47.6 2.00 0.29 0.375 58.3 2.45 0.28 High-peak voltage values cause the THD to increase. A final point to remember about linear amplifiers (either or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. In equation 4, V DD is in the denominator. This indicates that as V DD goes down, efficiency goes up. 22 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 APPLICATION INFORMATION SLOS207C JANUARY 998 REVID MAY 2003 application schematic Figure 5 is a schematic diagram of a typical handheld audio application circuit, configured for a gain of 0 V/V. CF 5 pf Audio Input RF 50 kω RI 0 kω 4 IN VDD/2 VDD VO+ 6 5 CC 330 µf CS µf VDD CI 0.47 µf CB 2.2 µf 2 BYPASS + kω VO 8 From System Control 3 SHUTDOWN /BTL Bias Control + GND 7 0. µf VDD 00 kω 00 kω Figure 5. TPA3 Application Circuit The following sections discuss the selection of the components used in Figure 5. component selection gain setting resistors, R F and R I The gain for each audio input of the TPA3 is set by resistors R F and R I according to equation 5 for BTL mode. BTL Gain A V 2 R F (5) R I BTL mode operation brings about the factor 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. Given that the TPA3 is a MOS amplifier, the input impedance is very high, consequently input leakage currents are not generally a concern, although noise in the circuit increases as the value of R F increases. In addition, a certain range of R F values is required for proper start-up operation of the amplifier. Taken together it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kω and 20 kω. The effective impedance is calculated in equation 6. Effective Impedance R F R I R F R I (6) POST OFFICE BOX 655303 DALLAS, TEXAS 75265 23

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 component selection (continued) APPLICATION INFORMATION As an example consider an input resistance of 0 kω and a feedback resistor of 50 kω. The BTL gain of the amplifier would be 0 V/V and the effective impedance at the inverting terminal would be 8.3 kω, which is well within the recommended range. For high performance applications, metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of R F above 50 kω the amplifier tends to become unstable due to a pole formed from R F and the inherent input capacitance of the MOS input structure. For this reason, a small compensation capacitor, C F, of approximately 5 pf should be placed in parallel with R F when R F is greater than 50 kω. This, in effect, creates a low pass filter network with the cutoff frequency defined in equation 7. 3 db f c(lowpass) 2 R F C F (7) For example, if R F is 00 kω and C F is 5 pf then f c is 38 khz, which is well outside the audio range. input capacitor, C I In the typical application an input capacitor, C I, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, C I and R I form a high-pass filter with the corner frequency determined in equation 8. fc 3 db f c(highpass) 2 R I C I (8) The value of C I is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where R I is 0 kω and the specification calls for a flat bass response down to 40 Hz. Equation 8 is reconfigured as equation 9. fc C I 2 R I f c (9) 24 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 APPLICATION INFORMATION SLOS207C JANUARY 998 REVID MAY 2003 component selection (continued) In this example, C I is 0.40 µf, so one would likely choose a value in the range of 0.47 µf to µf. A further consideration for this capacitor is the leakage path from the input source through the input network (R I, C I ) and the feedback resistor (R F ) to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at V DD /2, which is likely higher than the source dc level. It is important to confirm the capacitor polarity in the application. power supply decoupling, C S The TPA3 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0. µf placed as close as possible to the device V DD lead, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 0 µf or greater placed near the audio power amplifier is recommended. midrail bypass capacitor, C B The midrail bypass capacitor, C B, is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, C B determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD + N. The capacitor is fed from a 250-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in equation 0 should be maintained, which insures the input capacitor is fully charged before the bypass capacitor is fuly charged and the amplifier starts up. 0 CB 250 kω RF R I CI As an example, consider a circuit where C B is 2.2 µf, C I is 0.47 µf, R F is 50 kω and R I is 0 kω. Inserting these values into the equation 0 we get: 8.2 35.5 which satisfies the rule. Bypass capacitor, C B, values of 0. µf to 2.2 µf ceramic or tantalum low-esr capacitors are recommended for the best THD and noise performance. single-ended operation In mode (see Figure 5), the load is driven from the primary amplifier output (V O +, terminal 5). In mode the gain is set by the R F and R I resistors and is shown in equation. Since the inverting amplifier is not used to mirror the voltage swing on the load, the factor of 2, from equation 5, is not included. Gain A V R F () R I (0) POST OFFICE BOX 655303 DALLAS, TEXAS 75265 25

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 single-ended operation (continued) APPLICATION INFORMATION The output coupling capacitor required in single-supply mode also places additional constraints on the selection of other components in the amplifier circuit. The rules described earlier still hold with the addition of the following relationship: 0 CB 250 kω RF R I CI R L C C As an example, consider a circuit where C B is 0.2.2 µf, C I is 0.47 µf, C C is 330 µf, R F is 50 kωr L is 32 Ω, and R I is 0 kω. Inserting these values into the equation 2 we get: 8.2 35.5 94.7 which satisfies the rule. output coupling capacitor, C C In the typical single-supply configuration, an output coupling capacitor (C C ) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 3. (2) 3 db f c(high pass) 2 R L C C (3) The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the low-frequency corner higher degrading the bass response. Large values of C C are required to pass low frequencies into the load. Consider the example where a C C of 330 µf is chosen and loads vary from 8 Ω, 32 Ω, to 47 kω. Table 2 summarizes the frequency response characteristics of each configuration. Table 2. Common Load Impedances Low Frequency Output Characteristics in Mode RL CC LOWEST 8 Ω 330 µf 60 Hz 32 Ω 330 µf 5 Hz 47,000 Ω 330 µf 0.0 Hz As Table 2 indicates an 8-Ω load is adequate, earphone response is good, and drive into line level inputs (a home stereo for example) is exceptional. fc 26 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 APPLICATION INFORMATION SLOS207C JANUARY 998 REVID MAY 2003 /BTL operation The ability of the TPA3 to easily switch between BTL and modes is one of its most important cost saving features. This feature eliminates the requirement for an additional earphone amplifier in applications where internal speakers are driven in BTL mode but external earphone or speaker must be accommodated. Internal to the TPA3, two separate amplifiers drive V O + and V O. The /BTL input (terminal 3) controls the operation of the follower amplifier that drives V O (terminal 8). When /BTL is held low, the amplifier is on and the TPA3 is in the BTL mode. When /BTL is held high, the V O amplifier is in a high output impedance state, which configures the TPA3 as an driver from V O + (terminal 5). I DD is reduced by approximately one-half in mode. Control of the /BTL input can be from a logic-level TTL source or, more typically, from a resistor divider network as shown in Figure 52. 4 IN VO+ 5 CC 330 µf 2 BYPASS + kω VO 8 3 SHUTDOWN /BTL Bias Control + GND 7 0. µf VDD 00 kω 00 kω Figure 52. TPA3 Resistor Divider Network Circuit Using a readily available /8-in. (3,5 mm) mono earphone jack, the control switch is closed when no plug is inserted. When closed the 00-kΩ/-kΩ divider pulls the /BTL input low. When a plug is inserted, the -kω resistor is disconnected and the /BTL input is pulled high. When the input goes high, the V O amplifier is shutdown causing the BTL speaker to mute (virtually open-circuits the speaker). The V O + amplifier then drives through the output capacitor (C C ) into the earphone jack. using low-esr capacitors Low-ESR capacitors are recommended throughout this application. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 27

TPA3 SLOS207C JANUARY 998 REVID MAY 2003 5-V versus 3.3-V operation APPLICATION INFORMATION The TPA3 operates over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation with respect to supply bypassing, gain setting, or stability. The most important consideration is that of output power. Each amplifier in TPA3 can produce a maximum voltage swing of V DD V. This means, for 3.3-V operation, clipping starts to occur when V O(PP) = 2.3 V as opposed to V O(PP) = 4 V at 5 V. The reduced voltage swing subsequently reduces maximum output power into an 8-Ω load before distortion becomes significant. Operation from 3.3-V supplies, as can be shown from the efficiency formula in equation 4, consumes approximately two-thirds the supply power for a given output-power level of operation from 5-V supplies. headroom and thermal considerations Linear power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 2 db to 5 db of dynamic headroom to pass the loudest portions without distortion as compared with the average power output. From the TPA3 data sheet, one can see that when the TPA3 is operating from a 5-V supply into a 8-Ω speaker that 350 mw peaks are available. Converting watts to db: P db 0Log P W P ref 0Log 350 mw W 4.6 db Subtracting the headroom restriction to obtain the average listening level without distortion yields: 4.6 db 5 db 9.6 db (5 db headroom) 4.6 db 2 db 6.6 db (2 db headroom) 4.6 db 9dB 3.6 db (9 db headroom) 4.6 db 6dB 0.6 db (6 db headroom) 4.6 db 3dB 7.6 db (3 db headroom) Converting db back into watts: P W 0 PdB 0 P ref mw (5 db headroom) 22 mw (2 db headroom) 44 mw (9 db headroom) 88 mw (6 db headroom) 75 mw (3 db headroom) 28 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TPA3 APPLICATION INFORMATION headroom and thermal considerations (continued) SLOS207C JANUARY 998 REVID MAY 2003 This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 350 mw of continuous power output with 0 db of headroom, against 2 db and 5 db applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 8-Ω system, the internal dissipation in the TPA3 and maximum ambient temperatures is shown in Table 3. Table 3. TPA3 Power Rating, 5-V, 8-Ω, BTL POWER MAXIMUM AMBIENT PEAK AVERAGE OUTPUT DISSIPATION TEMPERATURE (mw) POWER (mw) 0 CFM SOIC 0 CFM DGN 350 350 mw 600 46 C 4 C 350 75 mw (3 db) 500 64 C 20 C 350 88 mw (6 db) 380 85 C 25 C 350 44 mw (9 db) 300 98 C 25 C 350 22 mw (2 db) 200 5 C 25 C 350 mw (5 db) 80 9 C 25 C Table 3 shows that the TPA3 can be used to its full 350-mW rating without any heat sinking in still air up to 46 C. POST OFFICE BOX 655303 DALLAS, TEXAS 75265 29

PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-203 PACKAGING INFORMATION Orderable Device Status () Package Type Package Drawing Pins Package Qty Eco Plan TPA3D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) TPA3DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) TPA3DGN ACTIVE MSOP- PowerPAD TPA3DGNG4 ACTIVE MSOP- PowerPAD TPA3DGNR ACTIVE MSOP- PowerPAD TPA3DGNRG4 ACTIVE MSOP- PowerPAD DGN 8 80 Green (RoHS & no Sb/Br) DGN 8 80 Green (RoHS & no Sb/Br) DGN 8 2500 Green (RoHS & no Sb/Br) DGN 8 2500 Green (RoHS & no Sb/Br) TPA3DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) TPA3DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp ( C) Top-Side Markings (4) CU NIPDAU Level--260C-UNLIM 3 CU NIPDAU Level--260C-UNLIM 3 CU NIPDAU Level--260C-UNLIM AAB CU NIPDAU Level--260C-UNLIM AAB CU NIPDAU Level--260C-UNLIM AAB CU NIPDAU Level--260C-UNLIM AAB CU NIPDAU Level--260C-UNLIM 3 CU NIPDAU Level--260C-UNLIM 3 Samples () The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either ) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page

PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-203 (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-207 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPA3DGNR Package Type MSOP- Power PAD Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W (mm) A0 (mm) B0 (mm) K0 (mm) P (mm) W (mm) Pin Quadrant DGN 8 2500 330.0 2.4 5.3 3.4.4 8.0 2.0 Q TPA3DR SOIC D 8 2500 330.0 2.4 6.4 5.2 2. 8.0 2.0 Q Pack Materials-Page

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-207 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA3DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0 TPA3DR SOIC D 8 2500 367.0 367.0 38.0 Pack Materials-Page 2

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