EEE1016 Electronics I

EEE1016 Electronics I: Appendices EEE1016 Electronics I Experiment BE1: Diode Circuits 1.0 Objectives To observe the operations of a half-wave rectifier and a full-wave bridge rectifier To observe the effects of shunt capacitance and load resistance on the outputs of various rectifier circuits To observe the operations of several diode clipping circuits To observe the operation of a diode clamping circuit 2.0 Apparatus Diode and Transistor Circuits experiment board DC Power Supply Dual-trace Oscilloscope Function Generator Digital Multimeter Connecting wires 3.0 Introduction The p-n junction diode is the most common type of solid-state device. One side of the p-n junction is a p-type semiconductor and another side is an n-type semiconductor. The p- type end is the anode while the n-type end is the cathode. The conceptual structure, the typical appearance, and the schematic symbol of a diode are shown in Figure 1. When the potential applied to the cathode is more positive than that at the anode, the diode is said to be in the reversed bias condition. Ideally, no current can flow through the device. When the voltage at the anode is more positive than that at the cathode, this condition is called forward bias. Figure 2 shows the typical I-V characteristic of a diode. If the forward bias voltage is less than a threshold value, known as the cut-in voltage V, the current flowing through the diode is very small. As soon as the applied voltage gets above this cut-in voltage, the current will rise rapidly. This cut-in voltage is approximately 0.2 V for a germanium diode and 0.6 V for a silicon diode. conceptual structure anode p n cathode V typical shape I(mA) anode anode cathode circuit symbol cathode 3 2 1 V Figure 1 Figure 2 ma V Faculty of Engineering, Multimedia University Page 1

EEE1016 Electronics I: Appendices Consider a silicon diode that is connected in series with a 1 k resistor, as shown in Figure 3. When a battery voltage of 3 V is applied, the diode is forward-biased and an electric current will start to flow in both the diode and the resistor. The voltage across the resistor will rise to a value V R = I R which is slightly lower than 2.4 V. The current is limited to 2.4 ma (= 2.4 V/1 k ). This voltage will not rise above 2.4 V because otherwise the voltage across the diode will become lower than 0.6 V, which will then put the diode into a high resistance state that will allow only a very small current to flow in the circuit. Therefore, in the analysis of a diode circuit, we can usually assume the voltage across a silicon diode to be 0.6 V, provided that the voltage source in the circuit is higher than 0.6 V and the polarity is to bias the diode in the forward direction (forward biased). The diode acts like a switch that is turned on. If the polarity is reversed, the diode will be reverse-biased and no current can flow in the circuit. In this condition, the diode acts like a switch that is turned off. As a result, the voltage across the resistor will become zero (since I = 0). 3V 0.6V - I Figure 3 1 k - V R Due to the unidirection characteristic of the device, a diode can be configured as a rectifier that allows current flow for only half a cycle of an AC waveform. A half-wave rectifier circuit is shown in Figure 4. When the potential at point A is more positive than that at point B, i.e. the supply voltage is positive, the diode is forward-biased. The voltage across the resistor will have the same waveform as the supply voltage (minus away 0.6V, to be exact). In the second half cycle, the voltage at A becomes negative, so the diode is reverse-biased. The voltage across the resistor will be zero throughout this half cycle. As a result, a half-wave waveform is obtained at the resistor. As the current flows only in the X-to- Y direction, therefore a direct current is obtained from the AC source. AC voltage A B - X R V o - Y Figure 4 v V m V o 2 t Since the above diode circuit operates only for half a cycle, the efficiency is low. A bridge-rectifier circuit constructed using 4 diodes, as shown in Figure 5, can be used to double the efficiency. In the first half cycle of an AC waveform, diodes D1 and D2 are turned on while D3 and D4 are off. Current flows from X to Y. In the second half cycle, when the potential at point B is more positive than point A, diode D3 and D4 are on while D1 and D3 are turned off. Current flows from X to Y again. Since there is always a current flow during both the positive cycle and the negative cycle, a rectified full-wave waveform is obtained, as Faculty of Engineering, Multimedia University Page 2

EEE1016 Electronics I: Appendices shown in Figure 5. Note that there is 1.2 V (=2 0.6 V) lost in V o because 2 diodes conduct in series. n:1 A =nv m sin t B D 2 D 4 D 1 D 3 X Y R L - V o Figure 5 A rectifier circuit is usually used to convert an AC voltage into a DC voltage. A transformer can be connected to the 240 V AC mains supply at the wall outlet to step down the voltage to a desired level. The large ripples in the half-wave and full-wave rectified waveforms can be suppressed using a capacitor filter connected in parallel with the load resistor (see Figure 6). This provides a more stable DC voltage, comparable to a battery, for operating an electronic system. However, the ripple cannot be totally eliminated. The amplitude of the residual ripple depends on the size of the capacitor and the load resistance. If the load resistance is small, a large capacitance is required to obtain a DC source with acceptably small ripples. v o V m D 1 & D 2 on D 3 & D 4 on D 1 & D 2 on t v o V i C R L V o V m V m on off on off - V 1 V 1 input Figure 6 T=1/f t 1 t 2 t Diodes can also be used to change the shape of an AC waveform. The circuits in Figure 7 are known as the clipping circuits. The diodes are turned on for only the period of time when the AC voltage is at least 0.6 V higher than the reference voltage, V ref. During this period, a current flow through the diode and the voltage across the diode is about 0.6 V. As a result, part of the output AC waveform, V o, is clipped off. R - V ref - V o V ref - V γ V ref V - Figure 7(a) Vo 2 t R V m - V γ V m -V Vo - V ref - - V o V ref Figure 7(b) Vref 2 t Faculty of Engineering, Multimedia University Page 3

EEE1016 Electronics I: Appendices Another wave shaping circuit, as shown in Figure 8, is the clamping circuit. The capacitor is fully charged to the peak voltage of the AC source when the diode is forwardbiased. (For simplicity, we have assumed the forward voltage drop of the diode is negligible.) As the diode acts like a switch that is turned on, the output voltage taken across the diode is zero when the AC waveform is at its peak. As soon as the AC voltage falls below the peak value, the diode becomes reverse-biased by the voltage sum of the transformer and the capacitor which is a negative value. The resulting waveform is an AC waveform that is clamped down below zero volt. If the 0.6 V forward voltage drop of the diode is considered, the capacitor is charge to (V m 0.6) V and the average value of V o is (V m 0.6 ) V. The V o peak voltage is 0.6 V above zero volt. C V m ~ V o -Vm 0.6 t - V o Instructions Figure 8 The lab is divided into two parts: Part A Theoretical Prediction and Part B Experiment. Read through both parts carefully, attempt and prepared for all the questions in both parts. Students must complete the theoretical predictions before attending the corresponding lab session. During the processes of theoretical predictions, students should attempt to understand the purposes of the experiments. The Short Report Form for Part A has to be submitted to the Lab s technician at least two days before the scheduled lab session. The instructor will check your predictions and then return it back to you during your lab session. Use the predicted results to verify your measured data. Students are required to submit the Short Report Form for Part B, attached with Short Report Form for Part A immediately after the lab session. Cautions Oscilloscope: Make sure the INTENSITY of the displayed waveforms is not too high, which can burn the screen material of the oscilloscope. Function generator: Never short-circuit the output (the clip with red sleeve), which may burn the output stage of the function generator. Sketching oscilloscope waveforms on graph papers Refer to Appendix D for efficient waveform sketching. Factors affecting your experiment progress Your preparation before coming to the lab (your understanding on the theories, the procedures and the information in the appendices; your planning to carry out the experiments and to take data), attempt all questions before the lab. Your understanding on the functions and the operations of the equipment (Your learning on using the equipment during the Induction Program Lab Session; your understanding on checking and presetting the equipment) The technique you use to sketch waveforms on graph papers Faculty of Engineering, Multimedia University Page 4

EEE1016 Electronics I: Appendices Part A: Theoretical Predictions For the cases where is a sinusoidal voltage source, apply = 10 sin (2 10000t) V. 4.1 Half-wave Rectifier 1. Use diode forward voltage drop of 0.6 V, predict the maximum currents flow through the diode D1 (I D, max ) in the circuit of Experiment 4.1, if R3 = 18 k and 10 k. Record the values in Table T4.1 of the Short Report Form provided. 2. From Appendix E, find the more exact values of the diode forward voltage drops (V F ) at the corresponding maximum currents. 3. Predict the maximum V o voltages (V o, max ) for both cases. 4. Predict the minimum V o voltage (V o,min ). 4.2 Full-wave Rectifier 1. Use diode forward voltage drop of 0.6 V, predict the maximum currents flow through the diodes (I D, max ) in the circuit of Experiment 4.2, if R3 = 18 k and 10 k. Note that two diodes conduct at a time. Record the values in Table T4.2. 2. From Appendix E, find the more exact values of the diode forward voltage drops (V F ) at the corresponding maximum currents. 3. Predict the maximum V o voltages (V o, max ) for both cases. 4. Predict the minimum V o voltage (V o, min ). 4.3 Clipping Circuits 1. Use diode forward voltage drop of 0.7 V when = 5 to 10 V, 0.65 V when = 2 to 4 V and 0.6 V when = 1 V, predict the currents flow through the diode (I D ) in Procedure 1 of Experiment 4.3 when = 1, 2, 3, 5, 10 V. Record the values in Table T4.3 (a). 2. From Appendix E, find the more exact values of the diode forward voltage drops (V F ) at the corresponding diode currents. (Note for more precise results, iteration is required. Iteration: start with a V F to calculate I D and then find new V F. Use this new V F value to calculate I D and find another new V F. The process is repeated until subsequent V F values are about the same.) 3. The set of values predicted in the above steps 1 and step 2 can be used to compare with the sketched waveform in the experimental Procedure 2 of Experiment 4.3. Note in this case V F = V o. 4. Predict the minimum V o voltage (V o,min ). 5. Hence, you have known that the dependence of V F on I D. For simplicity, use fixed V F = 0.7 V to predict V o, max and V o min for Procedure 4, Procedure 6 and Procedure 8 of Experiment 4.3 for V DC = 0, 2, 4, 6 V. Note that the largest I D in Procedure 8 is (16 0.7)/1k = 15.3 ma. Record the values in Table T4.3 (b), Table T4.3 (c) and Table T4.3 (d), respectively. 4.4 Clamping Circuit 1. With fixed V F = 0.7 V, predict V o, max and V o min for Procedure 1 of Experiment 4.4 for V DC = 0, 2, 4, 6 V. Record the values in Table T4.4. Faculty of Engineering, Multimedia University Page 5

EEE1016 Electronics I: Appendices Part B: Experiments 4.0 Diode test Procedures Referring to the circuit board layout in Appendix A, without any connections, test all the diodes on the board by using the go/no-go testing method. 1. Set a multimeter in diode test mode (note that some multimeters need to push in two buttons together to set diode test mode as indicated on the control panel). The COM terminal is negative and the V,, ma terminal is positive. 2. Test the diode D1 on the board in forward-biased condition, i.e. connect terminal to anode the and to the cathode. A good diode will give forward voltage drop of about 0.7 V or 700 mv. Record the reading in Table E4.0. 3. Repeat Procedure 2 for other diodes. Equipment Setups for Experiments 4.1 to 4.4 (Refer to Appendix C for brief information or the Induction Program Lab Sheets for more information) 1. Before starting the experiment, check and verify that the equipment (oscilloscope and function generator) to be used is functioning properly, including voltage probes [see Appendix B]. 2. Set the vertical sensitivities of CH1 and CH2 of the oscilloscope to 5 V/div. Set the horizontal (time base) sensitivity to 20 s/div. Make sure the variable knobs of Volt/div and Time/div at the calibrated (CAL D) positions. Set the input couplings (AC/GND/DC switches) of CH1 and CH2 to DC. Set the vertical mode to dual waveform display. Set the trigger source to CH1 and the triggering mode/coupling to AUTO. [For other presetting, refer to Appendix C] 3. Set the function generator for a 10 khz sine wave with 10 V amplitude. Check the waveform using the oscilloscope. 4. Connect the sine wave to terminals P1 - P2 (ed at P2). See the circuit board layout in Appendix A. 5. Connect a probe from CH1 of the oscilloscope to P1 P2 (ed at P2). 6. Connect the second probe from CH2 to T9 - P5 (ed at P5). 7. Carry out the following experiments with these setups. 4.1 Half-wave Rectifier Procedures 1. Using the circuit board provided, construct the circuit as shown below by connecting T1 to TA5, T2 to TA6, T7 to TA17, T8 to TA18, and T3 to T4. in 1 : 1 D1 R3 V O oscilloscope 2. Align the levels of CH1 and CH2 as indicated in Graph E4.1 (a). Finely adjust the function generator frequency so that CH1 waveform ( ) has period of 5 divisions (5 div x 20 s/div = 100 s which is approximately equal to 1/f gen, where f gen is the frequency Faculty of Engineering, Multimedia University Page 6

EEE1016 Electronics I: Appendices reading displayed on the function generator). Adjust the oscilloscope trigger level and the CH1 horizontal position so that CH1 waveform has peaks at the positions as shown in Graph E4.1 (a). This step is important for V o waveform to be drawn with respect to waveform. Keep the oscilloscope ON all the time because it needs to be warmed up. 3. Sketch the CH2 waveform (V o ) displayed on the oscilloscope on Graph E4.1 (a). Do not move the waveform positions during the sketching. Measure the maximum and the minimum voltages of CH2 waveform (V o, max and V o, min ) and record them in Table E4.1 (under column header: Procedure 3). Calculate the ripple voltage, V o,r = V o, max V o,min. 4. Repeat Procedure 3 for the following conditions at the rectifier output. Sketch the required V o waveforms on their corresponding graphs and record all the respective V o, max and V o, min in their corresponding columns in Table E4.1. (i) C3 (10 nf) and R3 (18 k ) in parallel (sketch V o waveform) (ii) C3 and R2 (10 k ) in parallel (iii) C2 (470 pf) and R3 in parallel (sketch V o waveform) (iv) C3 alone (v) C2 alone (sketch V o waveform) Ask the instructor to check your results. Show all the sketched waveforms, Table E4.1 readings and the waveforms of Procedure 4 (v) displayed on the oscilloscope. 4.2 Full-wave Rectifier Procedures 1. Construct the circuit as shown below. in 1 : 1 D3 D4 D5 D6 R3 V O oscilloscope oscillascope 2. Align the channel levels. Adjust and align the CH1 waveform as mentioned in Procedure 2 of Experiment 4.1. 3. Sketch V o waveform displayed on the oscilloscope on Graph E4.2 (a). Measure V o, max and V o, min and record them in Table E4.2. Calculate V o,r = V o, max V o,min. 4. Repeat Procedure 3 for the following conditions at the rectifier output. Sketch the required V o waveforms on their corresponding graphs and record all the respective V o, max and V o, min in their corresponding columns in Table E4.2. (i) C3 (10 nf) and R3 (18 k ) in parallel (sketch V o waveform) (ii) C3 and R2 (10 k ) in parallel (iii) C2 (470 pf) and R3 in parallel (sketch V o waveform) (iv) C3 alone (v) C2 alone (sketch V o waveform) Ask the instructor to check your results. Show all the sketched waveforms, Table E4.2 readings and the waveforms of Procedure 4 (v) displayed on the oscilloscope. Faculty of Engineering, Multimedia University Page 7

EEE1016 Electronics I: Appendices 4.3 Clipping Circuits Procedures 1. Construct the circuit as shown below. in 1 : 1 1k D V O oscilloscope oscillascope 2. Align the channel levels. Adjust and align the CH1 waveform as mentioned in Procedure 2 of Experiment 4.1. Sketch V o waveform displayed on the oscilloscope on Graph E4.3 (a) and label the waveform with V DC = 0 V. Record V o,max and V o,min in Table E4.3 (a) under V DC = 0 V column. 3. Set the DC Power Supply to 0 V. Set the current scale switch to LO (if any). Set the current adjustment knob to about ¼ turn from the min position. Make sure that the negative terminal of the DC power supply is not connected to the. 4. Switch off the DC power supply and connect it to the circuit as shown below. in 1 : 1 1k V DC D DC V O oscilloscope oscillascope 5. Switch on the DC power supply. Set it to V DC = 2 V (measured by a multimeter accurate to 0.1 V). Sketch V o waveform on Graph E4.3 (a). Record V o, max and V o,min in Table E4.3 (a). Repeat for V DC = 4 V and 6 V (accurate to 0.1 V). Label the waveforms. 6. Switch off the DC power supply. Construct the circuit as shown below. in 1 : 1 D 1k V DC DC V O oscilloscope oscillascope 7. Switch on the DC power supply. Set it to V DC = 0 V (turn the voltage knob of the power supply to the minimum position and then short the power supply output with a wire). Sketch V o waveform on Graph E4.3 (b). Record V o, max and V o,min in Table E4.3 (b). Repeat for V DC = 2, 4 and 6 V (accurate to 0.1 V). Label the waveforms. 8. Switch off the power supply and reconnect it to the circuit as shown below. in 1 : 1 D V DC 1k DC V O oscilloscope oscillascope Faculty of Engineering, Multimedia University Page 8

EEE1016 Electronics I: Appendices 9. Switch on the DC power supply. Sketch V o waveforms on Graph E4.3 (c) for V DC = 0, 2, 4 and 6 V (accurate to 0.1 V). Label the waveforms. Record V o, max and V o,min in Table E4.3 (c). Ask the instructor to check your results. Show all the sketched waveforms, table readings and the oscilloscope waveforms of Procedure 9 for V DC = 6 V. 4.4 Clamping Circuit Procedures 1. Make sure that the DC power supply is off. Construct the circuit as shown below. in 1 : 1 10nF V DC D DC V O oscillascope oscilloscope 2. Align the channel levels. Adjust and align the CH1 waveform as mentioned in Procedure 2 of Experiment 4.1. Sketch V o waveforms on Graph E4.4 for V DC = 0 V and 2 V (accurate to 0.1 V). Label the waveforms. Record V o,max and V o,min in Table E4.4. 3. Record also V o, max and V o, min when V DC = 4 V and 6 V. Calculate the peak-to-peak voltages of V o waveforms, V o, pp = V o, max V o,min. Ask the instructor to check your results. Show all the sketched waveforms, Table E4.4 readings and the oscilloscope waveforms of Procedure 3 for V DC = 6 V. Report Submission Students are to submit the report Part A and Part B together, immediately upon completion of the laboratory session. End of Lab Sheet Faculty of Engineering, Multimedia University Page 9

P1 P2 P3 P4 D3 D4 D5 R1 TA1 TA2 C1 TA3 TA4 D1 TA5 TA6 T1 T2 TA7 D6 TA10 T3 T5 T7 T9 TA11 TA13 TA15 TA17 C2 C3 R2 R3 D2 R4 TA8 P6 TA12 TA14 TA16 TA18 TA9 TA20 T4 T6 T8 T10 TA19 TA21 P7 P5 EEE1016 Electronics I: Appendices APPENDICES APPENDIX A: Circuit Board Layout V CC V CC V CC TRANSISTOR CIRCUIT VCC GND INPUT P8 P9 R17 R16 R18 P10 C5 TB1 TB2 VAR2 TB4 R15 TB5 TB6 TB7 TB8 R13 P12 R12 P11 R9 R10 TB3 TB9 TB10 R11 Q1 GND TB12 R14 TB13 P13 TB11 TB14 C6 DIODE CIRCUIT P16 P15 P14 TB15 VAR1 Voltage Source C4 R5 R6 R8 R7 Inverting Amplifier Q2 P17 P18 R1=1k R2=10k R3=18k R4=1k C1=10nF C2=470pF C3=10nF R5=120k R6=2.7k R7=1k R8=39k R9=39k R10=1k R11=2.7k R12=10k R13=110k R14=100 R15=150k R16=18k R17=1k R18=100 VAR1=10k VAR2=500k C4=0.1 F C5=0.1 F C6=47 F Circuit diagram improved by twhaw Apr 2002 Faculty of Engineering, Multimedia University Appendix A

EEN1016 Electronics I: Appendices APPENDIX B The Resistor color code chart Capacitance ABC.abc AB x 10 C pf 0.abc F Potentiometer EQUIPMENT CHECKS The go/no-go method of testing is used. Always do these checks before starting your experiment. Oscilloscope voltage probe check Use oscilloscope calibration (CAL) terminal. A good probe will give a waveform of positive square wave with 2 V peak-to-peak and about 1 khz. Oscilloscope channel check Use oscilloscope calibration (CAL) terminal and a good voltage probe. A good input channel will give the corresponding waveform of the CAL terminal. Function generator check Check the output waveform by oscilloscope. A good function generator will give a stable waveform on the oscilloscope screen. Caution: Never short-circuit the output to, this can burn the output stage of the function generator. Faculty of Engineering, Multimedia University Appendix B

EEN1016 Electronics I: Appendices APPENDIX C OSCILLOSCOPE INFORMATION Below are the functions of switches/knobs/buttons: INTENSITY knob: control brightness of displayed waveforms. Make sure the intensity is not too high. FOCUS knob: adjust for clearest line of displayed waveforms. TRIG LEVEL knob: adjust for voltage level where triggering occur (push down to be positive slope trigger and pull up to be negative slope trigger). Trigger COUPLING switch: Select trigger mode. Use either AUTO or NORM. Trigger SOURCE switch: Select the trigger source. Use either CH1 or CH2. HOLDOFF knob: seldom be used. Stabilize trigger. Pull out the knob is CHOP operation. This operation is used for displaying two low frequency waveforms at the same time. X-Y button: seldom be used. Make sure this button is not pushed in. POSITION (Horizontal) knob: control horizontal position of displayed waveforms. Make sure that it is pushed in (pulled up to be ten times sweep magnification). POSITION (vertical) knobs: control vertical positions of displayed waveforms. Pulled out CH1 POSITION knob leads to alternately trigger of CH1 and CH2. Pulled out CH2 POSITION knob leads to inversion of CH2 waveform. Time base: TIME DIV: provide step selection of sweep rate in 1-2-5 step. VARIABLE (for time div) knob: Provides continuously variable sweep rate by a factor of 5. Make sure that it is in full clockwise (at the CAL D position, i.e. calibrated sweep rate as indicated at the time div knob). Vertical deflection: VOLTS DIV: provide step selection of deflection in 1-2-5 step. VARIABLE (for volts div) knob: A smaller knob located at the center of VOLTS DIV knob. Fine adjustment of sensitivity, with a factor of 1/3 or lower of the panel-indicated value. Make sure that it is in full clockwise (at the CAL D position). Pulled out knob leads to increase the sensitivity of the panel-indicated value by a factor of 5 (x 5 MAG state). Make sure that it is pushed down. AC/GND/DC switches: select input coupling options for CH1 and CH2. AC: display AC component of input on oscilloscope screen. DC: display AC DC components of input on oscilloscope screen. GND: display level on screen, incorporate with AUTO trigger COUPLING selection). CH1/CH2/DUAL/ADD switch: select the operation mode of the vertical deflection. CH1: CH1 operates alone. CH2: CH2 operates alone. DUAL: Dual-channel operates with CH1 and CH2 swept alternately. This operation is used for displaying two high frequency waveforms at the same time. Note: Keep the oscilloscope ON. The oscilloscope needs an amount of warm up time for stabilization. CAUTION: Never allow the INTENSITY of the displayed waveforms too bright. This can burn the screen material of the oscilloscope. Faculty of Engineering, Multimedia University Appendix C

EEN1016 Electronics I: Appendices APPENDIX D Sketching oscilloscope waveforms on graph paper Sketch is a quick drawing technique without loss of important or interested information of the waveforms being sketched. Hence, the important or interested points of a waveform as displayed on the oscilloscope screen will be marked first on a graph paper before the waveform is sketched. Procedures 1. Set suitable time/div and V/div to display the interested waveform portions. Often, the required time/div and V/div are estimated first. 2. Mark & label channel level, normally at the vertical major grid position. 3. Mark the important/interested points. 4. Sketch the waveform by connecting the points together accordingly. 5. Label waveform labels (if more than one channel involved). 6. Write down time/div and V/div Example 1: A sinusoidal waveform is amplified through an amplifier with a delay network. Interested points: maxima, minima, points crossing level, etc Information retained: amplitudes, peak-to-peak values, period, phase shift, approximate shapes of the waveforms Note: The level is important to indicate the values of average, positive peak, negative peak, turning points, etc. CH2 Gnd V out CH1 Gnd V in 5 ms/div, CH1: 10 mv/div, CH2: 2 V/div Example 2: Diode clipping circuit with 2.5 V DC reference CH2 Gnd V out CH1 Gnd V in 20 s/div, CH1: 5 V/div, CH2: 5V/div Faculty of Engineering, Multimedia University Appendix D

EEN1016 Electronics I: BE1 APPENDIX E Diode and BJT characteristics Figure AE1: Forward voltage characteristics of diode 1N4148 (from National Semiconductor data sheets) Table AE 1: DC current gain h FE of 2N3904 at 25 C (from Motolora data sheets) Conditions (DC) h FE,min h FE,max I C = 0.1 ma, V CE = 1.0 V 40 - I C = 1.0 ma, V CE = 1.0 V 70 - I C = 10 ma, V CE = 1.0 V 100 300 Figure AE 2: PSpice simulated output characteristics of 2N3904 6.0mA 30 A 4.0mA 20 A 15 A 2.0mA 10 A 0.75mA 6.5 A 5 A 0A 0V 5V 10V 15V IC(Q1) V_Vce 10.1V 13V 15V Faculty of Engineering, Multimedia University Appendix E

EEN1016 Electronics I: BE1 Figure AE 3: Input resistance h ie of 2N3904 at V CE = 10 V, f = 1 khz and 25 C (from Motolora data sheets) 4.5k 0.75m Figure AE 4: DC current gain h FE curves of 2N3904 at V CE = 1.0 V and various junction temperature T J (from Motolora data sheets) Reading Log Scale Let the distance in a decade of the log scale in the figure below is measured as x mm. Since log 10 1 = 0, it is take as the origin (0 mm) in the linear scale. Then, the reading 10 is located x mm and the reading 0.1 is located at x mm. For reading y, it is located at [1og 10 (y)]*x mm. Examples: Reading 2.5 is loacted at [1og 10 (2.5)]*x mm = 0.39x mm Reading 0.25 is located at [1og 10 (0.25)]*x mm = -0.602x mm z / x Reversely, a point at z mm location is read as 10. Examples: 0.6x mm is read as 10 (0.6x/x) = 3.98-0.3x mm is read as 10 (-0.3x/x) = 0.501-0.3x 0.6x -x -0.602x 0 0.39x x Linear scale (mm) 0.1 0.2 0.3 0.5 1 2 3 5 10 0.25 2.5 5.01 3.98 wosiew Mar 2004, wosiew Sep 2005 Log scale (unit) Faculty of Engineering, Multimedia University Appendix E

EEE1016 Electronics I, Experiment BE1 Student s ID: EEE1016 Electronics I: Experiment BE1: Diode Circuits Student s I.D.: Student s Name: Major: Group: Date: Marking Scheme: Item Marks (BE1) Student s mark Part A: Theoretical Predictions 20 Part B: Experimental Results 40 Discussions and Conclusion 20 Rubrics Assessment 20 Total: 100 Note: Do take note that Part A is to be completed and submitted to the Supervisor prior to carrying out the experiment 1

EEE1016 Electronics I, Experiment BE1 Student s ID: Part A: Theoretical Predictions You must complete this part before proceeding to do EB1 Experiment 4.1 Half-wave Rectifier Table T4.1: Predicted V o, max of HW rectifier I D, max (ma) V F (V) V o, max (V) 18 k 10 k Predicted V o,min = V 4.2 Full-wave Rectifier Table T4.2: Predicted V o, max of FW rectifier I D, max (ma) V F (V) V o, max (V) 18 k 10 k Predicted V o,min = V 4.3 Clipping Circuits Table T4.3 (a): Predicted I D and V F of upper clipping circuit without V DC (4 marks) (V) 1 2 3 5 10 I D (ma) V F (V) Predicted V o,min = V Table T4.3 (b): Predicted V o, max and V o, min of upper clipping circuit with V DC (3 marks) V DC (V) 0 2 4 6 V o, max (V) V o, min (V) Table T4.3 (c): Predicted V o, max and V o, min of lower clipping circuit with V DC (3 marks) V DC (V) 0 2 4 6 V o, max (V) V o, min (V) 2

EEE1016 Electronics I, Experiment BE1 Student s ID: Table T4.3 (d): Predicted V o, max and V o, min of lower clipping circuit with V DC (3 marks) V DC (V) 0 2 4 6 V o, max (V) V o, min (V) 4.4 Clamping Circuit Table T4.4: Predicted V o, max and V o, min of clamping circuit V DC (V) 0 2 4 6 V o, max (V) V o, min (V) (3 marks) Note to the Instructor/ Sepervising Lecturer Please sign and stamp below to indicate that the student has completed Part A before the experiment is conducted Sign & Stamp : Date : Remarks: 3

ID NO:... STUDENT'S NAME: SUBJECT CODE AND TITLE: EEE1016 & ELECTRONICS 1 Experimental Title: Experiment BE1: Diode Circuits Preparation Before the Lab Criteria 1 (Need Improvement) 2(Satisfactory) 3(Good) 4(Excellent) 1 Understanding the operation of diode applications; the half-wave and fullwave rectifiers, the effects of shunt capacitor, clipping circuits and clamping circuits, by using the experiment board. Unable to understand the theory behind each diode application, and asking for help. Able to understand the theory of each diode application. Have a good knowledge of diode applications and their characteristics. Fully understand the theory and operation of halfwave and fullwave rectifiers, clippers and clampers as well as explain the behaviour using the experiment board. MARK Rating Awarded by Assessor Data Collection or Setting up the Experiment 2 The ability in constructing the circuits of diode applications. Unable to construct the circuits to demonstrate the understand of diode applications Able to construct the different circuits of diode applications with minimum supervision. Able to construct different circuits of diode applications without assistance Able to constrcut the different circuits of diode applications (rectifiers, clippers and clampers) without assistance and the expected results of the circuits. 3 The ability in using oscilloscope, function generator, digital multimeter and power supply. 4 The ability in collecting the measured data from multimeter and oscilloscope, and sketching the correct waveforms from oscilloscope. Do not fully understand how to use oscilloscope, function generator, digital multimeter and power supply. Unable to measure the correct data and sketch the correct waveforms. Know how to use oscilloscope, function generator, digital multimeter & power supply with minimal guidance. Able to measure the correct data and sketch the correct waveforms with minimal guidance. Know how to use the oscilloscope, function generator, digital multimeter and power supply without assistance. Able to measure the correct data and sketch the correct waveforms without assistance. Know and able to demonstrate to others how each equipment is used and set correctly. Able to measure and sketch the results correctly and neatly. Data Analysis 5 The ability to answer questions in the lab sheet with engineering/scientific explanations. Late Submission (penalty) Not able (or make no Able to answer questions in attempt) to asnwer questions the lab sheet. in the lab sheet. Able to answer questions in the lab sheet with appropriate supporting data. Able to answer correctly with good reasons using appropriate supporting data obtained from the experiment. AVERAGE MARK (total/number of criteria)

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: EEE1016 Electronics I: Experiment BE1: Diode Circuits Short Report Form (Part B) (Students must submit the report immediately upon completion of the laboratory session) Student s Name: Student s I.D.: Date: Group: Major: Part B: Experimental Results (Student who is found copying experimental results, discussions and conclusions from other group will immediately get ZERO marks in this overall experiment evaluation.) 4.0 Diode Test Table E4.0: Measured V F (1 mark) Diode D1 D2 D3 D4 D5 D6 Reading (V) 4.1 Half-wave Rectifier Graph E4.1 (a): and V O waveforms of HW rectifier [R3 only, Procedure 3] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Graph E4.1 (b): and V O waveforms of HW rectifier [C3//R3, Procedure 4 (i)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 1

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: Graph E4.1 (c): and V O waveforms of HW rectifier [C2//R3, Procedure 4 (iii)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Graph E4.1 (d): and V O waveforms of HW rectifier [C2 alone, Procedure 4 (v)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Table E4.1: Measured V o, max and V o, min of HW rectifier (3 marks) Procedure 3 4 (i) 4 (ii) 4 (iii) 4 (iv) 4 (v) V o, max (V) V o, min (V) V o, r (V) V o,r = V o, max V o,min Instructor s Check (after Table E4.1) Sign : Time : Remarks: 2

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: 4.2 Full-wave Rectifier Graph E4.2 (a): and V O waveforms of FW rectifier [R3 only, Procedure 3] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Graph E4.2 (b): and V O waveforms of FW rectifier [C3//R3, Procedure 4 (i)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Graph E4.2 (c): and V O waveforms of FW rectifier [C2//R3, Procedure 4 (iii)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Graph E4.2 (d): and V O waveforms of FW rectifier [C2 alone, Procedure 4 (v)] CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 3

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: Table E4.2: Measured V o, max and V o, min of FW rectifier (3 marks) Procedure 3 4 (i) 4 (ii) 4 (iii) 4 (iv) 4 (v) V o, max (V) V o, min (V) V o, r (V) V o,r = V o, max V o,min Instructor s Check (after Table E4.2) Sign : Time : Remarks: 4.3 Clipping Circuits Graph E4.3 (a): and V O waveforms of upper clipping circuit with V DC CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Table E4.3 (a): Measured V o, max and V o, min of upper clipping circuit with V DC V DC (V) 0 2 4 6 V o, max (V) V o, min (V) Graph E4.3 (b): and V O waveforms of lower clipping circuit with V DC CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Table E4.3 (b): Measured V o, max and V o, min of lower clipping circuit with V DC V DC (V) 0 2 4 6 V o, max (V) V o, min (V) 4

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: Graph E4.3 (c): and V O waveforms of lower clipping circuit with V DC CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Table E4.3 (c): Measured V o, max and V o, min of lower clipping circuit with V DC V DC (V) 0 2 4 6 V o, max (V) V o, min (V) Instructor s Check [after Table E4.3 (c)] Sign : Time : Remarks: 4.4 Clamping Circuit Graph E4.4: and V O waveforms of clamping circuit (V DC = 0V and 2 V cases only) CH1 & CH2: 5 V/div Time base: 20 s/div CH1 & CH2 Instructor s Check (after Table E4.4) Sign : Time : Remarks: Table E4.4: Measured V o, max and V o, min of clipping circuit V DC (V) 0 2 4 6 V o, max (V) V o, min (V) V o, pp (V) V o, pp = V o, max V o,min (3 marks) 5

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: Section 4.1 Discussions Explain why V o waveforms of Graph E4.1(b) and (c) are different. Conclusion For the half-wave rectifier circuit, the difference between the maximum output voltage (V o,max ) and the maximum input voltage (V i,peak ) is. This is caused by. The output ripple voltage (V o,r ) can be reduced by and at fixed input frequency. Section 4.2 Discussions 1. Identify the common feature of all the results (besides full-wave feature). Explain why. 2. Explain the reasons why the V o,r value in Procedure 4(i) is different from that in Section 4.1. Conclusion For the full-wave rectifier circuit, the difference between V o,max and V i,peak is. This is caused by. At the same input frequency, and, V o,r is as compared with that of the half-wave rectifier circuit. 6

EEE1016 Electronics I, Experiment BE1, Short Report Form Student s ID: Section 4.3 Discussions 1. Identify the common feature of each type of the clipping circuit (besides the type of clipping feature). Explain why. (2marks) Conclusion The upper clipping circuit has V o,max = above the DC supply voltage. This is because. The lower clipping circuit has V o,min =. However, the V o,max is which is caused by. Section 4.4 Discussions 1. Identify the common feature of the clamping circuit (besides clamping feature). Explain why. 2. Explain how diode D should be connected in order for the AC waveform to be totally clamped up so that the negative peak point is above 0V. Conclusion The clamping circuit has V o average voltage of. This is because the capacitor is charged to. The V o peak-to-peak voltage is and V o amplitude is. 7