AOD454A N-Channel Enhancement Mode Field Effect Transistor

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Transcription:

NChannel Enhancement Mode Field Effect Transistor General Description The AOD454A uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. With the excellent thermal resistance of the DPAK package, this device is well suited for high current load applications. RoHS Compliant Halogen Free* Features V DS (V) = V I D = A (V GS = V) R DS(ON) < mω (V GS = V) R DS(ON) < mω (V GS = 4.5V) % UIS Tested! % Rg Tested! TO252 DPAK Top View Bottom View D D D S G G S G S Absolute Maximum Ratings T A =25 C unless otherwise noted Parameter Symbol DrainSource Voltage V DS GateSource Voltage Continuous Drain Current B,H Pulsed Drain Current C Avalanche Current C Repetitive avalanche energy L=.mH C Power Dissipation B Power Dissipation A T C = C T C = C T A =25 C T A =7 C Junction and Storage Temperature Range V GS I D I DM I AR E AR P D P DSM T J, T STG Maximum ± 5 4 9.8 37 8 2.5.6 55 to 75 Units V V A mj W C Thermal Characteristics Parameter Maximum JunctiontoAmbient A,G Maximum JunctiontoAmbient A,G Maximum JunctiontoCase F t s SteadyState SteadyState Symbol Typ Max Units 6.7 25 C/W R θja 5 C/W R θjc 3 4 C/W

Electrical Characteristics (T J =25 C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units STATIC PARAMETERS BV DSS DrainSource Breakdown Voltage I D =25µA, V GS =V V V DS =V, V GS =V I DSS Zero Gate Voltage Drain Current µa T J =55 C 5 I GSS GateBody leakage current V DS =V, V GS = ±V ± na V GS(th) Gate Threshold Voltage V DS =V GS I D =25µA.7 2.5 3 V I D(ON) On state drain current V GS =V, V DS =5V A R DS(ON) Static DrainSource OnResistance 24 T J =25 C 37 46 g FS Forward Transconductance V DS =5V, I D =2A 25 S V SD Diode Forward Voltage I S =A,V GS =V.76 V I S Maximum BodyDiode Continuous Current 2.5 A DYNAMIC PARAMETERS C iss Input Capacitance 56 65 pf C oss Output Capacitance V GS =V, V DS =V, f=mhz 82 pf C rss Reverse Transfer Capacitance 43 pf R g Gate resistance V GS =V, V DS =V, f=mhz 4.6 Ω SWITCHING PARAMETERS Q g Total Gate Charge 8.3.8 nc V GS =V, V DS =V, Q gs Gate Source Charge 2.3 nc I D =2A Q gd Gate Drain Charge.6 nc t D(on) TurnOn DelayTime 6.4 ns t r TurnOn Rise Time V GS =V, V DS =V, R L =.6Ω, 3.6 ns t D(off) TurnOff DelayTime R GEN =3Ω 6.2 ns t f TurnOff Fall Time 6.6 ns t rr Body Diode Reverse Recovery Time I F =2A, di/dt=a/µs 8 24 ns Q rr Body Diode Reverse Recovery Charge I F =2A, di/dt=a/µs nc COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. V GS =V, I D =2A V GS =4.5V, I D =8A A: The value of R θja is measured with the device in a still air environment with T A =25 C. The power dissipation P DSM and current rating I DSM are based on T J(MAX) =5 C, using t s junctiontoambient thermal resistance. B. The power dissipation P D is based on T J(MAX) =75 C, using junctiontocase thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T J(MAX) =75 C. D. The R θja is the sum of the thermal impedence from junction to case R θjc and case to ambient. E. The static characteristics in Figures to 6 are obtained using < µs pulses, duty cycle.5% max. F. These curves are based on the junctiontocase thermal impedence which is measured with the device TBD mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX) =75 C. The SOA curve provides a single pulse ratin g. TBD G. These tests are performed with the device mounted on in 2 FR4 board with 2oz. Copper, in a still air environment with T A =25 C. H. The maximum current rating is limited by bondwires. *This device is guaranteed green after data code 8X (Sep ST 8). Rev3: July mω

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS V 4.V 4.5V V DS =5V 4.V I D (A) I D (A) 3.5V VGS=3.V 2 3 4 5 V DS (Volts) Figure : OnRegion Characteristics 25 C 25 C.5 2 2.5 3 3.5 4 4.5 5 V GS (Volts) Figure 2: Transfer Characteristics 38 2 R DS(ON) (mω) 36 34 32 28 26 24 V GS =4.5V V GS =V Normalized OnResistance.8.6.4.2.8 V GS =V I D =2A V GS =4.5V I D =8A 22 5 5 I D (A) Figure 3: OnResistance vs. Drain Current and Gate Voltage.6 5 25 25 5 75 25 5 75 Temperature ( C) Figure 4: OnResistance vs. Junction Temperature mj 8 7 6 I D =2A 5 R DS(ON) (mω) 5 25 C 25 C I S (A)... 25 25 C. 3 4 5 6 7 8 9 V GS (Volts) Figure 5: OnResistance vs. GateSource Voltage...2.4.6.8..2 V SD (Volts) Figure 6: BodyDiode Characteristics

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 8 V DS =V I D =2A C iss V GS (Volts) 6 4 Capacitance (pf) C oss 2 C rss 2 3 4 5 6 7 8 9 Q g (nc) Figure 7: GateCharge Characteristics 5 5 25 35 V DS (Volts) Figure 8: Capacitance Characteristics I D (Amps) R DS(ON) limited DC µs µs ms ms ms Power (W) T J(Max) =75 C. T J(Max) =75 C V DS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F)..... Figure : Single Pulse Power Rating Junctionto Case (Note F) Z θjc Normalized Transient Thermal Resistance.. D=T on /T T J,PK =T c P DM.Z θjc.r θjc R θjc =4 C/W Single Pulse 5 In descending order D=.5,.3,.,.5,.2,., single pulse..... Figure : Normalized Maximum Transient Thermal Impedance (Note F) P D T on T

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 6 Power Dissipation (W) 5 Current rating I D (A) 25 5 5 25 5 75 25 5 75 T CASE ( C) Figure 2: Power Derating (Note B) 25 5 75 25 5 75 T CASE ( C) Figure 3: Current Derating (Note B) T J(Max) =5 C T A =25 C Power (W).... Figure 4: Single Pulse Power Rating JunctiontoAmbient (Note G) Z θja Normalized Transient Thermal Resistance... In descending order D=.5,.3,.,.5,.2,., single pulse Single Pulse D=T on /T..... 5 T J,PK =T A P DM.Z θja.r θja R θja = C/W Figure 5: Normalized Maximum Transient Thermal Impedance (Note G) P D T on T

Gate Charge Test Circuit & W aveform Qg V Qgs Qgd Ig Charge Resistive Switching Test Circuit & Waveforms RL Rg 9% % td(on) t r t d(off) t f t on t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 E = /2 LI AR AR BV DSS Id Rg Id I AR Diode Recovery Test Circuit & W aveforms Q = Idt rr Ig Isd L Isd I F di/dt I RM t rr