EE/COE 152: Basic Electronics. Lecture 3. A.S Agbemenu. https://sites.google.com/site/agbemenu/courses/ee-coe-152

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EE/COE 152: Basic Electronics Lecture 3 A.S Agbemenu https://sites.google.com/site/agbemenu/courses/ee-coe-152 Books: Microelcetronic Circuit Design (Jaeger/Blalock) Microelectronic Circuits (Sedra/Smith) Outline PN Junction Diode Operation Modes Diode Models Diode Circuit Analysis Rectifier Circuits

PN Junction A PN junction is formed when a P-type (acceptor) semiconductor is joined to a N-type (donor) semiconductor such that the crystal structure remains continuous at the boundary This type of semiconductor configuration is call a diode Physical Structure of the Diode

The PN Characteristics Electrons diffuse from the n-region junction to the p-region junction This diffusion created negative ions at the p-side of the junction and positive ions at the n-side of the junction Enough potential is built up to prevent any further diffusion of charge carriers This potential is Barrier/Junction Potential and the charged region Depletion region/layer

The Diode The diode operates in three modes No Bias Mode Forward Bias Mode When no external voltage is applied to the terminals When the terminals are connected such that the positive terminal is connected to the P-region and the negative terminal is connected to the N-region Reverse Bias Mode When the negative terminal is connected to the P-region and the positive terminal to the N-region No Bias Mode Majority carriers diffuse into other region causing diffusion current, ID Thermally generated minority charge carriers drift ( generate drift current, I s) across the junction due to electric field generated by the depletion region.

Reverse Bias Mode In this mode the junction potential is effectively reinforced widening the depletion layer Free electrons from the n-region are attracted towards the positive terminal and electrons from the negative terminal enter the p-region widening the depletion layer Reverse Bias Mode In reverse bias mode a small leakage current flows through the junction Increasing the reverse voltage sufficiently will overheat the junction. This voltage is the breakdown voltage The thermal energy created large electron-hole pair causing large currents to flow in a phenomenon called avalanche breakdown

Forward Bias Mode In this mode, the electric filed is applied in the opposite direction to the barrier potential which results in the depletion layer becoming very thin When the applied voltage is greater than the barrier potential( 0.7V for silicon and 0.3V for germanium), the diode starts conducting Diode Characteristics Curve I-V characteristic curve of a diode

Generalized Diode Operation Open Circuit, I D = IS Reverse Biased, I D < IS Forward Biased, I D >> IS

Diode Models In the forward bias mode, the diode can be modeled with Ideal Model Constant Voltage Drop Model The diode is modeled as a switch with no resistance The diode is modeled as having a constant voltage drop after which it behave as a switch Exponential I-V Model The diode equation defines the operation of the diode Ideal Diode Model

Ideal Diode Model Diode does not drop any voltage across the terminal Constant Voltage Drop Model

Constant Voltage Drop Model Diode drop constant voltage across it's terminal (typically 0.7V for silicon) Exponential I-V Model This model is defined by the diode equation

Diode Equation v qv D D i D I S exp 1 I S exp nkt nvt where IS vd q k T n 1 = = = = = = reverse saturation current (A) voltage applied to diode (V) electronic charge (1.60 x 10-19 C) Boltzmann s constant (1.38 x 10-23 J/K) absolute temperature nonideality factor (dimensionless) kt = thermal voltage (V) (25 mv at room temp.) VT= q IS is typically between 10-18 and 10-9 A, and is strongly temperature dependent due to its dependence on ni2. The nonideality factor is typically close to 1, but approaches 2 for devices with high current densities. It is assumed to be 1 in this text. Diode Equation IS, the reverse bias saturation current for an ideal p-n diode is (Schubert 2006, 61) where IS is the reverse bias saturation current, e is elementary charge A is the cross-sectional area Dp,n are the diffusion coefficients of holes and electrons, respectively, ND,A are the donor and acceptor concentrations at the n side and p side, respectively, ni is the intrinsic carrier concentration in the semiconductor material, τp,n are the carrier lifetimes of holes and electrons, respectively.

Diode Equation Diode I-V characteristics curve showing Is Diode Models In the forward bias mode, the diode can be modeled with Ideal Model Constant Voltage Drop Model The diode is modeled as a switch with no resistance The diode is modeled as having a constant voltage drop after which it behave as a switch Exponential I-V Model The diode equation defines the operation of the diode

Diode Equations Reverse Bias: v id IS exp D 1 IS 0 1 IS nvt No Bias: v id IS exp D 1 IS 1 1 0 nvt Forward Bias: v v id IS exp D 1 IS exp D nvt nvt Diode Circuit Analysis The loop equation for the diode circuit is: V I D R VD This is also called the load line for the diode. The solution to this equation can be found by: Graphical analysis using the load-line method. Analysis with the diode s exponential model. Simplified analysis with the ideal diode model. Simplified analysis using the constant voltage drop (CVD) model. V and R may represent the Thévenin equivalent of a more complex 2-terminal network. The objective of diode circuit analysis is to find the quiescent operating point for the diode. Q-Point = (ID, VD)

Graphical Analysis Example Problem: Find diode Q-point Given data: V = 10 V, R = 10k. Analysis: 10 I D 104 VD To define the load line we use, For VD 0, ID 10V 10k 1 ma For VD 5V, ID 5V 10k 0.5 ma These points and the resulting load line are plotted. Q-point is given by intersection of load line and diode characteristic: Q-point = (0.95 ma, 0.6 V) Analysis Using Ideal Model If an ideal diode is forward-biased, the voltage across the diode is zero. If an ideal diode is reverse-biased, the current through the diode is zero. vd = 0 for id > 0 and id = 0 for vd < 0 Thus, the diode is assumed to be either on or off. Analysis is conducted in following steps: Select a diode model. Identify anode and cathode of the diode and label vd and id. Guess diode s region of operation from circuit. Analyze circuit using diode model appropriate for assumed region of operation. Check results to check consistency with assumptions.

Analysis using Ideal Model Since source is forcing current backward through diode assume diode is off. Hence ID = 0. Loop equation is: 10 VD 10 4 ID 0 Since source appears to force positive current through diode, assume diode is on. (10 0)V ID 1 ma ID 0 10k Our assumption is correct, and the Q-Point = (1 ma, 0V) VD 10V VD 0 Our assumption is correct and the Q-Point = (0, -10 V) Analysis using Constant Voltage Drop Model Analysis: Since the 10-V source appears to force positive current through the diode, assume diode is on. (10 Von )V 10k (10 0.6)V 0.940 ma 10k ID vd = Von for id > 0 and vd = 0 for vd < Von.

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