AP Description. Pin Assignments ADVANCED INFORMATION. Applications. Features. Typical Applications Circuit

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A, 16V, 500KHz ACOT SYNCHRONOUS DC/DC BUCK CONVERTER Description The is an adaptive constant on-time mode synchronous buck converter providing high efficiency, excellent transient response and high DC output accuracy for low-voltage regulation in digital TVs, set-top-boxes, and network systems. Pin Assignments Top View The constant-on-time control scheme handles wide input/output voltage ratios and provides low external component count. The internal proprietary circuit enables the device to adopt ultra-low ESR ceramic capacitors. BST 1 6 SW The adaptive on-time control supports seamless transition between continuous conduction mode (CCM) at higher load conditions and discontinuous conduction mode (DCM) at lighter load conditions. GND FB 3 5 4 VIN EN DCM allows to maintain high efficiency at light load conditions. The also features UVLO, OTP, and OCP to protect the circuit. TSOT6 This IC is available in TSOT6 package. Features Applications V IN 4.5V to 16V A Continuous Output Current,.5A Valley Efficiency Up to 95% Automated Light Load improvement V OUT Adjustable to 0.6 to 6V 500kHz Switching Frequency Internal Soft-Start Enable Pin Over current Protection (OCP) with Hiccup Thermal Protection Totally Lead-Free & Fully RoHS Compliant (Notes 1 & ) Halogen and Antimony Free. Green Device (Note 3) Gaming Consoles Flat Screen TV sets and Monitors Set Top Boxes Distributed power systems Home Audio Consumer electronics Network Systems FPGA, DSP and ASIC Supplies Green Electronics Notes: 1. No purposely added lead. Fully EU Directive 00/95/EC (RoHS) & 011/65/EU (RoHS ) compliant.. See http:// for more information about Diodes Incorporated s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Applications Circuit INTPUT C1 10μF 5 IN 4 EN 1 BST 6 SW 3 FB C5 100nF L1.μH Cff R1 10kΩ R 10kΩ OUTPUT VOUT 1.V C μf GND Figure 1. Typical Application Circuit 1 of 19 Figure. Load Transient 0 to A

Pin Descriptions Pin Name Pin Number TSOT6 BST 1 Function High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel MOSFET a 0.01µF or greater capacitor from SW to BST to power the high side switch. GND Power Ground. FB 3 Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. See Setting the Output Voltage. EN 4 VIN 5 SW 6 Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. Attach to IN with a 100kΩ pull up resistor for automatic startup. Power Input. VIN supplies the power to the IC, as well as the step-down converter switches. Drive VIN with a 4.5V to 16V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See Input Capacitor. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BST to power the high-side switch. Functional Block Diagram 4 EN UVLO Logic Control Internal Reference 5V Vcc Regulator 5 VIN 3 FB Se SS + SW 0.6V + - + Min Off Time S R Q Q Soft Start SS OCP SW Ref 5V 1 BST Digital Control Logic On Time Compute One Shot 6 SW VIN Frequency Lock Loop GND Figure. Functional Block Diagram of 19

Absolute Maximum Ratings (Note 4) (@T A = +5 C, unless otherwise specified.) Notes: Symbol Parameter Rating Unit V IN Supply Voltage -0.3 to 0 V V SW Switch Node Voltage -1.0 to V IN +0.3 V V BST Bootstrap Voltage V SW -0.3 to V SW +6.0 V V FB Feedback Voltage -0.3V to +6.0 V V EN Enable/UVLO Voltage -0.3V to +16.0 V T ST Storage Temperature -65 to +150 C T J Junction Temperature +160 C T L Lead Temperature +60 C ESD Susceptibility (Note 5) HBM Human Body Mode 000 V CDM Charge Device Model 1000 V 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Symbol Parameter Rating Unit θ JA Junction to Ambient TSOT6 1 C/W θ JC Junction to Case TSOT6 8 C/W 6. Test condition for SOT6: Device mounted on FR-4 substrate, single-layer PC board, oz copper, with minimum recommended pad layout Recommended Operating Conditions (Note 7) (@T A = +5 C, unless otherwise specified.) Symbol Parameter Min Max Unit V IN Supply Voltage 4.5 16 V T A Operating Ambient Temperature Range -40 +85 C 7. The device function is not guaranteed outside of the recommended operating conditions. 3 of 19

Electrical Characteristics (@T A = +5 C, V IN = 1V, unless otherwise specified.) Symbol Parameter Test Conditions Min Typ Max Unit I SHDN Shutdown Supply Current V EN = 0V 0.1 1.0 µa I Q Supply Current (Quiescent) V EN =.0V, V FB = 1.0V 0.8 ma R DS(ON)1 R DS(ON) High-Side Switch On-Resistance (Note 8) Low-Side Switch On-Resistance (Note 8) 150 mω 90 mω I VALLEY_LIMIT LS Valley Current Limit (Note 8) T A = -40 C to +85 C 1.9.5 3 A F SW Oscillator Frequency 500 khz D MAX Maximum Duty Cycle 75 % T ON Minimum On Time 130 ns V FB Feedback Voltage T A = -40 C to +85 C, CCM 591 600 609 mv V EN_H EN Logic High 1.8 V V EN_L EN Logic Low 0.4 V I EN EN Input Current V EN = V 6 μa V EN = 0V 0 μa UVLO V IN Under Voltage Threshold Rising T A = -40 C to +85 C 3.55 3.9 4.5 V V IN Under Voltage Threshold Hysteresis 300 mv T SS Soft-Start Period 0.8 ms T SD Thermal Shutdown (Note 8) 150 C Thermal Hysteresis (Note 8) 0 C 8. Compliance to the datasheet limits is assured by one or more methods: production test, characterization, and/or design. 4 of 19

Typical Performance Characteristics (@T A = +5 C, V IN = 1V, V OUT = 1.V, unless otherwise specified.) 85 C 5 C -40 C 85 C -40 C 5 C VIN=16V VIN=1V Io=0mA Io=10mA VIN=4.5V Io=A 5 of 19

Typical Performance Characteristics (cont.) (@T A = +5 C, V IN = 1V, V OUT = 1.V, unless otherwise specified.) VIN=4.5V VIN=16V VIN=1V VO=1.V VO=.5V VO=3.3V VO=5.0V Vin=4.5V Vin=1V Vin=16V 6 of 19

Typical Performance Characteristics (cont.) (@T A = +5 C, V IN = 1V, V OUT = 1.V, L =.µh, C1 = 10µF, C = µf, unless otherwise specified.) Startup Through VEN 0A Load Startup Through VEN A Load Startup Through VIN A Load VEN (5V/DIV) VEN (5V/DIV) VIN (5V/DIV) IL (500mA/DIV) IL (A/DIV) IL (A/DIV) Time-500µs/div Shutdown Through VEN 0A Load VEN (5V/DIV) Time-500µs/div Shutdown Through VEN A Load VEN (5V/DIV) Time-500µs/div Shutdown Through VIN A Load VIN (5V/DIV) IL (500mA/DIV) Time-00ms/div Short Circuit Test IL (A/DIV) Time-0µs/div Short Circuit Recovery IL (A/DIV) Time-100µs/div Startup Through VIN 0A Load VIN (5V/DIV) IL (A/DIV) IL (500mA/DIV) Time-1ms/div Load Transient Response (0 to A) IL (A/DIV) Time-1ms/div Load Transient Response (0 to 1A) Time-500µs/div Shutdown Through VIN 0A Load VIN (5V/DIV) VOUT_AC (100mV/DIV) VOUT_AC (100mV/DIV) IOUT (1A/DIV) IOUT (1A/DIV) Time-100µs/div Time-100µs/div IL (500mA/DIV) Time-00ms/div Load Transient Response (1 to A) Switching State A Load Switching State 1A Load VOUT_AC (50mV/DIV) VOUT_AC (0mV/DIV) VOUT_AC (0mV/DIV) VIN_AC (00mV/DIV) VIN_AC (100mV/DIV) IOUT (1A/DIV) IL (A/DIV) IL (A/DIV) Time-100µs/div Time-1µs/div 7 of 19 Time-1µs/div

Application Information INPUT C1 10μF 5 IN 4 EN 1 BST 6 SW 3 FB C3 100nF L1.μH C5 R1 10kΩ R 10kΩ OUTPUT C μf VOUT 1.V GND Figure 3. Typical Application of PWM Operation and Adaptive On-time Control The is a synchronous step-down converter with internal power MOSFETs. Adaptive constant on time (acot) control is employed to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the high-side MOSFET is turned on for a fixed one shot timer, ON-time period. This one shot is calculated by the converter s input voltage (V IN) and the output voltage (V OUT) cycle-by-cycle based to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The high-side MOSFET turned off after the fixed on time expire and turn on the low-side MOSFET. Once the output voltage dropped below the output regulation, the low-side turned off. The one-shot timer then reset and the high-side MOSFET is turned on again. uses an adaptive on-time control scheme and does not have a dedicated in board oscillator. It runs with a pseudo-constant frequency of 650kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage. It can be calculated using the following equation: V OUT is the output voltage V IN is the input voltage f is the switching frequency V OUT TON VIN f After an ON-time period, the goes into the OFF-time period. The OFF-time period length depends on VFB in most case. It will end when the FB voltage decreases below 0.6V, then the ON-time period is triggered. If the OFF-time period is less than the minimum OFF time, the minimum OFF time will be applied, which is about 60ns typical. Power Save Mode The is designed with Power Save Mode (PSM) at light load conditions for high efficiency. The automatically reduces the switching frequency and changes the Ton time to Tmin-on time during a light load condition to get high efficiency and low output ripple. As the output current decreases form heavy load condition, the inductor current decreases as well, eventually its valley comes close to zero current, which is the boundary between CCM and DCM. The low side MOSFET is turned off when the inductor current reaches zero level. The load is provided only by output capacitor, when FB voltage is lower than 0.6V, the next ON cycle begins. The on-time is the minimum on time that benefits for decreasing V OUT ripple at light load condition. When the output current increases from light to heavy load the switching frequency increases to keep output voltage. The transition point to light load operation can be calculated using the following equation: T ON is on-time V VIN OUT ILOAD TON L 8 of 19

Application Information (cont.) Enable Above the EN high-level input voltage, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning on or off the regulator. To enable the, EN must be pulled above the EN high-level input voltage. To disable the, EN must be pulled below EN low-level input voltage. In Figure 3, EN is a high voltage input that can be safely connected to VIN (up to 16V) directly or through a 100KΩ pull-up to VIN for automatic start-up. Over Current Protection (OCP) Figure 4 shows the over current protection (OCP) scheme of AP65351. In each switching cycle, the inductor current is sensed by monitoring the low-side MOSFET during the OFF period. When the voltage between GND pin and SW pin is lower than the over current trip level, V LIMIT, the OCP will be triggered and the controller keeps the OFF state. A new switching cycle will begin when the measured voltage is higher than limit voltage. After 6µs, the internal OCL (Over Current Logic) threshold is set to a lower level and internal SS is discharged such that output is 0V. Then the switching action is blanked out for 0.6ms before soft start re-initiated and OCP threshold is restored to higher value. R S Q1 Q OC COMPARATOR VLIMIT Q Figure 4 Overcurrent Protection Scheme Under Voltage Lockout Undervoltage Lockout is implemented to prevent the IC from insufficient input voltages. The has a UVLO comparator that monitors the input voltage and the internal bandgap reference. If the input voltage falls below 3.9V, the will disable. In this event, both high-side and low-side MOSFETs are turned off. Thermal shutdown If the junction temperature of the device reaches the thermal shutdown limit of 150 C, the shuts itself off, and both HMOS and LMOS will be turned off. The output is discharged with the internal transistor. When the junction cools to the required level (130 C nominal), the device initiates soft-start as during a normal power-up cycle. Power Derating Characteristics To prevent the regulator from exceeding the maximum junction temperature, some thermal analysis is required. The temperature rise is given by: T PD JA RISE Where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, T J, is given by: T J T A T RISE T A is the ambient temperature of the environment. For TSOT6 package, the JA is 70C/W. The actual junction temperature should not exceed the absolute maximum junction temperature of 15C when considering the thermal design. The plot below is a typical derating curve versus ambient temperature. VOUT=5V VOUT=3.3V VOUT=.5V VOUT=1.V Figure 5 Output Current Derating Curve vs Temperature 9 of 19

Application Information (cont.) Setting the Output Voltage The output voltage can be adjusted from 0.6V using an external resistor divider. An optional C5, in figure 3, of 10pF to 47pF used to improve the transient response. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. Table shows a list of resistor selection for common output voltages. For high values of R1 there is less current consumption in the feedback network. R1 can be determined by the following equation: R 1 VOUT R 1 0.6 Output Voltage (V) Cout (uf) L(µH) C5 (pf) R1 (K) R (K) 1.. NC 10 10.5 3.6 NC 5.5 8.06 3.3 3.6 0-33 115 5.5 5 4.7 0-39 110 15 Inductor Table 1 Recommended Components Selection Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value: VOUT (VIN VOUT ) L VIN ΔIL fsw Where ΔIL is the inductor ripple current and f SW is the buck converter switching frequency. Choose the inductor ripple current to be 30% to 50% of the maximum load current. The maximum inductor peak current is calculated from: ΔIL IL(MAX) ILOAD Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with appropriate saturation current rating is important. A.µH to 4.7µH inductor with a DC current rating of at least 5% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor s DC resistance should be less than 100mΩ. Use a larger inductance for improved efficiency under light load conditions. Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has RMs rating greater than half of the maximum load current. Due to large di/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used it must be surge protected, otherwise, capacitor failure could occur. For most applications greater than 10µF, ceramic capacitor is sufficient. Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. Maximum capacitance required can be calculated from the following equation: ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout Ripple ΔI inductor *ESR An output capacitor with large capacitance and low ESR is the best option. For most applications, a µf to 68µF ceramic capacitor will be sufficient. To meet the load transient requirement, Co should be greater than the following: 10 of 19

Application Information (cont.) C o ΔI L(Iout (Δ V V inductor out) ) V out Where ΔV is the maximum output voltage overshoot. Bootstrap Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VBST and SW pin. A 0.1µF ceramic capacitor is sufficient. PC Board Layout 1. The works at A load current, heat dissipation is a major concern in layout the PCB. A oz Copper in both top and bottom layer is recommended.. Provide sufficient vias in the thermal exposed pad for heat dissipate to the bottom layer. 3. Provide sufficient vias in the Output capacitor GND side to dissipate heat to the bottom layer. 4. Make the bottom layer under the device as GND layer for heat dissipation. The GND layer should be as large as possible to provide better thermal effect. 5. Make the Vin capacitors as close to the device as possible. 6. Make the VREG5 capacitor as close to the device as possible. Keep sensitive signal trace away from SW Vout The trace connected to inductor and SW is recommended to be wide and short GND Cout L1 Wider trace of GND is better for thermal Add as many GND via as possible 1 BST 6 SW SW Cin Input Capacitor recommend to be placed as close as possible to device Wider trace of Vin is better for thermal Add as many GND via as possible GND 5 IN R R1 3 FB 4 EN Ren Vin Feedback components are recommended to be placed as close as possible to device 11 of 19

Ordering Information WU - 7 Package Packing WU : TSOT6 7 : Tape & Reel Tape and Reel Part Number Package Code Part Marking Identification Code Quantity Part Number Suffix WU-7 WU TSOT6 SB 3000-7 Marking Information TSOT6 ( Top View ) 6 5 47 XX Y W X 1 3 XX : Identification Code Y : Year 0~9 W : Week : A~Z : 1~6 week; a~z : 7~5 week; z represents 5 and 53 week X : Internal Code Part Number Package Identification Code WU-7 TSOT6 SB 1 of 19

PACKAGE INFORMATION Mechanical Data Package View Surface Mount Package Case Material: Molded Plastic, UL Flammability Classification Rating 94V-0 Terminals: Finish Matte Tin Plated Leads, Solderable per MIL-STD-0, Method 08 e3 Weight: 0.013 grams (Approximate) Max Soldering Temperature +60 C for 30 secs as per JEDEC J-STD-00 Top View Package Outline Dimensions TSOT6 E1/ E1 A e D e1 b E/ E A1 01(4x) 01(4x) A Seating Plane L c 0 L Gauge Plane Seating Plane TSOT6 Dim Min Max Typ A 1.00 A1 0.010 0.100 A 0.840 0.900 D.800 3.000.900 E.800 BSC E1 1.500 1.700 1.600 b 0.300 0.450 c 0.10 0.00 e 0.950 BSC e1 1.900 BSC L 0.30 0.50 L 0.50 BSC θ 0 8 4 θ1 4 1 All Dimensions in mm Suggested Pad Layout TSOT6 C Y1 Y Dimensions Value (in mm) C 0.950 X 0.700 Y 1.000 Y1 3.199 X The suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary depending on application. These dimensions may be modified based on user equipment capability or fabrication criteria. A more robust pattern may be desired for wave soldering and is calculated by adding 0. mm to the Z dimension. For further information, please reference document IPC-7351A, Naming Convention for Standard SMT Land Patterns, and for International grid details, please see document IEC, Publication 97. For high voltage applications, the appropriate industry sector guidelines should be considered with regards to creepage and clearance distances between device Terminals and PCB tracking. 13 of 19

Minimum Packing Quantity Quantity Tape Width Part Number Suffix 7 Reel 3,000 8mm -7 13 Reel 10,000 8mm -13 Package quantities given are for minimum packaging quantity only, not minimum order quantity. For minimum order quantity, please contact Sales Department. No mixed date codes or partial quantity (less than minimum packaging quantity) per packaging is allowed. In no case shall there be two or more consecutive components missing from any reel for any reason. Device Tape Orientation Tape Width Part Number Suffix Tape Orientation 8mm -7-13 Direction of feed For part marking, refer to product datasheet. Tape and package drawings are not to scale and are shown for device tape orientation only. 14 of 19

Embossed Carrier Tape Specifications Tape Width (W) Dimension Value (mm) Dimension Value (mm) Dimension Value (mm) B1 4.5 max. F 3.5±0.05 P.0±0.05 D 1.5+0.10-0.0 K.4 max. t 0.40 max. 8mm D1 0.35 min. P 4.0±0.10 W 8±0.30 E 1.75±0.10 P0 4.0±0.10 A0 B0 K0 Determined by component size. The clearance between the component and the cavity must comply to the rotational and lateral movement requirement provided in figures in the "Maximum Component Movement in Tape Pocket section. 15 of 19

Embossed Carrier Tape Specifications (Continued) 16 of 19

Maximum Component Movement in Tape Pocket 17 of 19

Surface Mount Reel Specifications Tape Width Reel Size A (mm) B Max (mm) C (mm) D Max (mm) N Min (mm) G (mm) T Max (mm) 8mm 7 178.0 +0.5-0 13 +0.5-0. 0.5 0. 55 5 8.4 +1.5-0.0 14.4 13 330.0 +0.5-0 13 +0.5-0. 0.5 0. 100 8.4 +1.5-0.0 14.4 Tape Leader and Trailer Specifications There shall be a leader of at least 30mm which may consist of carrier tape and/or cover tape or a start tape followed by at least 160mm of empty carrier tape sealed with cover tape. There shall be a trailer of at least 160mm of empty carrier tape sealed with cover tape. The entire carrier tape must release from the reel hub as the last portion of the tape unwinds from the reel without damage to the carrier tape and the remaining components in the cavities. 18 of 19

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