CPC9909 Design Considerations

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Application Note: Design Considerations -R0 www.ixysic.com 1

1 Off-line LED Driver using This application note provides general guidelines for designing an off-line LED driver using IXYS Integrated Circuits Division s. The features pulse frequency modulation (PFM) with a constant peak-current control scheme. This regulation scheme is inherently stable, allowing the driver to be operated above 50% duty cycle without open-loop instability or sub-harmonic oscillations. The has two current sense thresholds: one is internally set at 50mV, and the other can be externally set at the LD pin. The lower of these two thresholds, in conjunction with the current sense resistor (R sense ) at the CS pin, determines the LED peak current. A linear dimming function can be accomplished by adjusting the current sense threshold voltage up to the internal current threshold range.when the linear dimming function is not used, it is recommended that the LD pin be connected to V DD. Figure 1 shows the functional block diagram of the device. Figure shows a schematic of a typical application circuit for the device, which is referred to in all the discussions that follow. Figure 1 Block Diagram V DD 6 1 Voltage Regulator 8 Voltage Reference RT Q Minimum Off Time One Shot TRIG LD PWMD 7 5 - + - + 50 mv S R Q 4 GATE CS 3 GND www.ixysic.com R0

Figure Application Circuit Diagram D1 LEDs L1 FUSE BR C BULK C C CV DD V DD PWMD LD GATE CS GND FET NTC1 R SENSE Typical Design Parameters Parameter Symbol Min Typ Max Units AC Input Voltage Minimum Voltage V AC-min 90 - - Maximum Voltage V AC-max - - 130 V rms AC Input Frequency f AC 50-60 Hz LED String Voltage V LEDstring - 90 - V LED String Current I LEDmax - - 350 ma Estimated Efficiency - 0.90 - - Oscillator Frequency f S - 53 - khz Output Power Calculation V LEDstring I LEDmax 90V 350mA 31.5W Input Power Calculation P IN ------------- 31.5W P IN --------------- 0.90 35W P IN DC Bulk Voltage at Low and High Line Average Input Current Peak Input Current Note: During a surge, the current could be as much as 5 times higher, hence the multiplier. 3 Duty Cycle V AC-min 17.3V V DC_bulk_max V AC-max V DC_bulk_max 183.8V I in_avg P ------------------------------ in I in_avg 0.75A I in_pk 5 I in_avg I in_pk 1.375A ---------------- 35W 17.3V From the design requirements, the duty cycle can be calculated as: V LEDstring D ------------------------------ D 0.707 ---------------- 90V 17.3V R0 www.ixysic.com 3

4 Switching Frequency and Resistor Selection It is recommended that the switching frequency for off-line applications be between 30kHz and 10kHz. The requires an external resistor,, that sets the one-shot minimum off-time. The off-time can be determined by: R ----- T + 0.8 66 Where is the off-time in microseconds, and is in k. As an example, if is set to 309k, is then: 309k ---------------- + 0.8 5.48s 66 Off-time selection indirectly determines the switching frequency, f S, of the LED driver. The switching frequency in the above example is determined by: 1 D f S ------------ 1 0.707 --------------------- 53kHz 5.48s Figure 3 Resistor Value vs. Off-Time (μ S) 45 40 35 30 5 0 15 10 5 vs Off-Time where DDuty Cycle. (μs) 0 0 500 1000 1500 000 500 3000 (kω) 5 Selecting Fuse and NTC1 Thermistor The fuse protects the circuit from input current surges during turn-on. Choose a fuse that is rated five times the peak input current. I fuse 5 I in_pk I fuse 6.875A The thermistor in series with the input bridge rectifier limits the inrush charging current into the input bulk capacitor during startup. The value is determined by: R V AC_max th_cold --------------------------------- I in_pk R th_cold 133.7 6 Diode Bridge Rectifier The selection of the diode bridge rectifier is based on DC blocking voltage, forward current, and surge current. V rb V DC_bulk_max V rb 183.8V The diode forward current rating should be set to 1.5 times the input average current. I fb 1.5 I in_avg I fb 0.415A The diode bridge can be subjected to currents as high as 5 times the forward current, and the diode bridge should be rated accordingly. I fsb 5 I fb I fsb.065a 4 www.ixysic.com R0

7 Input Bulk Capacitor, C bulk, and C C The AC line voltage is filtered by the input bulk capacitor (C bulk ), which is selected based on the minimum peak rectifier input line voltage and peak-topeak ripple voltage. Assuming a 0% ripple: r DC_bulk 0. V in_min 1 r DC_bulk 1 0. 17.3 V in_min 101.8V C bulk C bulk C bulk P in ------------------------------------------------------------------------------ f AC V in_min 35W --------------------------------------------------------------------- 60Hz 17.3V 101.8V 100F For this example, the voltage rating of the capacitor should be more than V DC_bulk_max with some safety margin factored in. An electrolytic capacitor with a 50V, 100F rating would be adequate. Note that electrolytic bulk capacitors contain parasitic elements that cause their performance to be less than ideal. One important parasitic is the capacitor s Equivalent Series Resistance (ESR), which causes internal heating as the ripple current flows into and out of the capacitor. In order to select a proper capacitor, the designer should consider capacitors that are specifically designed to endure the ripple current at the maximum temperature, and that have an ESR that is guaranteed within a specific frequency range (usually provided by manufacturers in the 10Hz to 100kHz range). The Effective Series Inductance (ESL) is another parasitic that limits the effectiveness of the electrolytic capacitor at high frequencies. The combination of the variation of ESR over temperature and a high ESL may require adding a parallel film or tantalum capacitor (C C ) to absorb the high-frequency ripple component. This keeps the combined ESR within the required limit over the full design temperature range. 8 Bypass Capacitor, CV DD The V DD pin is the internal regulator s output pin and must be bypassed by a low-esr capacitor (typically 0.1F or higher) to provide a low-impedance path for high-frequency switching noise. 9 Inductor Design The inductor (L1) value is determined based on desired LED ripple current and the switching frequency. 53 khz was chosen as the optimum switching frequency to minimize switching losses, and to reduce circuit power dissipation at the expense of larger inductor size. Assuming a 30% peak-to-peak ripple in LED current, one can calculate the inductor requirements: 0.3 V LEDstring L min_buck ------------------------------------ L min_buck I LEDmax 90V 5.48s L min_buck ----------------------------------- 0.3 350mA 4.7mH Inductor peak current rating: I Lmax I LEDmax 1 + 0.5 I Lmax 350mA 1 + 0.5 0.3 I Lmax 0.403A In some cases, when the design requires a higher current rating and there is no standard inductor available, a custom-made inductor should be considered. R0 www.ixysic.com 5

10 Power MOSFET and Diode Selection The peak voltage seen by the discrete power MOSFET (FET) and diode (D1) are equal to the maximum bulk voltage. For safety reasons assume an additional 50% margin by design. V FET_BVDSS_buck 1.5 V DC_bulk_max V FET_BVDSS_buck 1.5 183.8V V FET_BVDSS_buck 75.771V V Diode_r_buck 1.5 V DC_bulk_max V Diode_r_buck 1.5 183.8V V Diode_r_buck 75.771V The maximum RMS current through the FET depends on the maximum duty cycle seen by the FET. In this buck converter, the maximum duty cycle is set to 70.7%. Choose a MOSFET with a rating of 3 times this current. I FET_rms_buck 0.707 I LEDmax I FET_rating_buck 3 I FET_rms_buck I FET_rating_buck 0.74A The average current through the diode is one-half of the LED current. Choose a diode with a rating 3 times this current. I Diode_buck 0.707 I LEDmax 0.707 350mA 0.47A I Diode_rating_buck 3 I Diode_buck I Diode_rating_buck 0.74A For this design, the IXTA8N50P external power FET, in the SMD D-Pak package, was selected from the IXYS family of Polar N-channel devices. The Polar process features 30% reduction of R DS(on), and a substantial reduction of total gate charge, Q G. This helps with improved LED driver efficiency by minimizing conduction and switching losses. In addition, the Polar power FET family has very low thermal resistance, R JC, which improves the device s power dissipation. The IXA8N50P can be used with an external heat sink similar to Aavid Thermalloy s part number 573100. The high frequency switching of the buck LED driver requires the use of a fast recovery diode. The BYV6_B series diode, in the SOD-57 package, was chosen for this design. 11 Current Sense Resistor, R sense The current sense resistor (R sense ) is selected based on the desired LED current. In this case, the maximum LED current is set at 350mA. Note that there is a difference between the peak current and the average current in the inductor. This ripple difference should be included in resistor calculations. The current sense threshold is given in the data sheet. Assuming 30% ripple: V cs(high) 0.3 50mV V cs(high) R sense ------------------------------------------------------------------ 1+ 0.5 I LEDmax R sense 0.61 Note that since the current sense threshold voltage of the CPC9910 (V cs(high) ) is specified between 00mV and 300mV, 50mV, the nominal value, is used in the formula above. Power dissipation across the sense resistor: P I LEDmax P 0.076W R sense In practice, select a resistor power rating that is at least twice the calculated value. 1 Layout Considerations -------------------------------------------------------------- 50mV 1+ 0.5 0.3 350mA In all switching converters, proper grounding and trace length are important considerations. The LED driver operates at a high frequency, and the designer must keep trace length from the GATE pin to the external power MOSFET as short as possible. Doing this helps to avoid such undesirable performance characteristics as ringing and spiking. In high-frequency switching, current tends to flow near the surface of a conductor, so ground traces on the PC board must be wide in order to avoid any problems due to parasitic trace inductance. If possible, one side of the PC board should be used as a ground plane. The current sense resistor, R sense, should be kept close to the CS pin in order to prevent noise coupling to the internal high-speed voltage comparator, which would affect IC performance. In addition, should be placed away from the inductor and away from any PCB trace that is close to switching noise. 6 www.ixysic.com R0

13 Application Suggestion The provides stable operation at above 50% duty cycle, which makes this driver well suited to operation in boost configuration. The circuit below has optional open-led protection. Figure 4 Boost Configuration Circuit 1V 680μH Schottky 40V / 1A 10μF 5V MSS160-684 V OUT 30V 10μF 50V FET SI308DS CMD557B Zener Over-Voltage Protection.μF 16V V DD PWMD LD GND GATE CS 1kΩ HB LEDs ASMT-MX00 75kΩ 0.61Ω For additional information please visit our website at: www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: -R0 Copyright 01, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 1/13/01 R0 www.ixysic.com 7