2016 7th International Conference on Intelligent Systems, Modelling and Simulation Efficiency Improvement of Differential Drive Rectifier for Wireless Power Transfer Applications Manal Mahmoud 1, Adel B. Abdel-Rahman 1, 2, Mohamed Abbas 1, 3, Ahmed Allam 1, H. Jia 1, 4 and R. K. Pokharel 4 1 Electronics and Communications Engineering Department, 1 Egypt-Japan University of Science and Technology, Alexandria, Egypt, 2 Faculty of Engineering, South Valley University, Qena, Egypt, 3 Faculty of Engineering, Assiut University, Assiut, Egypt, 4 Kyushu University, Fukuoka, Japan e-mail: manal.mahmoud@ejust.edu.eg, adel.bedair@ejust.edu.eg, mohamed.abdelhamed@ejust.edu.eg, aallam@ualberta.ca, htjia@ed.kyushu-u.ac.jp, pokharel@ed.kyushu-u.ac.jp Abstract In this paper, the power conversion efficiency of a 0.18 µm CMOS differential drive () full-wave rectifier was improved by optimization technique of the rectifier. The optimized rectifier achieves 83.3 % power conversion efficiency (PCE) at -16.3 dbm input power, with an input RF of 953 MHz and 0.6 V peak sinusoidal signal. The voltage conversion ratio becomes 72.3 % at -13 dbm input power. The output average voltage equals 0.4 V at peak input voltage 0.6 V, whereas the conventional rectifier achieves PCE = 75.4 % at an RF input power Pin = -12.5 dbm and output average voltage of 0.15 V at the same peak input voltage. The optimized rectifier is suitable for such applications that require minimum RF input power as UHF RFID tag and implantable medical devices (IMDs). Keywords CMOS differential drive, rectifier, power conversion efficiency, voltage conversion ratio, implantable medical devices I. INTRODUCTION There has been a considerable interest in the development of wireless power transfer systems, since their applications are numerous and varied such as implantable medical devices (IMDs) [1], [2], wireless sensor networks and RFIDs [3], [4], [5]. RF energy harvesting is one of the well known methods of wireless power extraction [4]. Fig. 1 shows a simple module of RF energy harvesting system [6]. The main block of energy harvester is the rectifier as it converts the ambient radio frequency (RF) power to direct current (dc). Recent studies of RF to DC rectifier are focused on many issues among them improvement of both power conversion efficiency (PCE) and voltage conversion ratio (VCR) with acceptable minimum input power [7], [8], [9]. The PCE of a CMOS rectifier can be improved by increasing the MOS transistors size (W/L) [10], which in turn reduces the equivalent input impedance of the rectifier and decreases the charging time of load capacitor, hence the speed of switching action will be raised [9]. There are different configurations for the conventional rectifier circuits. The basic rectifier architecture is based on Schottky diode [11] with a small barrier voltage of 0.2V to 0.3V. This type of rectifier exhibits large DC output voltage. But its manufacturing cost is very expensive, and it is not available in standard CMOS process [5]. Diode-connected load CMOS transistors are used to mimic the role of Schottky diode in rectifier circuits [12]. The DC output voltage is produced by subtracting the CMOS transistors threshold voltages from the low input voltage which limits the PCE. To address this issue, Kotani et. al, introduced a rectifier called self-vthcancellation (SVC) [13], [14]. In this technique, the gatesource voltage of NMOS and PMOS are provided by the DC output voltage. It has cons that there is no way to control the voltage at the gates of the MOS devices. Once the output amplitude exceeds threshold voltage of the devices, they turn on at the same time causing very high leakage currents. The SVC rectifier was designed and fabricated in 0.35µm CMOS 2P3M technology [13], [14] and exhibited a peak PCE of 32% at -10dBm of input power. A new CMOS full wave rectifier designated for IMDs was developed by [15]. It uses bootstrapped capacitors to reduce the effective threshold voltage of selected MOS switches. This rectifier achieved higher power efficiency over a wide range of input peak amplitude higher than 0.8V. But this range of input voltages is very large compared to requirements of micro-power applications. Besides, the author neglected the body effects of MOS devices resulting from different bulk biasing. A cross-connected differential drive rectifier () accomplished power conversion efficiency PCE of 67.5% at an RF input power -12.5dBm in TSMC 0.18µm CMOS process [11], [12]. The peak output voltage of the circuit is obtained by subtracting the drain to source voltage of MOS transistor from input voltage amplitude instead of threshold voltage. The pros and cons of those different RF to DC rectifier topologies were presented, compared and designed in a 65 nm CMOS process [4]. The differential drive () topology has the best maximum PCE. It was about 65% while the SVC technique was 46.7% and the MOS diode topology was 51%. It is obvious that the required range of RF input power for turning on the rectifier varies according to the application that uses this power. The maximum RF input power limitation of medical devices decided to 25µwatt (-16dBm) [16]. The tag power of RFID generally varies from 10µW (-20dBm) to 100µW (-10dBm) [17]. Accordingly, the configuration was optimized for an RF input power rang from -20dBm to -10dBm. The scope of this study is to improve both PCE and VCR of the conventional and to lower its RF input power to be suitable for applications as implantable medical devices IMDs and RFIDs. To achieve those goals; an optimization procedure by Agilent ADS (Advanced Design system) software has been used. In this paper two rectifying circuits are presented, the conventional circuit [17] and the original one with a modified circuit parameters. The paper is organized as follows: The conventional basic principle 2166-0670/16 $31.00 2016 IEEE DOI 10.1109/ISMS.2016.59 435
and its simulated results are provided in section II. Section III shows the simulation results of optimization of the rectifier. Finally conclusion is represented in section IV. II. STUDYING CONVENTIONAL CIRCUIT A. Rectifier Basic Operation The conventional circuit is shown in Fig.2. It has differential input voltage as in (1). The differential input voltage is applied across two points Vina and Vinb. It has amplitude (Vmax) and frequency (Fre) as seen in (2) [9]. The circuit consists of four transistors, two PMOS-devices (Mp1, Mp2) and two NMOS transistors (Mn1, Mn2). At positive half cycle of input voltage signal, when Vmax > 0, both Mp1 and Mn2 turn on as soon as Vmax reaches the threshold voltages of those devices. At the same time transistors Mp2 and Mn1 operate into sub-threshold region. The pulsating DC output voltage is given by subtracting the drain to source voltages of both Mn2 and Mp1 from the peak input voltage, and vice versa for negative half cycle. Figure 2. Differential drive CMOS rectifier circuit [17] (1) (2) B. Simulation Results of The circuit is simulated by the ADS software. The input current and the voltage waveforms of internal RF nodes (Vx, Vy) and output voltage are shown in Fig.3. The PCE of a rectifier is controlled by several parameters such as circuit topology, input signal voltage (frequency, amplitude) CMOS device parameters (width, length), and circuit components values such as coupling capacitors, output load resistor and load capacitor. Therefore, the dependence of the PCE of the rectifier on parameters was extracted using simulation as shown in Fig.4. Fig.4b shows the inverse relation between the PCE and the input signal frequency. It is seen from Fig.4c that the PCE can be increased by getting higher load resistor. The VCR is defined as the ratio of the average output voltage to the peak input voltage. Both the voltage conversion ratio VCR and the output average voltage of the conventional are drawn in Fig.5. Figure 3. : Input current waveform Iin (µa) Voltage waveforms of internal RF nodes and output voltage (V) Figure 1. Simple RF energy harvesting module [6] 436
values of circuit parameters of both conventional and optimized are presented in table I. Performance comparison between the conventional and the optimized is shown in table II. The input current and the output voltage waveforms are shown in Fig.6. The reliance of PCE on different parameters is shown in Fig.7. The voltage conversion ratio and the average output voltage are also improved to higher value at lower RF input power as described in Fig.8. TABLE I. VALUES OF CIRCUIT PARAMETERS OF THE CONVENTIONAL AND THE OPTIMIZED (c) Figure 4. : PCE (%) versus RF input power Pin (dbm) Varying PCE (%) with frequency Fre (c) Varying PCE (%) with load resistor Rload (KOhm) Circuit Parameters Circuit Parameters Vma x (V) Fre (MHz) Wp Wn Ccoup1 (pf) 0.92 953 18 3.6 1.13 0.6 953 472 83.618 5.77 L Rload (KOhm) CL (pf) Ccoup 2 (pf) 0.18 10 1.13 1.13 0.18 10 1.13 42 TABLE II. PERFORMANCE COMPARISON BETWEEN THE CONVENTIONAL AND THE OPTIMIZED Simulation Result Steady State Time (nsec) Iin (peak) (ma) @ Vmax (V) Vout (mv) @ Vmax (V) 14 0.291 @ 0.92 658 @ 0.92 7 2.598 @ 0.6 447 @ 0.6 Simulation Result PCE (%) @ Pin (dbm) 75.39 @ -12.5 83.347@ -16.37 VCR (%) @ Pin (dbm) 71.85 @ -10.48 72.297 @ -13.08 Vout_avg (mv) @ Vmax (V) Zin (Ohm) 157 @ 0.6 103 439 @ 0.6 4.45 Figure 5. : VCR (%) versus RF input power Pin (dbm) Output average voltage Vout_avg (V) versus input peak voltage Vmax (V)) III. SIMULATION RESULTS OF OPTIMIZED RECTIFIER The proposed in [17] is optimized and simulated in TSMC 0.18µm technology using ADS software. The 437
Fig.6. : Input current waveform Voltage waveforms of internal RF nodes and output voltage at Vmax=0.6V Figure 8. : VCR (%) versus RF input power (dbm) Average output voltage Vout_avg (V) versus peak input voltage. IV.CONCLUSION This paper presented an optimization technique to improve the rectifier PCE. The circuit was simulated using TSMC 0.18 µm CMOS technology. It was found that the rectifier PCE depends on many parameters such as transistor size, coupling capacitors, and input signal frequency. The optimized circuit shows that the PCE has increased to 83.3 % at 16 dbm input power. The VCR reaches 72 % at Pin = -13 dbm and the output average voltage equals 0.4 V at a peak input voltage of 0.6 V whereas the conventional rectifier gives PCE = 75 % at RF input power Pin = -12.5 dbm and the output average voltage equals 0.15 V at the same peak input voltage. The input impedance magnitude changes from 103 Ohm to 4.4 Ohm at an input power Pin = -16 dbm. Therefore, the optimized rectifier is suitable for such applications that require minimum RF input power as UHF RFID tag and implantable medical devices (IMDs). REFERENCES Figure7. : PCE (%) versus RF input power (dbm) Varying PCE (%) with load resistor Rload (KOhm) [1] Q. Li, J. Wang, and Y. Inoue, A high efficiency CMOS rectifier with ON-OFF response compensation for wireless power transfer in biomedical applications, 2014 Int. Symp. Integr. Circuits, pp. 91 94, 2014. [2] M. Ouda and M. Arsalan, 5.2-GHz RF Power Harvester in 0.18-µm CMOS for Implantable Intraocular Pressure Monitoring, IEEE Trans. Microw. Theory Tech., vol. 61, no. 5, pp. 2177 2184, 2013. [3] M. Zargham and P. G. Gulak, High-efficiency CMOS rectifier for fully integrated mw wireless power transfer, ISCAS 2012-2012 IEEE Int. Symp. Circuits Syst., pp. 2869 2872, 2012. [4] H. Dai, Y. Lu, M.-K. Law, Sai-Weng Sin, U. Seng-Pan, and R. P. Martins, A review and design of the on-chip rectifiers for RF energy harvesting, 2015 IEEE Int. Wirel. Symp. (IWS 2015), pp. 1 4, 2015. [5] C.-C. Y. Yuh-Shyan Hwang, Chia-Cheng Lei, Yao-Wei Yang, Jiann- Jong Chen, A 13.56-MHz Low-Voltage and Low-Control-Loss RF-DC Rectifier Utilizing a Reducing Reverse Loss Technique, IEEE Trans. Power Electron., vol. 29, no. 12, pp. 6544 6554, 2014. [6] T. Taris, V. Vigneras, and L. Fadel, A 900MHz RF energy harvesting module, New Circuits Syst. Conf. (NEWCAS),IEEE 10th Int., pp. 903 906, 2012. [7] C. Felini, M. Merenda, and F. G. Della Corte, Dynamic impedance matching network for RF energy harvesting systems, RFID Technology and Applications Conference (RFID-TA), 2014 IEEE. pp. 86 90, 2014. 438
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