K. N. Toosi University of Technology Chapter 7. Field-Effect Transistors By: FARHAD FARADJI, Ph.D. Assistant Professor, Electrical and Computer Engineering, K. N. Toosi University of Technology http://wp.kntu.ac.ir/faradji/digitalelectronics.htm Reference: DIGITAL INTEGRATED CIRCUITS: ANALYSIS and DESIGN, 2005, John E. Ayers 1
7.1. Introduction Field-effect transistors (FETs) have several significant differences compared to bipolar junction transistors. First, they are voltage controlled rather than current controlled. This results in low levels of standby supply current and standby power dissipation. Second, they are majority carrier devices. Third, they can be made smaller than BJTs using same fabrication technology. Chapter 7. Field-Effect Transistors 2
7.1. Introduction 3 basic types of FETs are: metal oxide semiconductor field-effect transistor (MOSFET), junction field-effect transistor (JFET), metal semiconductor field-effect transistor (MESFET). MOSFET is very important for ICs and is emphasized in this chapter. Chapter 7. Field-Effect Transistors 3
7.1. Introduction 7.1.1. MOSFET MOSFET is also known as insulated gate field-effect transistor (IGFET). 3 terminals of this device are source, gate, and drain, labeled S, G, and D. Sometimes, a 4 th terminal is used: body or substrate (labeled B). Voltage applied between G and S controls current between D and S. Chapter 7. Field-Effect Transistors 4
7.1. Introduction 7.1.1. MOSFET Basic operation of MOSFET: If G is biased positively with respect to S, negatively charged electrons are attracted to interface between semiconductor or and oxide. This forms a conducting channel between D and S. Then, if D is biased positively ii with ih respect to S, electrons in channel will drift from S to D. This results in a conventional current from D to S. Current involves only electrons. It is called an n-channel MOSFET. Chapter 7. Field-Effect Transistors 5
7.1. Introduction 7.1.1. MOSFET There are also p-channel devices. In p-channel device, S and D are p-type regions. Holes drift in channel. Voltages and currents have opposite polarities compared to those in n-channel device. Chapter 7. Field-Effect Transistors 6
7.1. Introduction 7.1.1. MOSFET For device shown, no conducting channel can be between D and S unless a positive voltage is applied between G and S. This device is normally off. These MOSFETs are called enhancement type. A gate bias is required to enhance a conducting channel. Chapter 7. Field-Effect Transistors 7
7.1. Introduction 7.1.1. MOSFET Depletion-type devices are normally on. A G-S bias is necessary to deplete conducting channel. Normally off enhancement-type MOSFETs are preferred in ICs for low standby dissipation. Chapter 7. Field-Effect Transistors 8
7.1. Introduction 7.1.1. MOSFET Some MOSFET symbols are shown. Most convenient are middle four. These result in simplest and neatest circuit diagrams. They eliminate e body connection and avoid use of other arrows. Inversion circle on G indicates a p-type device. Broad line in channel indicates a depletion-type device. We use these simplified symbols, except in situations for which body bias is used. Take a look at this link. Chapter 7. Field-Effect Transistors 9
7.1. Introduction 7.1.2. JFET Junction field-effect transistor (JFET) takes it name from G structure. G involves a p-n junction. For an n-channel nnel device, S, D, and channel regions are n-type. With zero bias between G and S, there is a conducting channel from D to S. JFET is a depletion-type device. If a reverse bias is applied to the G-S junction: It widens depletion region. It reduces channel conductivity. Chapter 7. Field-Effect Transistors 10
7.1. Introduction 7.1.2. JFET A sufficiently negative bias on G will pinch off channel entirely. JFET is a field-effect device in which G-S bias controls D-S current. Unlike MOSFET, no insulating oxide layer is under G. Gate p n junction must be kept reverse biased in order to avoid a DC gate current. Chapter 7. Field-Effect Transistors 11
7.1. Introduction 7.1.2. JFET A p-channel JFET utilizes p-type regions for S, D, and channel. Gate region is doped n-type. Voltages and currents are reversed in polarity compared to n-channel device. Chapter 7. Field-Effect Transistors 12
7.1. Introduction 7.1.2. JFET Enhancement-type (normally off) JFETs can be fabricated but with some difficulty. These devices must be made so that depletion region of G junction pinches off channel at zero G-S bias. This can be done, but only with precise control of channel thickness and doping. Chapter 7. Field-Effect Transistors 13
7.1. Introduction 7.1.2. JFET JFETs are not used in digital ICs for 2 reasons. First, JFETs are inherently depletion-type t pe devices. This results in excessive standby dissipation, unless normally off (enhancement-type) devices are fabricated. Second, even if normally off JFETs are used, p-n junctions used in gates are leaky compared to MOS structures used in MOSFETs. Have a look at this link. Chapter 7. Field-Effect Transistors 14
7.1. Introduction 7.1.3. MESFET Metal-semiconductor field-effect transistor (MESFET) is similar to JFET. A metal-semiconductor junction is used for G structure. It suffers from same drawbacks as JFET. It is not used in silicon technology. MESFETs are used in digital ICs based on compound semiconductors like gallium arsenide direct-coupled FET logic (DCFL) circuits. A viable MOSFET technology does not exist in materials such as gallium arsenide and indium phosphide. These semiconductors exhibit speed advantages over silicon. Chapter 7. Field-Effect Transistors 15
7.2. MOSFET Threshold Voltage Applying a positive bias on metal gate with respect to semiconductor will reduce hole concentration near interface. This situation is referred to as depletion condition. Application of a sufficiently positive bias on gate will result in inversion. In this case, semiconductor becomes n-type near interface. It is possible for semiconductor to be inverted to extent that electron concentration near interface is equal to hole concentration in bulk of semiconductor. This is referred to as strong inversion. Chapter 7. Field-Effect Transistors 16
7.2. MOSFET Threshold Voltage In an n-channel MOSFET, G-S bias necessary to cause strong inversion in channel is called threshold voltage. Among n-channel MOSFETs: enhancement-type type transistors have positive thresholds, depletion-type transistors have negative thresholds. Opposite is true for p-channel ldevices. Chapter 7. Field-Effect Transistors 17
7.2. MOSFET Threshold Voltage A body bias (applied between body and source) allows threshold of a MOSFET to be adjusted in the circuit. This is exploited to overcome manufacturing tolerances in threshold voltages. This technique is used in modern low-power, high-speed CMOS circuits. Chapter 7. Field-Effect Transistors 18
7.3. Long-Channel MOSFET Operation Substrate is often shorted to source. V GS is G-S bias. V DS is D-S bias. I D is drain current. rent. MOSFET has 3 modes of operation: cutoff, linear, saturation. Chapter 7. Field-Effect Transistors 19
7.3. Long-Channel MOSFET Operation Cutoff occurs if V GS is insufficiently positive to induce a conducting channel. Cutoff results in zero drain current. If V GS is made more positive than threshold voltage (V T ): a conducting channel is induced an I D can flow. Chapter 7. Field-Effect Transistors 20
7.3. Long-Channel MOSFET Operation With a small V DS : MOSFET acts like a voltage-controlled resistance. This is linear (ohmic or triode) mode of operation. If V DS is sufficiently large: Conducting channel will pinch off at drain end. I D saturates. This mode of operation is called saturation. Chapter 7. Field-Effect Transistors 21
7.3. Long-Channel MOSFET Operation In characteristic curves, it is customary to plot I D vs. V DS with V GS as a parameter. This results in a family of curves, one for each particular value of V GS. Cutoff: is associated with zero I D, its locus is on V DS axis. In linear region: I D increases approximately linearly with V DS, its locus is to left of parabola. Saturation: is characterized by a constant I D, its locus is to right of parabola. Chapter 7. Field-Effect Transistors 22
7.3. Long-Channel MOSFET Operation 7.3.1. MOSFET Cutoff Operation Chapter 7. Field-Effect Transistors 23
7.3. Long-Channel MOSFET Operation 7.3.2. MOSFET Linear Operation V GS > V T. V DS is small enough so that channel does not pinch off at drain end. MOSFET acts like a voltage-controlled resistance. R DS is controlled variable. V GS is controlling variable. Pinch-off at D end of channel occurs when: This condition defines boundary between linear and saturation operation Chapter 7. Field-Effect Transistors 24
7.3. Long-Channel MOSFET Operation 7.3.2. MOSFET Linear Operation K = device transconductance parameter. Chapter 7. Field-Effect Transistors 25
7.3. Long-Channel MOSFET Operation 7.3.2. MOSFET Linear Operation k is process transconductance parameter. Chapter 7. Field-Effect Transistors 26
7.3. Long-Channel MOSFET Operation 7.3.2. MOSFET Linear Operation For p-channel MOSFETs, p must be used instead of n. All voltages and currents are opposite in polarity. Chapter 7. Field-Effect Transistors 27
7.3. Long-Channel MOSFET Operation 7.3.3. MOSFET Saturation Operation MOSFET acts like a voltage-controlled current source. I D is controlled quantity. V GS is controlling quantity. Chapter 7. Field-Effect Transistors 28
7.3. Long-Channel MOSFET Operation 7.3.4. MOSFET Subthreshold Operation Cutoff operation: n-mosfet: V GS < V T p-mosfet: V GS < V T results in I D = 0 to a first approximation. If V GS is close to V T, a non-negligible I D will flow. This subthreshold hold current is important in modern low-voltage, low-power CMOS and memory circuits. Chapter 7. Field-Effect Transistors 29
7.3. Long-Channel MOSFET Operation 7.3.4. MOSFET Subthreshold Operation Saturation or linear operation is dominated by drift of majority carriers. Subthreshold operation occurs as result of minority carrier diffusion. Device acts as a BJT. S injects carriers into channel region. These injected carriers diffuse length of channel. They are collected by D. In an n-mosfet: electrons are injected into p-type channel region diffuse to D, resulting in current from D to S. Subthreshold current flows in same direction as saturated current. Chapter 7. Field-Effect Transistors 30
7.3. Long-Channel MOSFET Operation 7.3.4. MOSFET Subthreshold Operation If V DS is several times kt/q (~ 26 mv at room temperature), subthreshold current is independent of V DS : Subthreshold current increases exponentially with V GS. Chapter 7. Field-Effect Transistors 31
7.3. Long-Channel MOSFET Operation 7.3.4. MOSFET Subthreshold Operation Subthreshold swing is: Room-temperature re operation of MOSFETs is characterized by S = 100 mv. Subthreshold current changes by 1 decade for every 100-mV change in V GS. Scaling of V T below about 300 mv is accompanied by significant subthreshold current at V GS = 0. This is a significant issue in design of low-power CMOS circuits. Chapter 7. Field-Effect Transistors 32
7.3. Long-Channel MOSFET Operation 7.3.5. Transit Time It takes a finite time for majority carriers to traverse channel in a conducting MOSFET. This delay is called transit time (t t ). In a long-channel nnel n-channel MOSFET, electrons are drifted in channel. Average electric field intensity in channel is approximately: Carriers move at a velocity of approximately: t t increases with square of channel length: Chapter 7. Field-Effect Transistors 33
7.4. Short-Channel MOSFETs Aggressive scaling of MOSFETs and channel lengths has resulted in devices that behave differently than long channel devices. First, V T becomes a function of channel length (short-channel effect). Second, electric field intensity in channel may be sufficiently large so that carriers reach their saturated velocity. Third, effective channel length becomes a function of V DS as a consequence of channel length modulation. All these effects are of practical importance in design of high-performance CMOS circuits. Chapter 7. Field-Effect Transistors 34
7.4. Short-Channel MOSFETs 7.4.1. The Short-Channel Effect V T decreases with decreasing channel length. 7.4.2. Channel Length Modulation I D in a MOSFET saturates at V DS which causes channel to pinch off at D end. Further increase in V DS causes pinch-off point to move into channel, toward S. This increases I D by ratio L/(L L). In a long-channel MOSFET, percentage change in I D is small. Channel length modulation effect is important in short-channel MOSFETs. Chapter 7. Field-Effect Transistors 35
7.4. Short-Channel MOSFETs 7.4.2. Channel Length Modulation I D in a MOSFET saturates at V DS which causes channel to pinch off at D end. Further increase in V DS causes pinch-off point to move into channel, toward S. For linear operation: For saturation operation: is the empirical channel length modulation parameter. Chapter 7. Field-Effect Transistors 36
7.4. Short-Channel MOSFETs 7.4.3. Velocity Saturation At high electric-field intensities, carrier drift velocities are no longer proportional to electric field. Instead, there is approximately carrier velocity saturation. Onset of I D saturation occurs at a lower V DS. Magnitude of saturated I D is less than before. Chapter 7. Field-Effect Transistors 37
7.4. Short-Channel MOSFETs 7.4.4. Transit Time In short-channel MOSFETs, carriers may travel at close to saturation velocity for entire channel length. For electrons: : For holes: Saturation velocities in silicon MOSFETs are typically 20% lower than bulk values. t t is directly proportional to the channel length. Chapter 7. Field-Effect Transistors 38