NTODUCTON The operational ampliier (op-amp) orms the basic building block o many analogue systems. t comes in a neat integrated circuit package and is cheap and easy to use. The op-amp gets its name rom the act that it can perorm mathematical operations on the signals applied to its input. For example, it can be made to add, subtract, multiply and even perorm integration and dierentiation. t can also be used as a comparator, buer, inverter, ilter or oscillator, and is used in a legion o other applications. We irst review the eect o eedback on an ampliier. We then investigate the behaviour o the op-amp when applied to linear circuits. YOU AMS At the end o this lesson you should be able to: state the transer unction o the op-amp state the properties o the ideal op-amp show that, in the ideal op-amp, the two inputs will be equal i the output is to be inite apply the 'virtual earth' principle to appropriate op-amp circuits solve problems involving op-amps in simple linear circuits. Teesside University 0
AMPLFES AND FEEDBACK FGUE is a block diagram o an ampliier consisting o two blocks. The upper block is an ampliying element and the lower block a eedback element. n the diagram the suix ''' has been used to indicate input and output voltages aected by the eedback. The ampliier element has a transer unction o voltage gain G. the input to the ampliying element is, the output is G. The eedback element eeds a raction o the output voltage into the input. The eedback element has a transer unction o voltage gain H (also known as the eedback ratio). the input to the eedback element is, the output is H. G H H FG. Applying Kirchho's voltage law to the input: H... () This equation can be rearranged to give: H... () Teesside University 0
3 The Feedback Equation Let's go on now to see the eect o eedback upon the overall voltage gain G o the ampliier. This is easily done by substituting or G in (): G H GH H G G G G... G H ( 3) This equation is the classical equation in eedback theory. There are, in act, three gains in the eedback equation: G is the gain without eedback. The eedback loop has been opened. For this reason G is called the open loop gain. G is the voltage gain with the eedback loop closed. t is the closed loop gain. We will denote closed loop gain by G. Teesside University 0
4 G H is the gain going around the eedback loop. t is the loop gain. G H An Approximation G, in the eedback equation G G, the loop gain is very much H greater than (that is G H >> ), then ( G H ) G H and the eedback equation can be approximated by: G G G H and thereore by G H the loop gain is large, the closed loop gain is approximately equal to the reciprocal o the eedback ratio. This approximation not only makes the sums easier but also makes or easier design, as the eedback ratio is requently determined by the potential divider action o two resistors. This point is illustrated in the ollowing example. Teesside University 0
5 Example FGUE shows an ampliier that has an open loop voltage gain o 000. The closed loop gain is required to be 50. Calculate the value o i is set to 000 Ω. (t may be assumed that the current is very much smaller than.) Ampliier G H FG. Solution First check to see i the approximation can be used. it can, then G /H 50 so that G H 000 0. 50 So G H is very much greater than and the approximation is valid. Teesside University 0
6 As is very much smaller than, we can assume that the current through is due to alone. By potential divider action: H i.e. H 50 000 000 50 50 000 000 49 0 Ω The example shows how negative eedback allows the gain o an ampliier to be set by the ratio o two resistors. Teesside University 0
7 FEEDBACK CONFGUATONS FGUE 3 shows the our possible eedback arrangements. G G H H (a) (b) G G H H (c) (d) FG. 3 FGUE 3(a) is the type we are now amiliar with. A raction o the output voltage is ed back in series with the input. t is voltage derived, series-ed eedback. n FGUE 3(b) the output current is sampled by the eedback element. The input hal o the circuit is the same as or FGUE 3(a). This is current derived, series-ed eedback. FGUE 4 shows how the output current might be sampled in practice. The voltage developed across the low value resistor is proportional to the output current lowing through it. t is this voltage that is ed back. Teesside University 0
8 G H FG. 4 n FGUE 3(c) the eedback is voltage derived. t is a current, though, that is ed back to the input. As the eedback element appears across the input, this arrangement is voltage derived, shunt-ed eedback. n FGUE 3(d) the output is current derived and the input is shunt ed. This is current derived, shunt-ed eedback. Eects upon gain The derivation and method o eedback will together determine the eect upon the ampliier's gain. We irst note that in FGUE 3(a) it is the output voltage that is sampled to produce a eedback voltage. The eedback transer unction is H and is a voltage ratio. FGUE 3(d) is similar. t is the output current that is sampled to produce a eedback current. The eedback transer unction is H and is a current ratio. n FGUE 3(b), though, it is the output current that is sampled to produce a eedback voltage. The eedback transer unction is H Z and is not a ratio, it has units o volts per ampere. t is represented by an impedance Z. Teesside University 0
9 n FGUE 3(c) it is the output voltage that is sampled to produce a eedback current. The eedback transer unction is H Y and now has units o amperes per volt. t is represented by an admittance Y. The eects o each coniguration upon voltage and current gains are summarized in the table below. The table shows that series-ed eedback aects the voltage gain whereas shunt-ed eedback aects the current gain. For this to be true we must apply two conditions : (i) n the case o voltage derived, shunt-ed eedback the signal source is assumed to be an ideal constant voltage generator (zero source resistance) (ii) n the case o current derived, series-ed eedback the signal source is assumed to be an ideal constant current generator (ininite source resistance). Type o eedback... Eect on... G G oltage derived, series-ed educed by Not aected ( G H ) Current derived, series-ed educed by Not aected ( G H ) oltage derived, shunt-ed Not aected educed by ( G H ) Current derived, shunt-ed Not aected educed by ( G H ) Teesside University 0
0 Each coniguration will aect the input and output impedance o the ampliier but in the analysis now given we keep on amiliar territory and consider voltage-derived, series-ed eedback only. The eects o the other conigurations can then be deduced. THE EFFECTS OF FEEDBACK UPON NPUT AND OUTPUT MPEDANCE nput impedance FGUE 5(a) shows the input hal o an ampliier with negative eedback applied. The ampliier has an input resistance o r and a current lows into it. The eedback element is represented by its Thévenin's equivalent o a voltage generator H and a series resistance r B. Up till now we have omitted this resistance and we shall see shortly that we were justiied in doing so. For the sake o accuracy, though, we shall now include it and then justiy its omission. G r G X r B H 'looking in' (a) H (b) X FG. 5 Teesside University 0
You might ind it helpul to now reer to FGUE 5(b) which shows how H might be generated in practice. The Thévenin equivalent circuit is taken 'looking into' the eedback element across the terminals X-X The open circuit voltage is that generated across with the input o the ampliier removed. The equivalent resistance is that 'seen' looking into the terminals X-X. t can be shown that this equivalent resistance, which we have denoted r B, will equal ( ), where represents the parallel combination o the ampliier's output resistance and its load resistance. The voltage input equation or the ampliier o FGUE 5(a) is r r B H...(4) and using the relation G G r r r B G H r r ( G H ) r B Dividing through by gives ( ) B r G H r Now, is the input resistance o the ampliier with eedback applied. We will denote this resistance by r. We can now write an expression or the ampliier's input resistance with eedback: r r ( G H ) r B Teesside University 0
we make the assumption that r ( G H ) >> r B then r r ( G H )...(5) The input resistance has been increased by a actor ( G H ). This increase is not simply due to the eect o the series resistance o the eedback element, the component o which, r B has been represented separately in the equation. t is primarily due to the eedback voltage that opposes current lowing into the ampliier. Calculate a suitable value o i the ampliier o FGUE 3(b) is to have a closed loop gain o 00. The open loop gain is 0 4 and kω.............................................. Teesside University 0
3 For such a large open loop gain and modest closed loop gain we can use the approximation H G 00 Also H and transposing to make the subject: H and noting ( H ) H then H 000 0 Ω 00 does indeed have a low value and i the loop gain is also high then the approximation r ( G H ) >> r B is more than justiied. Output impedance The situation or the output is a little more complex than that or the input. FGUE 6 represents a Thévenin equivalent or the ampliier's output consisting o a voltage generator G and the ampliier's output resistance r. The eedback element is in parallel to the ampliier and its internal resistance is represented by r B. The output current splits into two components, A eeding the ampliier and B eeding the eedback element. Teesside University 0
4 A r H G B H r B H FG. 6 Applying Kirchho's current law to the output: A B where A G and B r r B To make any progress, we need to eliminate in the expression or A. The standard way o doing this is to short-circuit the input. This then makes H as shown in FGUE 6 in the right hand part o the diagram. The expression or A with the input short-circuit is: A r ( G H ) r G H Teesside University 0
5 so that ( GH) r r B Dividing through by : GH r r B represents the output resistance with eedback applied, r. We will thereore denote by r Thus: GH r r r B This equation shows that the eect o the eedback has been to reduce the output resistance o the ampliier by a actor o ( G H ). This reduction is over and above that o the shunting eect o the eedback element on the output, which has been represented separately by r B. r the assumption is made that r B >> G H valid, the output resistance with eedback becomes: ( ), which is nearly always r r ( G H )...(6) emember, this is the output resistance with the input short circuit. Teesside University 0
6 The other conigurations and input and output resistance ntuitively we can reason that series-ed elements will increase the input resistance and shunt-ed elements will decrease the input resistance. Similarly we can reason that voltage-derived eedback will decrease the output resistance as the eedback element is placed across the output terminals. We would expect current-derived eedback to increase the output resistance as the eedback element is in series with the output. This reasoning is, in act, borne out in practice. Teesside University 0
7 THE OPEATONAL AMPLFE Symbol or the Op-Amp The op-amp diers rom the ampliiers we have encountered so ar in one important respect : the op-amp has two inputs. FGUE 7(a) shows the symbol or the op-amp. One input is called the inverting input and the other the non-inverting input, and they have been labelled '' and '' respectively. n the igure, the supply voltages have also been shown; note that a dual power supply is used, typically and volts. More oten than not, though, the existence o the supply is taken or granted and the symbol o FGUE 7(b) is used to represent an op-amp. o o (a) (b) FG. 7 What is the signiicance o the terms inverting and non-inverting? Well, i the voltage on the inverting input is positive, the voltage at the output will be driven negative, but a positive voltage on the non-inverting input will drive the voltage at the output positive. Teesside University 0
8 FGUE 8 shows the eect o applying a square wave signal to each input in turn; the output is inverted when the signal is applied to the inverting input, but not when it is applied to the non-inverting input. (a) nverting (b) Non-inverting FG. 8 At this point, we should remark that the op-amp is a d.c. ampliier, i.e. it will ampliy d.c. voltages. This implies that the dierent transistor stages within the op-amp are not capacitively coupled. they were, the capacitors would operate as a d.c. block. The act that the op-amp is a d.c. ampliier does not mean it cannot ampliy alternating signals. t most certainly will, although, in its naked orm, it will have a very restricted bandwidth. Teesside University 0
9 Transer unction o the op-amp We need a transer unction to relate the voltage on the input o the ampliier to that at the output. The transer unction is a simple one, as the ampliier merely ampliies the dierence between the two inputs. Thus, i G D is the open-loop dierential voltage gain o the ampliier, then : o G D ( )... (7) Manuacturer's data usually uses the symbol A D or dierential voltage ampliication or gain. However, A is also the symbol or attenuation (loss), so we will stick with G or gain. The ideal op-amp the op-amp is to perorm operations with absolute precision, then it must have ideal properties. There are three properties o an op-amp o immediate interest : dierential voltage gain, input resistance and output resistance. The ideal and practical values o these parameters are listed in the TABLE A. Parameter oltage gain nput resistance Output resistance deal value 0 Typical practical value 0 5 MΩ 75Ω TABLE A Teesside University 0
0 The table shows that the practical op-amp is not so ar rom the ideal. t does have a very high gain, a very high input resistance and a airly low output resistance. n this lesson, we shall assume that our op-amps are ideal. The inverting ampliier n this simple application, negative eedback is used to tame the very high gain o the op-amp and we shall see that the closed loop gain is set by the ratio o two resistors. FGUE 9 gives the circuit o an inverting ampliier. o FG. 9 Analysis As the ampliier has ininite input impedance, no current will low into its inverting input. So, by Kircho's current law: Teesside University 0
We can also say, by Ohm's law, that: o and Thereore o... (8) rom which o... (9) Now, here is the important bit: From equation () and, as G o ( ) D 0 in this example, then so ininite. o G D o G D, which becomes vanishingly small i G D is Thus, the term are let with: in equation (9) will be insigniicant and we o Teesside University 0
giving a voltage gain o: o... (0) The minus sign indicates that the output signal is an inverted copy o the input signal. Calculate the value o required in the circuit o FGUE 3, i the ampliier is to give a voltage gain o 40 db. 0 kω........ 40 0 log o thereore so o 00 00 00 0 03 MΩ Teesside University 0
3 The irtual Earth We have just seen that, in the circuit o FGUE 9, becomes vanishingly small i G D is ininite. we were to measure the potential at the inverting input to the ampliier, we would ind it to be at zero volts; the inverting input is thereore described as a virtual earth. The concept o the virtual earth is a very useul one and we shall make some use o this. t can greatly simpliy the analysis o circuits involving op-amps. For example, we can quickly establish the input resistance o the ampliier o FGUE 9 by imagining the inverting input as being at earth potential. The circuit has been redrawn in FGUE 0 to illustrate this. 'irtual earth' FG. 0 the inverting input is at earth potential, the input resistance to the ampliier is simply! As with all simpliications, though, a little care is required in their application. We need to pursue our analysis o the circuit to determine when the virtual earth concept can be used. Teesside University 0
4 estating equation (8): o... (8) and substituting G or D ( ) o gives: ( G D ( ) ) rom which: ( ) ( G D( ) ) and dividing through by G D gives: ( ) ( ) G D G D Our op-amp is ideal, so G D 0 0 ( ) 0 and thereore: so that Teesside University 0
5 n the special case when is at earth potential, then will 'virtually' be at earth., however, is at some other potential will not be a virtual earth and the virtual earth concept cannot be used. n all ideal op-amp circuits though, i the output is inite, then: The deduction is readily made rom equation (): G o ( ) D so that o ( ) G D 0 What do we mean by i the output is inite? Well, in theory, i the gain is ininite, the output would also be ininite or the tiniest dierential input. That is why must equal. n practice, o course, the output cannot be ininite; it is limited by the power supply voltages. By inite, we simply mean that the output voltage is not driven to meet the positive or negative voltage supplies. Teesside University 0
6 OTHE OP-AMP CCUTS Let's now look at examples o other simple linear op-amp circuits. We can regard as being 'linear' a circuit whose voltage gain does not vary with input voltage and whose output is time-invariant. THE ADDE This circuit, see FGUE (a), will add the two voltages and. o FG. (a) Analysis The non-inverting input is earthed and so the virtual earth concept can be used. magining the inverting input to be at earth potential, then we can say: Teesside University 0
7 current lowing into current lowing into current lowing into o and now summing the currents lowing into the junction at the inverting input: o 0 Taking the special case o when, we have ( ) o Alternatively, i (say) but is o a dierent value, then o 0 o ( ) The two input voltages have been added and scaled up by the actor. THE NON-NETNG AMPLFE This circuit, see FGUE (b), will give a non-inverted ampliied output o the input voltage. Teesside University 0
8 o FG. (b) Analysis The non-inverting input is not earthed, so the virtual earth concept cannot be used. We must return to irst principles: and orm a potential divider so that o But in the ideal op-amp and thereore But as : o o Teesside University 0
9 and re-arranging: o The equation or the gain o the non-inverting ampliier is not quite as neat as that or the inverting ampliier. Oten though, >>, and under such circumstances o dentiy the nature o the eedback (voltage/current derived, series/shunt ed) employed in: (i) the inverting ampliier o FGUE 9 (ii) the non-inverting ampliier o FGUE (b)........ Teesside University 0
30 (i) n the inverting ampliier, the output voltage is sampled and a current ( ) is ed back. The circuit is an example o voltage derived, shunt eedback. (ii) n the case o the non-inverting ampliier, the output voltage is sampled (by means o the potential divider) and a voltage is ed back to the o input. The circuit is an example o voltage derived, series eedback. THE BUFFE This circuit, see FGUE (c), will give unity voltage gain with a high input resistance and low output resistance. These properties o an electrical buer enable it to oer minimal loading to a signal source and yet be able to provide a large output current. o FG. (c) The buer is also called a voltage ollower. Teesside University 0
3 Analysis The circuit can be viewed as a special case o the non-inverting ampliier where has an ininite value. We have established that and, in this special case, where there is 00% negative eedback, is the same as o. So o, the input voltage; thus, the circuit has unity gain. THE SUBTACTO We have had an example o an adder but it would also be useul to be able to subtract one signal rom another. This circuit, shown in FGUE (d), does just that; the input voltage is subtracted rom to give the output o. Note that, in this circuit, to keep things simple, all the resistors are o the same value. o FG. (d) Teesside University 0
3 Analysis The circuit is not a 'virtual earth' and so, again, we have to start rom scratch. The two resistors on the non-inverting input orm a potential divider, so that: Moving to the inverting input, we can sum the currents at the junction: o The ''s cancel to give: o thereore o But we have established that so: o The subtractor is also known as a dierence ampliier. An example FGUE shows a proposed system or measuring the low rate o a liquid down a pipe. The signals ( and ), rom two pressure transducers located some distance apart on the pipe, are ed to a control unit. t has been assumed that there is a linear relationship between the pressure dierential down the pipe and low rate so that k( ) represents low rate, where k is a constant. Teesside University 0
33 The output ( o ) o the control unit eeds the dierence between the two signals to a meter calibrated to measure low rate. The control unit also has a 'zero adjust' input ( 3 ) which enables the meter to be set to zero. Thus, the signal actually ed to the meter is: k o ( ) 3 Flow rate meter Zero adjust 3 o k( ) 3 Control unit Transducers P P Flow FG. Task Design a suitable control unit using op-amps. Solution FGUE 3 shows a possible solution. A subtractor is used to calculate the dierence between and, the result being scaled by a actor o k by the ratio between the resistors. Teesside University 0
34 A second op-amp is used to add the oset voltage 3 into the result rom the irst op-amp. Three equal valued resistors have been used in the second stage. The output o the irst stage is k( ) but this is inverted by the second stage. k k( ) 3 k( ) 3 k Set zero o FG. 3 t is let to you in Sel-Assessment Question 4 to veriy the output o the subtractor! Teesside University 0
35 OLTAGE AND CUENT CONETES Current to oltage Converter A current to voltage conversion device will give an output voltage that is proportional to its input current. FGUE 4 gives the circuit o such a device using an op-amp. Current source FG. 4 The input has been shown as a Norton generator that eeds a current into the op-amp's inverting input. This current is equal in magnitude to the eedback current, i.e. The inverting input is a virtual earth which means that is given by: Teesside University 0
36 and so rom which Thus the output voltage is directly proportional to the input current, the constant o proportionality being. ndeed, is the transer unction o the circuit. An Application The circuit o the converter can be used to measure very small currents by means o a voltmeter. FGUE 5 shows a suitable arrangement:.s.d. FG. 5 Calculate the maximum current that can be measured i 00 kω and the voltmeter has a ull scale delection o. Comment on the value o input resistance to the circuit. Teesside University 0
37....... From the magnitude o the maximum current is: 05 0 μa Another plus or this circuit is that, as the input 'sees' a virtual earth, the input resistance will be very low; in all likelihood, much lower than that oered by any moving coil instrument. oltage to Current Converter n this type o device, the output current is proportional to the input voltage. FGUE 6 gives a suitable op-amp circuit; unortunately, it is a little more complicated than previous circuits and eatures positive as well as negative eedback. Teesside University 0
38 4 F 3 L o L Load FG. 6 The intention o the circuit is to drive through the load a load current, L, which is independent o the value o the load but proportional to the input voltage. The resistors and provide negative eedback and 3 and 4 positive eedback. For successul operation o the circuit the resistor ratios 4 / 3 and / must be equal. The amount o positive eedback is controlled by the voltage L and the amount o negative eedback by the voltage o. The dierence between these two voltages is that dropped across the 'current-sensing' resistor. Thus : o L or L o Thus, as the load varies, one orm o eedback will increase at the expense o the other. Teesside University 0
39 So i the load current L tried, say, to increase (due to a reduction in load resistance) would tend to increase. This will have the eect o increasing negative eedback at the expense o positive eedback ( o L ). The output voltage will tend to all which should restore the current to its original value. Conversely i the load current were to try to all, positive eedback would be enhanced relative to negative eedback ( L o ) and the output voltage would tend to rise to counter the all in current. t can be shown (see Sel-Assessment Question 5) that the load current is indeed almost independent o the load resistance provided that >> F (as is the case in a practical circuit). Under such circumstances: A common application o voltage to current converters is in the driving o transmission lines in some digital systems. A signal voltage is converted to a current transmission. For example in the 0 ma current loop system a current o 0 ma represents one logic level and zero current the other. As the transmission line is a series circuit, the current is the same at both ends o the line. This would not be the case i the signal were in a voltage orm, the voltage would be attenuated and noise might well become a problem. A voltage to current converter is used at the sending end to ensure that the current is always 0 ma, irrespective o the length o the line or what is connected at the other end. Teesside University 0
40 SELF-ASSESSMENT QUESTONS. FGUE 7 shows the block diagram o an electronic system required to give the output: o 8 4 4 3 4 3 o o 8 4 4 3 FG. 7 (a) Sketch a suitable op-amp circuit to give the required output. Show the required resistor ratios. (b) Suggest an application or the circuit.. (a) FGUE 8(a) shows an op-amp circuit with a steady.4 connected to its non-inverting input. Calculate the voltage at the output. (b) Calculate the maximum and minimum voltage at the output o the circuit o FGUE 8(b). Suggest an application or the circuit. Teesside University 0
4.4 o 5kΩ 6.8kΩ FG. 8 (a) 5.4 5 o 5kΩ 6.8kΩ FG. 8 (b) 3. FGUE 9 shows a transimpedance ampliier designed to permit the measurement o very low currents. (a) Show that Teesside University 0
4 (b) Calculate the current,, i 0 MΩ, 90 kω, 0 kω and 0.. FG. 9 4. FGUE 0 shows the circuit o a dierence ampliier or subtractor. 3 4 o FG. 0 (a) Write down an expression or in terms o, 3 and 4. Teesside University 0
43 (b) Write down an equation relating the current meeting at the junction o the inverting input in terms o, o,, and. (c) Write down the relationship between ideal. and i the op-amp is (d) Hence show that: o 4 3 (e) o is to equal zero when, show that must equal. 5. For the circuit o FGUE 6 (repeated below) show, by using the same procedure as in the previous question and noting that >> F, that: 4 4 F 3 L o L Load FGUE 6 (eproduced) Teesside University 0
44 (a) o L 3 4 (b) by substituting ( o ) or L, o 3 3 4 (c) 3 4 when 4 3 (d) and hence when 4 3 Teesside University 0
45 NOTES Teesside University 0
46 ANSWES TO SELF-ASSESSMENT QUESTONS. (a) FGUE gives the required circuit. A our-input adder is used to sum the input voltages. As the input voltages have to be multiplied by 8, 4, and, setting the eedback resistor to 8 and the other resistors to,, 4 and 8 respectively gives the required ratios. (b) The input voltages are scaled by the actors 3,, and 0, i.e. a binary weighting. the input voltages are all equal (either 0 or volts) the circuit will add then together with the correct binary weighting. The circuit acts as a our bit digital to analogue converter. 4 3 4 8 8 FG. 68.. (a) The voltage eedback ratio o the ampliier is and 68. 5 68. 5 thereore the closed-loop gain is 47.. 68. Thus the output voltage will be.4 4.7.3 volts. Teesside University 0
47 (b) When the variable resistor has a maximum value o 5 kω, the output voltage will be.3 volts. When the variable resistor has a value o 0 Ω, the op-amp acts as a voltage ollower and the output will be.4. Thus the voltage can be varied between.4 and.3 volts. The circuit is a variable-output voltage regulator. 3 (a) The voltage at the junction o the potential divider is: The virtual earth concept can be applied so that the current through is: This current is equal to so that... () From which: Teesside University 0
48 (b) Substituting the values into equation () (. 0) 0 0 6 0 03 90 0 0 0 3 3 na 4. (a) 4 (b) o (c) (d) From parts (b) and (c) we have: o ( ) ( ) o ( ) o o Substituting or rom part (a) 4 o Teesside University 0
49 and re-arranging gives the required expression: o 4 (e) When o 0 then: 0 4 3 4 and i then: 4 and cross-multiplying: 4 ( ) ( 3 4 ) 4 3 and inally 3 4 5. (a) Following the previous question we can readily establish: o and that ( L ) Teesside University 0
50 and also we know that or the ideal op-amp: so that 3 L 4 ( ) ( ) ( ) 3 L 4 3 4 ( ) L ( ) substituting o o or L 3 gives the required expression: 4 (b) Substituting ( o ) or L gives: o ( o ) 3 4 and rearranging yields: o 3 3 3 4 4 Teesside University 0
5 (c) 3 4 then o 3 must equal zero so that 3 0 the condition or which is: 4 3 (d) when 4 3 3 0 3 4 4 so that 3 4 and thereore 4 3 But as, then >> F L Thus L Teesside University 0
5 SUMMAY An ideal op-amp has: oltage gain o ininity nput resistance o ininity Output resistance o zero. The transer unction o an op-amp is: o G D ( ) where G D is the open-loop dierential voltage gain o the ampliier. the output o the ideal op-amp is to be inite, then n the virtual earth circuit 0. n this lesson we have shown how the op-amp can be used to orm: adders subtractors voltage-to-current and current-to-voltage conversions supply stabilizer buer ampliier. Teesside University 0