Performance and Characteristics of Silicon Avalanche Photodetectors in the C5 Process Paper Authors: Dennis Montierth 1, Timothy Strand 2, James Leatham 2, Lloyd Linder 3, and R. Jacob Baker 1 1 Dept. of Electrical and Computer Engineering, Boise State University, Boise, ID 83725 2075, 2 FLIR Systems, Inc., 3 Independent IC Circuit Design and Systems Consultant
Benefits From using Standard Process Low cost solution No extra specialized steps Reduced Size, Weight, and Power ROIC circuits can be built on same die as APD using a standard CMOS process
APD Benefits APD s are very sensitive due to high internal gain Fast Response Times Photodetector Comparison (Typical values) Gain Response Time(s) Avalanche Photodiode 10 2 10 4 10 10 p n junction 1 10 11 p i n junction 1 10 8 10 10 Metal Semiconductor Diode 1 10 11 Bipolar phototransistor 10 2 10 8 Field Effect phototransistor 10 2 10 7
APD PhotoDetectors 1000 Avalanche gain 100 10 1 Biasing region of high internal gain. 0.1 11.5 12 12.5 13 13.5 14 14.5 Reverse bias [V] Impact ionization occurs at high reverse bias conditions because a large Electric Field is required.
Avalanche Multiplication Electron Gains K.E. because of E Field If electron gains enough K.E. before a collision, impact ionization occurs creating an electron hole pair. E C h E V Showing the case of the Electrons. Holes also cause additional electron/hole pairs. MULTIPLICATION RESULTS IN A HIGH INTERNAL GAIN!
Impact Ionization occurs in the depletion region where the E Fields are large enough to accelerate electrons/holes to kinetic energies large enough to dislocate other electron/holes.
Application Examples LADAR Light Detection and Ranging Automotive Blind Spot Detection Collision Avoidance Systems Etc. Military Range Finders Traffic Safety Traffic Lights i.e. Delay Green Light for cars based on no stop on red Communications Optical Fiber Communications
Test Chip Objectives Fabricate APD s in a standard CMOS Process Investigate Layout Considerations Avoid bending E Fields. Look at various active area sizes. Reduced Guard Ring Layout. Maximum Fill Factor versus Substrate Leakage. APD Electrical Measurements Dark and Light Anode, Cathode, and Substrate currents. Light measurement is broadband microscope illuminator. Detailed spectral response is left for future work. APD Gain.
Layout Considerations Avalanche PhotoDetector (APD) is formed with p+ and the n well Active area is p+ in the n well Impact ionization (depletion) region is normal to the surface of the wafer, avoid bending E fields silicide STI is used to ensure a planar p + to n well transition (Guard against Junction Curvature Effect) p+ n+ p+ n+ p+ Important for reliable performance STI STI STI STI Various Active Area Sizes n-well Reduced Guard Ring Layouts p-substrate Larger Fill Factor Increase in Substrate?
Various Active Area Sizes 51um^2 9.6um^2 51um 9.6um 19.2um^2 4.8um^2 19.2um 4.8um
Minimum Guard Rings 19.2um^2 19.2um^2
Various APD IV Curves (No Light) 1.00E 03 1.00E 04 1.00E 05 1.00E 06 1.00E 07 1.00E 08 1.00E 09 4.8^2(min) 9.6u^2(min) 19.2^2(min) 9.6u^2 19.2^2 1.00E 10 51u^2 1.00E 11 15.50 15.00 14.50 14.00 13.50 13.00
Reduced Guard Ring Layout 9.6u^2 Active Area APD with Maximum Guard Rings No Measureable Substrate Differences! Note: measurements of 1.00E 11 are a stretch for the equipment used. 1.00E 02 1.00E 03 1.00E 04 1.00E 05 1.00E 06 1.00E 07 1.00E 08 1.00E 09 1.00E 10 1.00E 11 1.00E 12 12.00 13.00 14.00 15.00 16.00 9.6u^2 Active Area APD with Minimum Guard Rings 1.00E 02 1.00E 03 1.00E 04 1.00E 05 1.00E 06 1.00E 07 1.00E 08 1.00E 09 1.00E 10 1.00E 11 1.00E 12 12.00 13.00 14.00 15.00 16.00 Dark Cathode Dark Substrate Light Cathode Light Substrate Dark Cathode Dark Substrate Light Cathode Light Substrate
Punch Through Cathode and Substrate 1.00E 03 1.00E 04 1.00E 05 1.00E 06 1.00E 07 1.00E 08 1.00E 09 1.00E 10 1.00E 11 1.00E 12 11.50 11.75 12.00 12.25 12.50 Dark Light Substrate APD s Built using 180nm process. Punch Through was an issue for these experimental APD s, E field punched through n-well shorting p+ to substrate. 9.6u^2 Active Area APD with Maximum Guard Rings 1.00E 02 1.00E 03 1.00E 04 1.00E 05 1.00E 06 1.00E 07 1.00E 08 1.00E 09 1.00E 10 1.00E 11 1.00E 12 12.00 12.50 13.00 13.50 14.00 14.50 15.00 15.50 16.00 Dark Cathode Dark Substrate Light Cathode Light Substrate This issue was not observed for the APD s fabricated in ON s 500nm C5 process.
APD Measurements 1.E 03 1.E 05 1.E 04 [A] 1.E 05 1.E 06 1.E 07 1.E 08 1.E 09 1.E 10 Light Dark Photocurrent [A] 1.E 06 1.E 07 1.E 08 1.E 11 1.E 12 11.5 12 12.5 13 13.5 14 14.5 Reverse bias [V] 1.E 09 11.5 12 12.5 13 13.5 14 14.5 Reverse bias [V] Light conditions produced with an uncalibrated broad band microscope illuminator. Dark Measurements produced by using a light proof enclosure Photocurrent Versus Reverse Bias. For the next slide, a gain of 1 will be defined at 13.5V just before the knee of the photocurrent.
APD Gain 1000 Avalanche gain 100 10 1 0.1 11.5 12 12.5 13 13.5 14 14.5 Reverse bias [V] Gains in excess of 1000 achievable at photocurrents of 10uA.
Future Work In depth APD Electrical Characteristics Spectral Response, noise response, pulse characterization, etc. Using APD s along with on die readout circuitry in a standard CMOS process.