High-Speed Quad Monolithic SPST CMOS Analog FEATURES BENEFITS APPLICATIONS Fast ing : 55 ns Low Charge Injection: 5 pc Low r DS(on) : 3 TTL/CMOS Compatible Low Leakage: pa Fast Settling Times Reduced ing Glitches High Precision High-Speed ing Sample/Hold Digital Filters Op Amp Gain ing Flight Control Systems Automatic Test Equipment Choppers Communication Systems DESCRIPTION The DG71B high speed quad single-pole single-throw analog switch is intended for applications that require low on-resistance, low leakage currents, and fast switching speeds. Built on the proprietary high voltage silicon gate process to achieve superior on/off performance, each switch conducts equally well in both directions when on, and blocks up to the supply voltage when off. An epitaxial layer prevents latchup. The DG71B has a redesign internal regulator which improves start-up over the DG71. As a committed partner to the community and the environment, manufactures this product with the lead (Pb)-free device terminations. For analog switching products manufactured with % matte tin device terminations, the lead (Pb)-free E3 suffix is being used as a designator. FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION Dual-In-Line and SOIC IN 1 1 16 IN D 1 S 1 S 4 D 4 3 4 5 6 7 15 14 13 1 11 D S NC S 3 D 3 TRUTH TABLE Logic ON 1 OFF Logic.8 8 V Logic 1 4.4 V IN 4 8 9 IN 3 Top View ORDERING INFORMATION Temp Range Package Part Number to 7 C 16-Pin Plastic DIP DG71BCJ E3 DG71BDY E3 to 85 C 16-Pin Narrow SOIC DG71BDY-T1 E3 (with Tape and Reel) 1
ABSOLUTE MAXIMUM RATINGS to...................................................... 44 V to.................................................... 5 V Digital Inputs a V S, V D......................... () V to () + V or ma, whichever occurs first Current, Any Terminal......................................... ma Peak Current, S or D (Pulsed at 1 ms, % duty cycle max).......................... ma Storage Temperature (DY Suffix)................... 65 to 1 C (CJ Suffix)................... 65 to 15 C Power Dissipation (Package)b 16-Pin Plastic DIP c......................................... 47 mw 16-Pin Plastic Narrow SOIC d................................ 6 mw Notes: a. Signals on S X, D X, or IN X exceeding or will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6.5 mw/ C above 75 C d. Derate 7.6 mw/ C above 75 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SPECIFICATIONS a Parameter Analog Symbol Test Conditions Unless Specified = 15 V, = 5 V C, D Suffix to 7 C to 85 C V IN =.4 V,.8 V f Tempb Min d Typ c Max d Unit Analog Signal Range e V ANALOG 5 15 V Drain-Source On-Resistance r DS(on) I S = 1 ma, V D = V Off Leakage Current Channel On Leakage Current Digital Control I S(off) I D(off) I D(on) + I S(on) V D = 14 V, V S = 14 V V S = V D = 14 V 3 75 V IN = V. 1 Input Current with Voltage High I INH V IN = 15 V. 1 A Input Current with Voltage Low I INL V IN = V. 1 Dynamic Characteristics Turn-On Time V S = V Turn-Off Time See Figure 3 Charge Injection Q C L = 1 nf, V S = V V gen = V, R gen = See Figure 3 55 65 8 65 8 na ns 5 pc Source Off Capacitance C S(off) VS V S = V, V IN = 5 V 8 Drain Off Capacitance C D(off) f = 1 MHz 8 pf Channel On Capacitance C D ( on) V D = V S = V, V IN = V Off Isolation OIRR C L = pf, R L = 1 k 85 f = khz Crosstalk X TALK See Figures 4 and 5 Supply db Positive Supply Current I+ Negative Supply Current I All Channels On or Off V IN = 5 V or V 6 8 5.5 7.5 9 3.4 ma Notes: a. Refer to PROCESS OPTION FLOWCHART. b. = 5 C, = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. V IN = input voltage to perform proper function.
TYPICAL CHARACTERISTICS (5 C UNLESS NOTED) r DS(on) Drain-Source On-Resistance ( ) 7 6 r DS(on) vs. V D and Power Supply Voltages 5 V V 15 V V r DS(on) Drain-Source On-Resistance ( ) r DS(on) vs. V D and Temperature 15 C 85 C 5 C C 55 C = 15 V = 5 V 6 8 4 4 8 1 16 V D Drain Voltage (V) 5 5 5 15 V D Drain Voltage (V) Input ing Threshold vs. Supply Voltage.5 na Leakage Currents vs. Temperature I D(on) V IN ( V ) 1.5 1 Leakage 1 na I S(off), I D(off) pa.5 4 6 8 1 14 16 18 Positive/Negative Supplies (V) pa 55 35 5 5 5 45 65 85 Temperature ( C) 5 15 55 ing Times vs. Temperature = 15 V = 5 V 55 ing Time vs. Power Supply Voltage ing Time (ns) 45 ing Time (ns) 45 35 35 55 5 5 75 15 Temperature ( C) 4 6 8 1 14 16 18 Supply Voltage (V) 3
SCHEMATIC DIAGRAM (TYPICAL CHANNEL) 5 V Reg S X Level Shift/ Drive IN X D X FIGURE 1. TEST CIRCUITS +15 V Logic Input 5 V V % t r < ns t f < ns V S D IN 5 V R L 1 k C L 35 pf Input Output V S 9% C L (includes fixture and stray capacitance) 5 V = V S R L R L + r DS(on) FIGURE. ing Time maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http:///ppg?7966. 4
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