ECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline: Metal-Semiconductor Junctions MOSFET Basic Operation MOS Capacitor
Things you should know when you leave Key Questions What is the difference between an ohmic contact and a rectifying contact? What is a MOSFET? What are the transfer characteristics when V G changes? What are the transfer characteristics when V D changes?
Metal-Semiconductor Junctions Now let s bring the metal and semiconductor together E 0 Ф M Χ Ф S E C Metal Semiconductor N-type E FS E i Ф M > Ф S E FM E V When the materials are brought into contact with one another, they are not in equilibrium (E FS E FM ). Φ B Ф B = Φ M χ Surface potential energy barrier for electrons. E C E i EF Electrons begin moving from the semiconductor to the metal. The net transfer of electrons leaves a reduced electron concentration in the semiconductor and the barrier between the materials grows. E V Process continues until Fermi level is constant.
Metal-Semiconductor Junctions What happens if Ф M < Ф S? Ф M Χ Ф S Metal Semiconductor N-type E C Ф M < Ф S E FM E FS E i E V When the materials are brought into contact with one another, they are not in equilibrium (E FS E FM ). Electrons begin moving from the metal to the semiconductor. E C E i E V E F The net transfer of electrons from the metal into the semiconductor leaves a net excess of electrons at the surface. Process continues until Fermi level is constant.
Metal-Semiconductor Junctions But the point of adding contacts was to apply fields, let s look at this Apply positive bias, V V Metal Current Ф M > Ф S Semiconductor N-type E FM E C E i E V E FS This lowers E FM below E FS and reduces the barrier seen by electrons. Current begins to flow from the semiconductor to the metal. Continue to raise the positive bias and more electrons will have enough energy to surmount the barrier and contribute to current flow.
Metal-Semiconductor Junctions What happens if we apply a negative bias to the contact Apply increasingly negative bias, V Current V Metal Semiconductor N-type E FM E C E i E V E FS Ф M > Ф S This lowers E below FS E FM and increases the barrier seen by electrons. Current flow from the semiconductor is blocked by the large potential barrier. Only a small leakage current may flow from the metal to the semiconductor.
Metal-Semiconductor Junctions What happens when we reverse the relationship between the workfunctions? Positive bias V Metal Semiconductor N-type Ф M < Ф S E C E FS E FM E i E FM E V Current I V Current E C E i E FS E V Negative bias
MOSFET Basic Operation What is a MOSFET? MOSFET is an acronym which stands for Metal Oxide Semiconductor Field Effect Transistor. N+ source and drains are implanted into a relatively lightly doped p-type substrate (nchannel). Can also be made with n-type substrates and p-type source and drain (p-channel). Thin oxide layer separates the conducting gate region from the conducting gate region. Oxide regions are on either side of the MOSFET to isolate it from other devices in the integrated circuit. This device forms the backbone of much of the digital logic used in microprocessor technology today.
MOSFET Basic Operation Is there a current flowing? Let s check the energy bands n p n No current flows between the source and the drain in equilibrium. E C E F The p-type region separating creates built-in electric fields which creates a large potential barrier. E V So, how do we get current to flow from the source to the drain?
MOSFET Basic Operation Let s start applying bias to the MOSFET - - - V G ++++ ++++ +++ + + + +++ V D - - - Let s begin with an n-type MOSFET N-type source and drain and P-type channel. Apply a small positive drain voltage (V D ) to try to draw a current from the source to the drain. Positive charge on gate draws electrons towards the gate forming a channel which allows current to flow from the source to the drain. n p n - - - - - - qv G E C E F E V
MOSFET Basic Operation So as we vary the gate voltage, what does the current look like? ++++ ++++ +++ + + + +++ - - - - - - Depletion Region Channel Region When the barrier region is sufficiently reduced, then a current flows from the source to the drain. As we put more positive charge on the gate, more holes are repelled depleting the concentration near the surface and populating it with electrons. The point in the gate voltage sweep when significant current begins to flow is the threshold voltage, V T. This corresponds to the point when the channel is formed under the gate. Were we to have made a PNP device the application of a negative V G would repel electrons and attract hole forming a channel. V G
MOSFET Basic Operation What if we sweep the drain voltage?? ++++ ++++ +++ + + + +++ Pinch off V D - - - - - - Depletion Region Channel Region With V D swept in small positive increments, the channel merely acts like a resistor and the drain current is proportional to the drain voltage. Past a few tenths of a volt of bias, the voltage drop from the source to the drain associated with current flow begins to negate the inverting effect of the gate. Channel carriers begins to decrease leading to a reduction in the channel conductivity. This is due to the electron flow not being through the channel but a larger region about the drain. Drain current is said to be in saturation as changes in V D produce no changes in I D.
MOSFET Basic Operation What do we know about a MOSFET so far? Enhancement mode No channel formed at V G = 0 V. What if we use n + -n-n + instead?? Depletion mode Channel formed at V G = 0 V.
MOSFET Basic Operation What do we know about a MOSFET? - - - - - - P-type Si + + + + + + + + + + + + + For NMOS: For current to flow V GS > V T Enhancement mode: V T > 0 Depletion mode: V T < 0 Transistor is on when VG = 0 V. For PMOS: For current to flow V GS < V T Enhancement mode: V T < 0 Depletion mode: V T > 0 Transistor is on when V G = 0 V. P-MOS N-MOS N-type Si B.S. Doyle et al., IEEE TED (2003)
MOSFET Basic Operation Using MOSFETs for logic We can string multiple MOSFETs together to trace out logical functionality. CMOS (Complementary Metal Oxide Semiconductor) Logic i p 01 01 i n P- MOS N- MOS i out Input (A) Left, we show the simple connection method for different devices on the same wafer. Below, the connection scheme for a logical inverter. Output (Q) 1 (V dd ) 0 (V ss ) 0 (V ss ) 1 (V dd )
MOSFET Basic Operation But from a MOSFET to a microprocessor Contents of single die before packaging. 12 wafer filled with 100s of die. Single die after removal and packaging. Single transistor Cross section of single element.
Ideal MOS Capacitor But we saw that the operation in most regimes was controlled by the channel The channel of a MOSFET is an example of a MOS capacitor Useful for: Digital and analog logic Memory functionality Imaging (CCD) and displays (LCD) What is the structure of a MOS capacitor? Heavily doped polycrystalline Si film as the gate electrode material. N-type for n-channel transistors (NMOS). P-type for p-channel transistors (PMOS). SiO 2 as the gate dielectric Band gap = 9 ev. Relative dielectric constant ε r = 3.9. Si as the semiconductor material. P-type for n-channel devices. N-type for p-channel devices.
Ideal MOS Capacitor Remember all of the components Charges only exist at the surface of the metal. We assume that there are no charges or dopants located in the oxide region. We cannot achieve thermal equilibrium through the oxide layer. To achieve thermal equilibrium we need to use a wire to connect the metal to the semiconductor. Let s start with the ideal situation, Ф M = Ф S
Ideal MOS Capacitor Let s now apply a negative gate voltage to our MOS capacitor Applying a negative gate voltage deposits negative charge on the metal. We expect to see this charge compensated by a net positive charge on the semiconductor. The applied negative voltage depresses the potential of the metal. As a result the electron energies are raised in the metal relative to the semiconductor. Moving E FM up causes a tilt in the oxide bands and the semiconductor bands p = n e i Ei E k T b F E ( x) = 1 q More holes accumulate at the surface of the semiconductor. de dx i
Ideal MOS Capacitor Now apply a positive gate voltage Deposition of positive charge on the gate requires compensation by negative charges in the semiconductor. The negative charge in a p- type semiconductor arises from the depletion of holes from the surface. This leaves behind uncompensated ionized acceptors. The bands bend downward near the semiconductor surface (E I closer to E F ). Increased electron concentration What happens if we keep increasing the amount of positive gate voltage we apply to the metal relative to the semiconductor?
Ideal MOS Capacitor When V G is large enough, the surface is inverted. The n-type surface that forms as a result of the applied electric field is the key to transistor operation! Define a potential qφ S which determines how much band bending there is at the surface. When qφ S = 0 we are in flat band condition. When qφ S < 0 we have hole accumulation at the surface. When qφ S > 0 we have electron accumulation at the surface. When qφ S > qφ F we have inversion at the surface. Surface should be as strongly n-type as the body is p-type. INV S = 2φ φ φ INV S = 2φ F F = = qφ F = kbt 2 q kbt 2 q E bulk I ln ln E N n N n F i i A D