Design of Multi-Level Inverter and Its Application As Statcom to Compensate Voltage Sags Due to Faults

Similar documents
Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink

Research Article Volume 6 Issue No. 5

Level Shifted Pulse Width Modulation in Three Phase Multilevel Inverter for Power Quality Improvement

Multilevel Inverter Based Statcom For Power System Load Balancing System

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches

A Novel Cascaded Multilevel Inverter Using A Single DC Source

Speed Control of Induction Motor using Multilevel Inverter

Simulation and Experimental Results of 7-Level Inverter System

Performance Improvement of Multilevel Inverter through Trapezoidal Triangular Carrier based PWM

Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor

An Implementation of 9-Level MLI using IPD-Topology for Harmonic Reduction

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION

Performance Analysis of Three Phase Cascaded H-Bridge Multi Level Inverter for Voltage Sag and Voltage Swell Conditions

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS

ISSN: International Journal of Science, Engineering and Technology Research (IJSETR) Volume 1, Issue 5, November 2012

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

Reduction in Total Harmonic Distortion Using Multilevel Inverters

Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques

Keywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion.

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive

Australian Journal of Basic and Applied Sciences. Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives

COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER

Performance Evaluation of Single Phase H-Bridge Type Diode Clamped Five Level Inverter

A SOLUTION TO BALANCE THE VOLTAGE OF DC-LINK CAPACITOR USING BOOST CONVERTER IN DIODE CLAMPED MULTILEVEL INVERTER

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.

Simulation of Cascade H-Bridge Multilevel Inverter With Equal DC Voltage Source

Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI

Modified Transistor Clamped H-bridge-based Cascaded Multilevel inverter with high reliability.

Hybrid 5-level inverter fed induction motor drive

[Mahagaonkar*, 4.(8): August, 2015] ISSN: (I2OR), Publication Impact Factor: 3.785

Comparison of Multi Carrier PWM Techniques applied to Five Level CHB Inverter

MULTICARRIER TRAPEZOIDAL PWM STRATEGIES FOR A SINGLE PHASE FIVE LEVEL CASCADED INVERTER

Symmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network

INSTANTANEOUS POWER CONTROL OF D-STATCOM FOR ENHANCEMENT OF THE STEADY-STATE PERFORMANCE

Simulation of Multilevel Inverter Using PSIM

INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET)

International Journal of Advance Engineering and Research Development

A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications

Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor

New Multi Level Inverter with LSPWM Technique G. Sai Baba 1 G. Durga Prasad 2. P. Ram Prasad 3

A Hybrid Cascaded Multilevel Inverter for Interfacing with Renewable Energy Resources

Bhavin Gondaliya 1st Head, Electrical Engineering Department Dr. Subhash Technical Campus, Junagadh, Gujarat (India)

SPWM Switching Strategy for Compensation of Unbalanced and Non Linear Load Effects in Three Phase Four Wire System Using D-Statcom

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive

Design and Development of Multi Level Inverter

AN INVERTED SINE PWM SCHEME FOR NEW ELEVEN LEVEL INVERTER TOPOLOGY

DC Link Capacitor Voltage Balance and Neutral Point Stabilization in Diode Clamped Multi Level Inverter

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online):

SIMULATION AND IMPLEMENTATION OF MULTILEVEL INVERTER BASED INDUCTION MOTOR DRIVE BASED ON PWM TECHNIQUES

Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive

Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded Multilevel Inverter

OVERVIEW OF SVC AND STATCOM FOR INSTANTANEOUS POWER CONTROL AND POWER FACTOR IMPROVEMENT

CASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES

Multilevel DC-link Inverter Topology with Less Number of Switches

Analysis of New 7- Level an Asymmetrical Multilevel Inverter Topology with Reduced Switching Devices

Modeling of New Multilevel Inverter Topology with reduced Number of Power Electronic Components

CHAPTER 3 SINGLE SOURCE MULTILEVEL INVERTER

COMPENSATION OF VOLTAGE SAG USING LEVEL SHIFTED CARRIER PULSE WIDTH MODULATED ASYMMETRIC CASCADED MLI BASED DVR SYSTEM G.Boobalan 1 and N.

29 Level H- Bridge VSC for HVDC Application

Multilevel Inverters: A Comparative Study of Pulse Width Modulation Techniques

Mitigating Voltage Sag Using Dynamic Voltage Restorer

TRANSFORMER LESS H6-BRIDGE CASCADED STATCOM WITH STAR CONFIGURATION FOR REAL AND REACTIVE POWER COMPENSATION

International Journal of Advance Engineering and Research Development

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor

Cascaded H-Bridge Five Level Inverter for Harmonics Mitigation and Reactive Power Control

NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER

Modified Three-Phase Four-Wire UPQC Topology with Reduced DC-Link Voltage Rating

Performance Study of Multiphase Multilevel Inverter Rajshree Bansod*, Prof. S. C. Rangari**

A Modified Apod Pulse Width Modulation Technique of Multilevel Cascaded Inverter Design

A Comparative Study of SPWM on A 5-Level H-NPC Inverter

Multilevel Inverter with Coupled Inductors with Sine PWM Techniques

STATCOM WITH POD CONTROLLER FOR REACTIVE POWER COMPENSATION Vijai Jairaj 1, Vishnu.J 2 and Sreenath.N.R 3

SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION

Harmonic Reduction in Five Level Inverter Based Dynamic Voltage Restorer

Compensation of Distribution Feeder Loading With Power Factor Correction by Using D-STATCOM

CAPACITOR VOLTAGE BALANCING IN SINGLE PHASE SEVEN-LEVEL PWM INVERTER

COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS

Study of five level inverter for harmonic elimination

Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor

MLI HYBRID STATCOM WITH WIDE COMPENSATION RANGE AND LOW DC LINK VOLTAGE

SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs.

Simulation and Analysis of ASCAD Multilevel Inverter with SPWM for Photovoltaic System

DWINDLING OF HARMONICS IN CML INVERTER USING GENETIC ALGORITHM OPTIMIZATION

Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.

A NOVEL APPROACH TO ENHANCE THE POWER QUALITY USING CMLI BASED CUSTOM POWER DEVICES

Keywords Asymmetric MLI, Fixed frequency phase shift PWM (FFPSPWM), variable frequency phase shift PWM (VFPSPWM), Total Harmonic Distortion (THD).

A Five Level DSTATCOM for Compensation of Reactive Power and Harmonics

HARMONIC ORIENTATION OF PULSE WIDTH MODULATION TECHNIQUE IN MULTILEVEL INVERTERS

ISSN Vol.02,Issue.19, December-2013, Pages:

MMC based D-STATCOM for Different Loading Conditions

COMPARATIVE ANALYSIS OF SELECTIVE HARMONIC ELIMINATION OF MULTILEVEL INVERTER USING GENETIC ALGORITHM

Power Quality Improvement Use of Different Pulse Width Modulation Techniques

CHAPTER 6 UNIT VECTOR GENERATION FOR DETECTING VOLTAGE ANGLE

A Fifteen Level Cascade H-Bridge Multilevel Inverter Fed Induction Motor Drive with Open End Stator Winding

PERFORMANCE ANALYSIS OF SEVEN LEVEL INVERTER WITH SOFT SWITCHING CONVERTER FOR PHOTOVOLTAIC SYSTEM

Ripple Reduction Using Seven-Level Shunt Active Power Filter for High-Power Drives

Mitigation of Line Current Harmonics Using Shunt Active Filter With Instantaneous Real and Reactive Power Theory

Analysis and Simulation of Multilevel DC-link Inverter Topology using Series-Parallel Switches

Transcription:

International Journal of Engineering Research and Development e-issn: 2278-067X, p-issn: 2278-800X, www.ijerd.com Volume 3, Issue 6 (September 2012), PP. 20-25 Design of Multi-Level Inverter and Its Application As Statcom to Compensate Voltage Sags Due to Faults BBG. Tilak 1, Yarra.Naveen Kumar 2, Dr. Ch. Sai Babu 3, K. Durga Syam Prasad 4, Haritha. Inavolu 5 1 PG Student, VITAM College of Engineering, Visakhapatnam- 531173. 2,5 Assistant Professor, VITAM College of Engineering, Visakhapatnam-531173 3 Professor, Deparment of Electrical Engineerimg, Jawaharlal Nehru Technological University, Kakinada-533003 4 Associate Professor, VITAM College of Engineering, Visakhapatnam-531173 Abstract Modern day power systems, power electronic devices are playing vital role in every aspect of the power system network. Among various devices multi-level inverters are the most efficient devices due to their Simple circuit configuration, reliability and cost effective implementation. Application of multi-level inverters along with STATCOM using SPWM (Sinusoidal Pulse Width Modulation) technique improves the operation & utilization of power system. Because STATCOM injects reactive component into the power system during large disturbances. This paper deals with 3- Ф to ground fault using RL load. All the results are studied through MATLAB Simulink. Keywords Multi-level inverter, SPWM strategy, STATCOM, Total Harmonic Distortion(THD). I. INTRODUCTION Multi-level inverters are originally developed for medium voltage drive of ac motor. The technology is based on the composition of voltage waveform from dc voltage level. As the number of voltage levels increases, the output voltage waveform adds more steps and the output current waveform has the lower total harmonic distortion. Another major advantage of multi-level inverter is that their switching frequency can be lower than the conventional two-level inverter for the same Total Harmonic Distortion (THD) of the output voltage. In recent years, multi-level voltage-sources inverters have received more and more importance and attention in industrial applications and are widely used in different applications such as static power converter for high-power applications such as FACTS devices, HVDC converters etc. If static shunt devices are used in addition to this multi-level inverters, the performance of the network improves and the network can be utilize very effectively. One of the static devices which gives good support to the system under the disturbances is Static Compensator (STATCOM). The STATCOM is found more effective for large system Disturbances and it acts quickly to increase their injected current and thus provide the required reactive power. It is experimental that the STATCOM need to provide the reactive power to their full capacity only for a short period of time after the fault and provides a better option to improve short-term voltage instability problems. The technique that is applied for the proposed multi-level inverter is Sinusoidal Pulse Width Modulation (SPWM). SPWM method is based on phase decomposition (PD) modulation technique is used which requires only one carrier signal. SPWM is better technique when we go for higher levels. By using the new SPWM strategy, effective time calculation and switching sequence selection are easily done like conventional two-level inverter. So in this dissertation work based on SPWM is designing for third & fifth levels. The advantage of multi-level inverters is that their switching frequency is less. Another major advantage of multi-level inverters are as the voltage levels increases, the output wave forms adds more steps and the output current waveform has low total harmonic distortion. In this paper, a simple SPWM method for three level, and five-level inverter and comparison of THD presented. Finally the proposed topology of multi-level inverter is verified by showing the feasibility through the simulation. II. (a) 3-Level multi-inverter: CONSTRUCTION OF PROPOSED MULTI-LEVEL INVERTER 20

Fig(1): 3-level Inverter construction circuit The proposed three level inverter with RL load, which consists of voltage source inverter. The inverter model connected to the RL load is controlled to produce the staircase voltage and sinusoidal current. Three levels PWM based on constant carrier frequency for three level inverter system is proposed to reduce the harmonic contents in the output voltage and decrease the voltage rating of the power device. Fig(2): SPWM generator circuit of 3-level inverter The output of the three level multi-inverter is observed by applying 3-phase-to-ground fault to the system having 50HZ, 400V rating by taking fault time as 0.1sec. Due to the widespread use of high-power switch devices, a lot of reactive and harmonics current are produced, which have a worse effect on electric power equipment. Now, a high-order harmonic current and reactive current compensation are crucial tasks that need to be settled urgently in power systems. STATCOM is an advanced static VAR compensator introduced in 1990. It is different from the conventional VAR compensators such as thyristor-switched capacitors (TSC), thyristor-switched reactors (TCR) and the mechanically switched capacitors. STATCOM is a static VAR compensator with no rotating parts, and is composed of new-generation high-power forcecommutated semiconductor valve based inverters, DC capacitors and output transformers. Nowadays, most of the STATCOMs that have been in use at home and abroad are made up of multi-level inverters. In order to use this combination more effective, SPWM technique offers some advantages. One of the advantage is, it requires only one carrier signal because this is based on phase disposition modulation. About Spwm Strategy Low ratio of carrier frequency to modulation frequency is the best form of modulation for high power application, which is operating domain for multilevel inverter. For this purpose digital control of multilevel inverter using DSP/Microcontroller is preferred due to their dynamic controlling property. However DSP/Microcontroller based system uses symmetrical regular sampling, asymmetrical regular sampling or re-sampling technique.these sampling techniques either introduces delay in switching or requires dedicated controller.in this work a novel mathematical model of SPWM technique for multilevel inverter is presented which approaches the performance of traditional natural Sinusoidal Pulse width Modulation (SPWM). A single sinusoidal reference is compared with each carrier signal to determine the output voltage for the inverter. Three dispositions of the carrier signals are used to generate the pulse width modulation signal. (1)Phase Disposition (PD): Where all carrier signals are in-phase. (a)pd waveform (2)Alternative phase opposition disposition (APOD): Where each carrier is phase shifted by 180 degrees from its adjacent carrier. 21

(b)apod waveform (3)Phase Opposition disposition (POD): Where the carriers above zero voltage are 180 degrees out of phase with those below zero voltage. (c)pod waveform The SPWM technology corrects the output voltage according to the value of the load by changing the Width of the switching frequency in the oscillator section. As a result of this, the AC voltage from the Inverter changes depending on the width of the switching pulse. To achieve this effect, the SPWM Inverter has a SPWM controller IC which takes a part of output through a feedback loop. The PWM controller in the Inverter will makes corrections in the pulse width of the switching pulse based on the feedback voltage. This will cancel the changes in the output voltage and the Inverter will give a steady output voltage irrespective of the load characteristics. Fig (3): Block Diagram of PWM (b) Five-Level multi-inverter: The construction and working of both 3 & 5 level inverters are same except the number of increased levels. Fig(4) shows the SPWM generator circuit for 5-level inverter. As the number of levels increases THD will decrease and give the same output voltage of conventional multi-level inverter, as the rated current and number of conduction devices are same. So the conduction loss is also same as STATCOM provides further requirements to the network. Fig(4) shows the general simplified circuit of SPWM generator circuit. 22

Fig (4): SPWM generator circuit of 5-level inverter III. MATLAB SIMULATION Construction of multi-level inverter using SPWM is a very simple technique for harmonic reduction. In this technique pulse magnitude will be constant and only pulse time (width) can be changed. In this pure sine wave is compared with carrier (triangular) wave and producing gate pulses. Sine wave has fundamental frequency and carrier wave can be taken more than fundamental frequency. Fig (5): Simulation Circuit of 3-level inverter with SPWM technique. Fig (6): Simulink model of 5-level inverter 23

IV. SIMULATION RESULTS Fig(7): Volatage & current across STATCOM during fault Fig(8): Output waveform of 3-level multi-inverter Fig(9): Output voltage of the 5-level inverter Fig(7) shows the output voltage and current waveforms across the STATCOM. And it shows how STATCOM injects reactive power into the network under the fault conditions. Fig(8) and Fig(9) shows the output voltage and current waveforms of the 3-level and 5-level inverters. Switching devices in the proposed multi-level inverter are synchronized with reference signal of the output voltage. Therefore the voltage distortion and switching loss is very small. The configuration of the circuit is simple because the PWM signal is generated by using only one carrier signal and the switching devices used in the circuit are less. Thus the reliability of the proposed system is high and the price of making can be small. By comparing the 3 & 5 level multi-inverter output wave forms as the number of voltage levels increases the output voltage waveform adds more steps and the output current waveform has the lower total harmonic distortion(thd) and the efficiency is also increased. 24

V. CONCLUSION This paper proposed a new multi-level inverter topology using phase disposition with SPWM technique. The performances of two multilevel inverter topologies have been analyzed. Multicarrier SPWM with PD techniques has been applied to these inverters and their control effects have been investigated. The simulation of the inverters namely conventional three and five level inverter was carried using sinusoidal pulse width modulation (SPWM).It has shown that decrease in voltage and current THD in moving from three level inverter to five level inverter. This paper briefly explains theory of sinusoidal pulse width modulation (SPWM) for three and five level inverter and performance of both inverters was tested using RL load. It has shown that load current for five level inverter are much more sinusoidal and improvement in the line current waveform and decrease in the THD from three level to five level inverter and decrease in the THD as the frequency is increased. REFERENCES [1]. G.Grandi, C.Rossi, D.Ostojik, D. Kasadei, A new multi-level conversion structure for grid connected PV applications, IEEE Trans. Ind. Electron., Vol.56, No.11,pp 4416-4426,Nov-2009. [2]. G.Bhuvaneshwari and Nagaraju Multilevel inverters a comparative study vol.51 No.2 march april 2005. [3]. Jose Roderiguez, Jih-Sheng Lai and Fang Zheng Reng, Multilevel Inverters A survey of topologies,control, and applications,ieee Trans.On Ind.Electronics, vol No.[4], August 2002. [4]. Siriroj Sirisukprasert, Jih- Sheng Lai & Tina Hua Liu Optimum harmonics Reduction With A wide Range Of Modulation Indexes for Multilevel Converters IEEE Trans Ind Application Electronics,Vol 49, No. 4, August 2002. [5]. A.Nabae I.Takahashi, and H.Akagi A new neutral point clamped PWM inverter IEEE Trans, Ind. Appl., Vol 1A-17,No.5,pp.518-523,sep 1981 [6]. K. Arab tehrani, H.Andriasioharana, I. Rasonarivo & F.M. Sargos A Multilevel Inverter Model IEEE Trans. 2008. [7]. A. M. Massoud, S.J. Finney and B.W. Williams Control Techniques for Multilevel Voltage Source Inverters IEEE proce. 2003. [8]. Vic Gosbell. Harmonic Distortion in the Electrical Supply System, PQC Tech Note No. 3 (Power Quality Centre), Elliot Sound Products. [9]. F. Z. Peng, A generalized multilevel inverter topology with self voltage balancing, IEEE Trans. Ind. Applicant., vol. 37, pp. 611-618, Apr. 2001. [10]. D. Zhong, L.M. Tolbert, and J.N. Chiasson, "Active harmonic elimination for multilevel converters" IEEE Trans. on Power Electronics, vol. 21, no. 2, pp. 459 469, March 2006. 25