PREFERRED PRACTICE NO. PT-TE-1414 RELIABILITY PAGE 1 OF 6 ELECTROSTATIC DISCHARGE (ESD) TEST Prctice: Test stellites for the ility to survive the effects of electrosttic dischrges (ESDs) cused y spce chrging environment. Such environments include Erth equtoril orits ove 8000 km nd virtully ll orits ove 40 degrees ltitude, Jupiter encounters closer thn 15 Rj (Jupiter rdii), nd possily other plnets. Benefit: Proper implementtion of this prctice will ssure tht stellites will operte in the spce chrging environment without filure or wkwrd ground controller opertions. Progrms tht Certified Usge: Voyger, Glileo Center to Contct for Informtion: Jet Propulsion Lortory (JPL) Implementtion Method: The following informtion hs een prtilly derived from NASA Technicl Pper 2361, "Design Guidelines for Assessing nd Controlling Spcecrft Chrging Effects". Tht document is lso recommended for further description of the test process. 1. Suject the spcecrft to n environment representtive of tht expected. 2. The environment pplied to the spcecrft in () should include sfety mrgin (i.e., e greter thn expected) tht gives confidence tht the flight spcecrft will survive the rel environment. 3. Hve design qulifiction test sequence tht is extensive: test ll units of hrdwre; use long test durtions; exmine mny equipment operting modes; pply the environment to ll surfces of the test unit. 4. Hve flight hrdwre test sequence of more modest scope: delete some units from test if qulifiction test shows gret design mrgins; use shorter test durtions; use only key equipment operting modes; nd pply the environment to limited numer of surfces. Simultion of Prmeters The following items should e considered in test design: JET PROPULSION LABORATORY
PAGE 2 OF 6 1. Sprk loction. 2. Rdited fields, nd/or structure currents. 3. Are, thickness, nd dielectric strength of mteril. 4. Totl chrge involved in the event. 5. Brekdown voltge. 6. Current wveform: rise time, width, fll time, nd rte of rise (mps/second). 7. Voltge wveform: rise time, width, fll time, nd rte of rise (mps/second). Tle 1 shows typicl vlues s clculted on some spcecrft. They hve een compiled from vriety of sources, mostly ssocited with the Voyger nd Glileo spcecrft. New vlues must e clculted for different stellite. Tle 1. Exmples of Estimted Spce-Generted ESD Sprk Prmeters c ESD Cpcitnce, C, Brekdown Energy, Pek Dischrge Dischrge d, Genertor nf Voltge, E, mj Current Current Current V, kv e f B I pk, A rise time, pulse width t, ns t, ns Dielectric 20 1 10 g 2 3 10 plte to conductive sustrte Exposed.150 5 1.9 36 10 15 connector dielectric Pint on high- 550 1 150 150 5 2400 gin ntenn Conversion 4.5 1 2.25 16 20 285 coting on metl plte Pint on optics 550.360 35000 18 5 600 hood Computed from surfce re, dielectric thickness, nd dielectric constnt. Computed from dielectric thickness nd mteril rekdown strength. Computed from E = ½ CV. Estimted sed on mesured dt; extrpoltion sed on squre root of re. Mesured nd deduced from test dt. To lnce totl chrge on cpcitor. This ws replcement current in longer ground wire; chrge is not lnced. c 2 d e f g r p
PAGE 3 OF 6 Severl representtive types of test equipment re descried in Tle 2. Where possile, typicl prmeters for tht type of test re listed. Tle 2. Exmples of Severl ESD Genertors c ESD Cpcitnce, Brekdown Energy, Pek Current, Dischrge Dischrge Genertor C, nf Voltge, E, mj I pk, A Current rise- Current V B, kv time, pulse width, t, ns t, ns MIL-STD-1541 0.035 19 6 80 5 20 (Auto coil) Flt Plte 14 5 180 80 35 880 20 cm x 20 cm t 5 kv, 0.08 mm (3 mil) Mylr Insultion Flt Plte with 550.450 550 15 15 () lumped-element cpcitor Cpcitor direct 1.1 320.056 1 9 3x10 to 20 injection 9 10x10 Cpcitor rc 60 1.4 59 1000 80 dischrge Prmeters were mesured on one unit similr to the MIL-STD-1541 design. RC time constnt decy Vlue uncertin MIL-STD-1541 Sprker The MIL-STD-1541 sprker is commonly used. The schemtic nd usge instructions re shown in MIL-STD-1541A. Flt Plte Cpcitor A flt plte cpcitor my e used in severl circumstnces. Exmples of spcecrft res which my e simulted y flt plte cpcitor re: () therml lnket res; () dielectric res such s clirtion trgets; or dielectric res such s non-conductive pints. The chief vlue of flt plte cpcitor is to permit wide-spred dischrge to simulte the physicl pth of current flow. r p
PAGE 4 OF 6 Lumped Element Cpcitors Lumped element cpcitors cn overcome some of the ojections rised out flt plte cpcitors. They cn hve lrge cpcitnce in similr res nd this supplement flt plte cpcitor if it lone is not dequte. Switches There re wide vriety of switches tht cn e used to initite the rc dischrge. At low voltges, semiconductor switches cn e used. The MIL-STD-1541 sprker uses n SCR to initite the sprk ctivity on the primry of step-up trnsformer. Also t low voltges, mechnicl switches my e used (for exmple, to dischrge modest voltge cpcitors). The "ounce" prolem with mechnicl switches cn e llevited y the use of Mercury-wetted switches. For high voltge switching in ir, gp mde of two pointed electrodes cn e used s the dischrge switch. For tests which involve fixed dischrge voltge, gs dischrge tues re ville with fixed rekdown voltges. The dvntges of the gs dischrge tue compred to needle points in ir is its fster rise time nd its very repetle dischrge voltge. Another gs dischrge tue is the triggered gs dischrge tue. This tue cn e triggered electroniclly, much s n SCR cn e turned on y its gte. Methods of ESD Appliction The ESD energy cn e s much s one joule, ut usully is in the rnge of millijoules of energy. The methods of ppliction cn rnge from indirect (rdited) to direct (pplying the sprk directly to piece prt). In generl, the method of ppliction should simulte the expected ESD source s much s possile. The following prgrphs descrie severl typicl methods: Rdited Field Tests The sprking device cn e operted in ir t some distnce from the victim. This cn e used to check for RF interference to communictions or surveillnce receivers s coupled into their ntenns. It cn lso check susceptiility of scientific instruments which my e mesuring plsm or nturl rdio wves.
PAGE 5 OF 6 Single Point Dischrge Tests Dischrging the rc onto the spcecrft surfce (or temporry protective metllic fitting), with the rc current return wire in close proximity, cn represent the dischrge nd locl flowing of rc currents. This test is more severe thn the rdited test, since it is immeditely djcent to the spcecrft rther thn some distnce wy. Structure Current Tests The ojective of structure current testing is to simulte "lowoff" of chrges from spcecrft surfce. If surfce chrges nd resultnt ESD occurs, the sprk my vporize nd mechniclly remove oth mteril nd chrges without locl chrge equliztion. In such cse the remining chrge on the spcecrft will redistriute itself, cusing structurl currents. Typiclly, such test would e ccomplished y using one or more of the following current pths: 1. dimetriclly opposed loctions (through the spcecrft). 2. protuernces (from lnding foot to top; ntenn to ody; thruster jets to opposite side of ody). 3. extensions or ooms (from end of sensor oom to spcecrft chssis; end of solr rry to spcecrft chssis). 4. From lunch ttchment point to other side of spcecrft. Unit Testing Unit ESD testing serves the sme purpose it serves in stndrd environmentl testing; i.e., it serves to identify design deficiencies t stge when design chnges re more esily ccomplished. However, it is very difficult to provide relistic determintion of the unit's environment s cused y n ESD on the spcecrft. Spcecrft Testing The system level test will provide the most relile determintion of the expected performnce of spce vehicle in the chrging environment. Such test should e conducted on representtive spcecrft prior to exposing the flight spcecrft to ssure tht there will e no indvertent over stressing of the flight units. Idelly the spcecrft should e in 100% flight-like configurtion. A detiled test pln must e developed defining test procedures, instrumenttion, test levels, nd prmeters to e investigted. Test techniques will proly involve current flow in the spcecrft structure. Tests my e conducted in mient environment, ut screen rooms with electromgnetic
PAGE 6 OF 6 dmpers re recommended. MIL-STD-1541 system test requirements nd rdited EMI testing re considered to e miniml sequence of tests. The test levels should e determined from the nlysis of dischrging ehvior in the sustorm environment. It is recommended tht full level testing, with test mrgins, e pplied to structurl, engineering, or qulifiction models of spcecrft with only reduced levels pplied to the flight unit. The test mesurements (structurl currents, hrness trnsients, upsets, etc.) re the key systems responses which re to e used to vlidte predicted ehvior. Technicl Rtionle: Regions of spce tht contin plsms (ionized gses, usully consisting of electrons nd hydrogen ions) cn sometimes e of high energy, s much s 20,000 electron volts or more. The interction of this plsm with typicl spcecrft dielectric surfces (usully therml control surfces, such s Teflon therml lnkets) cuses negtive chrge to e deposited on these surfces. It hs een documented tht such chrges cn generte electric fields in excess of the rekdown strength of the dielectrics. The resultnt ESD sprk hs een known to disrupt digitl nd nlog electronics, nd cn even e so strong tht it dmges spcecrft electronic hrdwre. Impct of Non-Prctice: If protective design nd verifiction mesures re not tken when necessry, the worst impct tht cn occur is tht the stellite will ecome completely non-functionl. Totl losses hve occurred on severl stellites in Erth geosttionry orits ( very severe spce chrging environment); the filures were ttriuted to the effects of electrosttic dischrge. A less severe effect is trnsient disruptions in stellite opertion. Exmples include Power On Reset events (Voyger t Jupiter encounter) nd ttitude control disruptions requiring frequent ground controller intervention (severl Erth geosttionry stellites). References: 1. MIL-STD-1541A, "Electromgnetic Comptiility Requirements for Spce Systems" 2. NASA Technicl Pper 2361, "Design Guidelines for Assessing nd Controlling Spcecrft Chrging Effects"