FET Amplifier Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731- 2555643 e mail : info@scientech.bz Website : www.scientech.bz Toll free : 1800-103-5050
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AB26 FET Amplifier Table of Contents 1. Introduction 4 2. Theory 6 3. Experiments Experiment 1 10 Study of the Theoretical Analysis of FET Amplifier Experiment 2 14 Study of and Measure the Frequency Response of FET Amplifier Experiment 3 17 To Measure Various Parameters of FET Amplifier and compare it theoretically Experiment 4 20 To observe the output of FET Amplifier in ohmic and Cutoff Region 4. Data Sheet 22 5. Warranty 24 6. List of Accessories 24 7. Result 25 RoHS Compliance Scientech Products are RoHS Complied. RoHS Directive concerns with the restrictive use of Hazardous substances (Pb, Cd, Cr, Hg, Br compounds) in electric and electronic equipments. Scientech products are Lead Free and Environment Friendly. It is mandatory that service engineers use lead free solder wire and use the soldering irons upto (25 W) that reach a temperature of 450 C at the tip as the melting temperature of the unleaded solder is higher than the leaded solder. Scientech Technologies Pvt. Ltd. 3
Introduction AB26 is a compact, ready to use FET Amplifier experiment board. This board is useful for students to understand the working and operation of FET amplifier. It can be used as stand alone unit with external DC power supply or can be used with Scientech Analog Lab ST2612, which has built in DC power supply, AC power supply, function generator, modulation generator, continuity tester, toggle switches, and potentiometer. List of Boards : Model Name AB01 AB02 AB03 AB04 AB05 AB06 AB07 AB08 AB09 AB10 AB11 AB12 AB13 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23 AB24 AB25 AB27 AB28 AB29 AB30 AB31 AB32 AB33 AB35 AB37 AB39 Diode characteristics (Si, Zener, LED) Transistor characteristics (CB NPN) Transistor characteristics (CB PNP) Transistor characteristics (CE NPN) Transistor characteristics (CE PNP) Transistor characteristics (CC NPN) Transistor characteristics (CC PNP) FET characteristics Rectifier Circuits Wheatstone bridge Maxwell s Bridge De Sauty s Bridge Schering Bridge Darlington Pair Common Emitter Amplifier Common Collector Amplifier Common Base Amplifier RC-Coupled Amplifier Cascode Amplifier Direct Coupled Amplifier Class A Amplifier Class B Amplifier (push pull emitter follower) Class C Tuned Amplifier Transformer Coupled Amplifier Phase Locked Loop (FM Demodulator & Frequency Divider / Multiplier) Voltage Controlled Oscillator Multivibrator (Monostable / Astable) F-V and V-F Converter V-I and I-V Converter Zener Voltage Regulator Transistor Series Voltage Regulator Transistor Shunt Voltage Regulator DC Ammeter DC Ammeter (0-2mA) Instrumentation Amplifier Scientech Technologies Pvt. Ltd. 4
AB41 AB42 AB43 AB44 AB45 AB49 AB51 AB52 AB54 AB56 AB57 AB58 AB59 AB64 AB66 AB67 AB68 AB80 AB82 AB83 AB84 AB85 AB88 AB89 AB90 AB91 AB92 AB93 AB96 AB97 AB101 AB102 AB106 Differential Amplifier (Transistorized) Operational Amplifier (Inverting / Non-inverting / Differentiator) Operational Amplifier (Adder/Scalar) Operational Amplifier (Integrator/ Differentiator) Schmitt Trigger and Comparator K Derived Filter Active filters (Low Pass and High Pass) Active Band Pass Filter Tschebyscheff Filter Fiber Optic Analog Link Owen s Bridge Anderson s Bridge Maxwell s Inductance Bridge RC Coupled Amplifier with Feedback Wien Bridge Oscillators Colpitt Oscillator Hartley Oscillator RLC Series and RLC Parallel Resonance Thevenin s and Maximum Power Transfer Theorem Reciprocity and Superposition Theorem Tellegen s Theorem Norton s theorem Diode Clipper Diode Clampers Two port network parameter Optical Transducer (Photovoltaic cell) Optical Transducer (Photoconductive cell/ldr) Optical Transducer (Phototransistor) Temperature Transducer (RTD & IC335) Temperature Transducer (Thermocouple) DSB Modulator and Demodulator SSB Modulator and Demodulator FM Modulator and Demodulator and many more Scientech Technologies Pvt. Ltd. 5
Theory Fundamentally an amplifier is a device that takes in a low power signal and outputs a magnified (power boosted) version of the input signal. In an analog amplifier using FET,the signal is applied to the gate terminal of the FET and this causes a proportional output drive current to flow out of the output terminal. The output drive current is obtained from the power supply. The voltage signal at the output is thus a larger version of the input, but has been changed in sign (inverted) by the amplification. The field effect transistor (FET) is a three terminal device used for the purpose of amplification, chopping, commutating, switching and multiplexing. The primary difference between the bipolar junction transistor (BJT) and field effect transistor (FET) is that the BJT is a current controlled device while FET is voltage controlled device.that is in BJT output current is a function of input current while in FET,output current is a function of input voltage.also Bjt is a bipolar device (i.e. conduction level is a function of two charge carriers, holes and electrons) and FET is an unipolar device(i.e. conduction level is a function of only single charge carriers, either holes or electrons). The term field effct in FET resembles it s working with that of a permanent magnet.the magnetic field of permanent magnet has ability to draw metal fillings towards it self through magnetic flux lines without actual contact between them.in FET,electric field is established by charges present that will control the conduction path of output circuit without the need for direct contact between controlling (input voltage) and controlled (output current)quantity. Before knowing how FET amplifier in our experiment works,we must know some detail about it s construction. Like BJT, FET is also of two types 1. n-channel FET 2. p-chaneel FET The terms n-channel and p- channel refer to the material with which the drain and source are connected. A simplified n-channel JFET construction is shown below in figure 1. Shown in figure1 that the drain and source connections are made to the n- channel and the gate is connected to the p material. Scientech Technologies Pvt. Ltd. 6
Drain P-type Semiconductors N-type Channel Gate P N P Source JFET with n type material Figure 1 An n-type channel is formed between two p-type layers which are connected to the gate. Majority carrier electrons flow from the source and exit the drain, forming the drain current. The pn junction is reverse biased during normal operation, and increasing the reverse bias widens the depletion layers which extend into the n channel only (since the doping of the p regions is much larger than that of the n channel). As the depletion layers widen, the channel narrows, restricting current flow. Figure 1 illustrates a JFET with the two gate areas electrically connected together, as are the source and the drain. Application of forward bias voltage at drain-source terminal and zero bias or reverse bias voltage on the gate-source terminals results in the formation of depletion regions at the PN junction as shown in figure 2. Increasing the voltage causes the depletion regions to reach further into the channel and effectively reduces its cross-sectional area. Depletion region formed increases as the reverse gate source voltage is increased. This depletion region, being devoid of majority carriers, reduces the channel drain-source current. Wide Depletion Region with larger VGS Voltage Drain Current Flow Gate I G = 0 P N P + VDS VGS Source N-type JFET with depletion layer Figure 2 Scientech Technologies Pvt. Ltd. 7
As a result, the drain-source current is controlled by the gate voltage. A typical JFET characteristic curve is given below in figure 3; which indicates the effect of the gatesource voltage on the drain-source current, I DS. As the gate-source voltage is increased, the drain-source current increases. When V GS = 0 and V DS is increased then at certain value of V DS drain current becomes almost constant as shown in figure 3.This value of V DS is called as pinch off voltage V P and constant value of current as saturation current I DSS (drain to source current with gate short with source). As V GS is decreased the saturation current also decreases, at V GS = -V P gate to source voltage becomes sufficiently negative to establish a current level of 0 ma, and turns off. Transfer & Drain Characteristics for n type JFET Figure 3 The relationship between I D (output current) and V GS (input voltage) is nonlinear and defined by Shockley s equation: I D = I DSS (1-V GS /V P ) 2 (1) Where I DSS and V P are constants and V GS is control variables. The curve plotted between I D and V GS is known as transfer curve shown in figure 3. It is same as transconductance curve of BJT. It shows that when V GS = 0, I D = I DSS and when I D = 0, V GS = V P. The transfer characteristics defined by Shockley s equation are unaffected by the network in which the device is employed. Scientech Technologies Pvt. Ltd. 8
Ohmic and Cutoff region : As shown in figure 3 the region of operation of JFET before pinch off value of drain to source voltage V DS is called ohmic region as drain current increases with the increase in drain to source voltage V DS. This region is responsible for broadening of lower half of input sine wave signal as resistance becomes almost constant in ohmic region, amplification of lower half of signal stops but upper half of signal still amplifies before reaching to cut off region. The cutoff region is defined as the region at which gate to source voltage V GS becomes equal to pinch off voltage i.e. -V GS = V P. At this value of gate to source voltage, drain current almost drops to zero and drain to source voltage reaches near to input bias voltage i.e. Q point of JFET shifts and hence swing of input sinusoidal signal clips off from top. Scientech Technologies Pvt. Ltd. 9
Experiment 1 Objective : Study of the Theoretical Analysis of FET Amplifier Calculations and Analysis : DC Analysis of Voltage divider bias configuration : In our experiment we have used voltage divider bias configuration due to its stability. How theoretical analysis of this configuration is done is given in following section. In experiment 3 we will compare these results with the results obtained practically. +12V ID C G 0.01uF R1 20M VG G RD 1K FET J211 D Cc 0.47uF VDSQ Input Signal R2 2M7 VGSQ Rs 200E S e RL 10K CS 22uF Output Signal Circuit diagram of FET amplifier Figure 4 In circuit diagram of FET amplifier as shown in figure 4 we have used FET J211. It s specification as per data sheet are as follows. V GS (off) = - V P = 2.45 volts I DSS = 8.6 ma Y OS (common source output conductance) = 200 us or r d =1/ Y OS = 5K (required in gain calculation). Now with these constant values we start our DC analysis as We have R 1 = 20M, R 2 = 2.7M, R D = 1K, R S = 0.2K, R L = 10K C G =0.01MFD, C S = 22MFD, C C = 0.47MFD V G = (V DD X R 2 )/(R 1 +R 2 ) = (12V X 2.7M)/ (20M+2.7M) = 1.43V Scientech Technologies Pvt. Ltd. 10
Now we have I DQ = I DSS (1-V GS /V P ) 2 (1) Also we have V GSQ = V GQ - V SQ V GSQ = 1.43 - I S R S But in JFET I S = I D because I G = 0 So V GSQ = 1.43 I DQ X 0.2K (2) Putting in Equation1 we get I DQ = 8.6mA {1-(1.43 I D X 0.2K)/(- 2.45V)} 2 Solving for I D we get quadratic equation as 0.056 I 2 DQ - 3.20 I DQ + 21.5 = 0 I 2 DQ 57.14 I DQ + 383.93 = 0 Solution of above equation yields I DQ1 = 7.78 ma I DQ2 = 49.36 ma (impossible because I DQ2 can not be greater than I DSS ) Value of V GSQ (from equation 2) : V GSQ = - 0.126Volts (for I DQ = 7.94 ma) We also have V D = 12 I DQ X R D V D = 12 7.78 ma X 1K V D = 4.22V And V S = I DQ X R S V S = 1.556 V Hence V DSQ = V D V s V DSQ = 4.22 1.556 V V DSQ = 2.66 V Note that this value of V DSQ is not for V GSQ = 0 but for V GSQ = 0.158 volts. Scientech Technologies Pvt. Ltd. 11
Gain calculation : We have g mo (transconductance at V GS = 0) = 2 X I DSS / V P = 2 X 8.6 ma / 2.45 V = 7.02mS Also gm(at other value of V GSQ ) = gm0 (1- V GSQ /V P ) g m = 7.02 (1 (- 0.126 V/-2.45) = 7.02 X (1-0.051) g m = 6.66 ms Hence Gain (A V ) = g m X (R D R L r D ) = 6.66 X (1K 10K 5K) Gain (A V ) = 5.1 (approximately) Lower cutoff frequency calculations : Cutoff frequency with input coupling capacitor CG f LG = 1/{2 X X (R sig + R i ) X C G } (3) Where Rsig = 50 ohm (output resistance of function generator ) Ri = R 1 X R 2 /( R 1 + R 2 ) Ri = 20M X 2.7M/20M + 2.7M Ri = 2.37M So Rsig + Ri = Ri (Rsig neglected) Also C G = 0.01 MFD So we have from Eq (3) f LG = 6 Hz. Again Cutoff frequency with output coupling capacitor C C. f LC = 1/{2 X X (R O + R L ) X C C } (4) Where R O = R D r d R O = 1K 5K R O = 0.83 K Scientech Technologies Pvt. Ltd. 12
Also C G = 0.47 MFD So we have from Eq (4) f LC = 31.28 Hz Cutoff frequency with bypass capacitor C s. f LS = 1/{2 X X (R eq ) X C C (5) Where R eq = R S / [1+ {R D (1+ g m X r d )}/ (r d + R D R L ) ] R eq = 0.10K Also C S = 22 MFD So we have from Eq (4) f LC = 72.37 Hz Since f LC is the largest of three cutoff frequencies, it defines the low cutoff frequency for the network shown in figure 4 Note : Above parameters are calculated by considering specific value of various parameters of JFET. The value of these parameters is different in each JFET and hence the difference in error of all parameters may vary accordingly. Higher cutoff frequency can not be calculated because of variation in wiring capacitances due to transportation and other reasons. Hence it is calculated practically. Result : The theoretical value of various parameters has been determined which are as follows. 1. V DSQ = 2.66 V 2. V GSQ = 0.126 volts 3. I DQ1 = 7.78 ma 4. A V = 5.1 (approximately) 5. g m = 6.66 ms 6. f LC (lower cutoff frequency ) = 72.37 Hz Scientech Technologies Pvt. Ltd. 13
Experiment 2 Objective : To study and Measure the Frequency Response of FET Amplifier Equipments Needed : 1. Analog board, AB26 2. DC power supply +12V from external source or ST2612 Analog Lab. 3. Function Generator. 4. Oscilloscope. 5. 2mm patch cords. Circuit diagram : Circuit used to study the frequency response of FET amplifier is shown in figure 5 below : Figure 5 Scientech Technologies Pvt. Ltd. 14
Procedure : 1. Connect +12V variable DC power supply at the indicated position from external source or ST2612 Analog Lab. 2. Switch On the power supply. 3. Connect maximum 200 mv p-p, 50 Hz sine wave signal at the signal input of AB26 board and observe the same on oscilloscope CH I. 4. Connect socket a with socket b. 5. Observe the output waveform from output signal on oscilloscope CHI or CH II and note down output voltage (V OUT ) peak to peak. 6. Vary the frequency of input signal from function generator with a margin of 100 Hz initially. After 1 KHz vary the frequency with a margin of 1 KHz. 7. After 10 KHz, vary the frequency of input signal with a margin of 10 KHz. After 100 KHz vary the frequency with a margin of 100 KHz till output does not become equal to input. 8. Note down the output voltage corresponding the input frequency in the observation table given below. 9. Calculate the voltage gain of amplifier at each frequency by the formula given Voltage gain A V = V OUT (peak to peak) / V IN (peak to peak) 10. Find out the value of gain in db by formula Gain (in db) =20 log (A V ) 11. Plot the graph between gain (in db) and frequency (in Hz) on log paper and calculate the bandwidth given by equation : Bandwidth = (f H f L ) Where f L = lower 3dB cutoff frequency f H = higher 3dB cutoff frequency 12. Observe the output waveform from output signal on oscilloscope CH I or CH II for the different values of input voltages less than 200 mv p-p. Scientech Technologies Pvt. Ltd. 15
Observation Table : For input voltage V IN : S. No. Input signal frequency (KHz) Output voltage (V OUT ) Gain (A V= V OUT /V IN ) Gain (db) 20 log (A V ) Result : f L (lower 3dB cutoff frequency) = f H (higher 3dB cutoff frequency) = Bandwidth (f H f L ) = Conclusion : The Bandwidth of FET Amplifier is found to be... Scientech Technologies Pvt. Ltd. 16
Experiment 3 Objective : To Measure Various Parameters of FET Amplifier and compare it theoretically Equipments Needed : 1. Analog board, AB26. 2. DC power supply +12V from external source or ST2612 Analog Lab. 3. Function Generator. 4. Oscilloscope. 5. 2mm patch cords. 6. Digital Multimeter. Circuit diagram : Circuit used to measure various parameters of FET amplifier and compare it theoretically. Figure 6 Scientech Technologies Pvt. Ltd. 17
Procedure : 1. Connect +12V variable DC power supply at the indicated position from external source or ST2612 Analog Lab. 2. Switch On the power supply. 3. Connect maximum 200 mv p-p, 10 KHz sine wave signal at the signal input of AB26 board and observe the same on oscilloscope CH I. 4. Connect socket a with socket b. 5. Observe the output waveform from output signal on oscilloscope CHI or CH II and note down output voltage (V OUT ) peak to peak 6. Note down the value of gain (A V= V OUT /V IN ) in the observation table given below. 7. Pull out patch cord from socket a and b' and insert red probe of multimeter in socket a and black probe in socket b and position its dial at DC current measurement. 8. Note down the value of drain current I DQ in the observation table given below. 9. Again connect socket a with socket b. Now keep red probe of multimeter at test point d and black probe at test point e and position multimeter dial at DC voltage measurement 10. Note down the value of gate source voltage V GSQ in the observation table given below. Mark that the value of V GS is negative. 11. Again keep red probe of multimeter at test point c and black probe at test point e and position multimeter dial at DC voltage measurement 12. Note down the value of drain source voltage V DSQ in the observation table given below. 13. Compare it with the value calculated theoretically. 14. Calculate the error value given by the formula : Error in value = Theoretical value Practical value Scientech Technologies Pvt. Ltd. 18
Observation Table : S. No. Parameter Theoretical Value Practical Value Error in value (Th Val. Pr.Val) 1 I DQ 2 V GSQ 3 V DSQ 4 A V Result : Error in value of I DQ Error in value of V GSQ Error in value of V DSQ Error in value of A Conclusion : = = =. =. The various parameters of FET amplifier have been calculated theoretically and practically. Scientech Technologies Pvt. Ltd. 19
Experiment 4 Objective : To observe the output of FET amplifier in ohmic and cutoff region Equipments Needed : 1. Analog board, AB26 2. DC power supply +12V from external source or ST2612 Analog Lab. 3. Function Generator. 4. Oscilloscope. 5. 2mm patch cords. Circuit diagram : Circuit used to observe the output of FET amplifier in saturation and cutoff region is shown below : Figure 7 Scientech Technologies Pvt. Ltd. 20
Procedure : 1. Connect +12V variable DC power supply at the indicated position from external source or ST2612 Analog Lab. 2. Switch On the power supply. 3. Connect 200 mv p-p, 10KHz sine wave signal at the signal input of AB26 board and observe the same on oscilloscope CH I. 4. Connect socket a with socket b. 5. Observe the output waveform from output signal on oscilloscope CHI or CH II and note down output voltage (V OUT ) peak to peak. 6. Vary the amplitude of input signal from function generator. 7. Observe the output on CRO. 8. Note down the value of input voltage at which the lower half of signal starts distorting i.e. it starts widening. The signal is in ohmic region. 9. Also note down the value of input voltage at which the upper half of signal starts distorting i.e. it starts flattening. The signal is in cutoff region. Observation Table : S. No. Region 1 Cutoff 2 Ohmic Input Signal Voltage Result : The value of input signal voltage in Cutoff region =.. Ohmic region =. Conclusion : The behavior of output signal of FET amplifier in ohmic and cutoff region has been observed. On CRO. Scientech Technologies Pvt. Ltd. 21
Data Sheet Scientech Technologies Pvt. Ltd. 22
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Warranty 1. We guarantee the product against all manufacturing defects for 24 months from the date of sale by us or through our dealers. Consumables like dry cell etc. are not covered under warranty. 2. The guarantee will become void, if a) The product is not operated as per the instruction given in the operating manual. b) The agreed payment terms and other conditions of sale are not followed. c) The customer resells the instrument to another party. d) Any attempt is made to service and modify the instrument. 3. The non-working of the product is to be communicated to us immediately giving full details of the complaints and defects noticed specifically mentioning the type, serial number of the product and date of purchase etc. 4. The repair work will be carried out, provided the product is dispatched securely packed and insured. The transportation charges shall be borne by the customer. For any Technical Problem Please Contact us at service@scientech.bz List of Accessories 1. 2 mm Patch Cords (Red)...3 Nos. 2. 2 mm Patch Cord (Blue)...1 No. 3. 2 mm Patch Cord (Black)...3 Nos. 4. e-manual...1 No. Updated 18-02-2009 Scientech Technologies Pvt. Ltd. 24
Note : Teachers are requested to take out the result pages from manual for verifying result obtained by students. Input Experiment 2 Frequency Response of FET Amplifier. Keep input signal voltage maximum at=200mvp-p and input signal frequency = 50Hz With variation in frequency output increases initially then Experiment 3 Calculate various parameters of FET Amplifier Result Output becomes constant (with in some limit) and then it decreases. Output at certain frequency are : At 100Hz = 750mvolts (sinusoidal) Vary the Frequency with margin of 1KHz At 5KHz = 950mvolts (sinusoidal) At 50KHz = 950mvolts (sinusoidal) Keep input signal voltage maximum at = 200 Vp-p At 1MHz = 750mvolts (sinusoidal) and input signal frequency = 10KHz V DSQ = 2.70+ 0.40 V V GSQ = 0.125 +0.05 volts I DQ1 = 7.75 + 0.30 m Experiment 4 Observe the output of FET amplifier in ohmic and cutoff region. Keep input signal voltage maximum at = 200m Vp-p and input signal frequency = 10 KHz Increase the amplitude of input signal. With variation in amplitude output should distortes in upper and lower region. In upper part it starts flattening and in lower part it starts broadening Scientech Technologies Pvt. Ltd. 25