TVS (Transient Voltage Suppressor) Bi-directional, 5.5 V,.23 pf, 2, RoHS and Halogen Free compliant Features ESD / transient protection according to: - IEC6-4-2 (ESD): ±2 kv (air / contact discharge) - IEC6-4-4 (EFT): ±2.5 kv / ±6 A (5/5 ns) - IEC6-4-5 (Surge): ±3.5 A (8/2 μs) Bi-directional working voltage up to: V RWM = ±5.5 V Line capacitance: C L =.23 pf (typical) at f = MHz Clamping voltage: V CL = 3 V (typical) at I TLP = 6 A with R DYN =.66 Ω (typical) Very low reverse current: I R < na (max.) Small form factor SMD size 2 and low profile (.58 mm x.28 mm x.5 mm) Bidirectional and symmetric I/V characteristics for optimized design and assembly Pb-free (RoHS compliant) and halogen free package Guidelines for optimized PCB design and assembly process are available in [2]. Product validation Qualified for industrial apllications according to the relevant tests of JEDEC47/2/22 Application examples USB 3., Firewire, DVI, HDMI, S-ATA, DisplayPort, Thunderbolt Mobile HDMI Link, MDDI, MIPI, SWP / NFC Device information Pin Pin Pin 2 = Pin 2 a) Pin configuration b) Schematic diagram Figure Table Pin configuration and schematic diagram Part information Type Package Configuration Marking code ESD3-B-W2 WLL-2-3 line, bi-directional T ) The device does not have any marking on the device top. The marking code is between the pads. Datasheet Please read the Important Notice and Warnings at the end of this document Revision. www.infineon.com
Table of contents Table of contents Features............................................................................... Product validation...................................................................... Application examples................................................................... Device information..................................................................... Table of contents....................................................................... 2 Maximum ratings....................................................................... 3 2 Electrical characteristics................................................................ 4 3 Typical characteristic diagrams......................................................... 6 4 Package information.................................................................. 2 4. WLL-2-3 Package....................................................................... 2 5 References............................................................................ 3 Revision history....................................................................... 3 Trademarks........................................................................... 4 Datasheet 2 Revision.
Maximum ratings Maximum ratings Note: T A = 25 C, unless otherwise specified ) Table 2 Maximum ratings Parameter Symbol Values Unit Reverse working voltage V RWM ±5.5 V ESD discharge 2) V ESD (contact) ±2 kv V ESD (air) ±2 Peak pulse power 3) P PK 26 W Peak pulse current 3) I PP ±3.5 A Operating temperature range T OP -55 to 25 C Storage temperature T stg -65 to 5 C Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings. Exceeding only one of these values may cause irreversible damage to the component. Device is electrically symmetrical 2 V ESD according to IEC6-4-2 (R = 33 Ω, C = 5 pf discharge network) 3 Stress pulse: 8/2μs current waveform according to IEC6-4-5 Datasheet 3 Revision.
Electrical characteristics 2 Electrical characteristics I PP ITLP IF VF IF VR IR Forward voltage Forward current Reverse voltage Reverse current DV DI RDYN = DV DI Ih VTLP Vt VRWM VCL Vh IT IR VR RDYN = DV DI DI DV IR Vh IT Ih -IPP -ITLP IR VCL VTLP RDYN V RWM Vt Vh VCL VTLP IR IPP ITLP Ih IT VRWM Vt VF Dynamic resistance Reverse working voltage max. Trigger voltage Holding voltage Clamping voltage TLP voltage Reverse leakage current Peak pulse current TLP current Holding current Test current Thyristor_ Characteristic_ Curve_Bi-Directional.vsd Figure 2 Definitions of electrical characteristics Datasheet 4 Revision.
Electrical characteristics Table 3 DC characteristics (T A = 25 C, unless otherwise specified) ) Parameter Symbol Values Unit Note or test condition Min. Typ. Max. Breakdown voltage V br 6 8.5 V I R = ma Holding voltage V h.9 V I R = I h Holding reverse current I h 25 ma V R = V h Reverse current I R na V R = 5.5 V Table 4 AC characteristics (T A = 25 C, unless otherwise specified) Parameter Symbol Values Unit Note or test condition Min. Typ. Max. Line capacitance C L.23.35 pf V R = V, f = MHz.2 V R = V, f = 2.5 GHz Table 5 ESD and Surge characteristics (T A = 25 C, unless otherwise specified) ) Parameter Symbol Values Unit Note or test condition Min. Typ. Max. Clamping voltage 2) V CL 8.5 V I TLP = 8 A, t p = ns 3 I TLP = 6 A, t p = ns Clamping voltage 3) 3 I PP = A, t p = 8/2 µs 5.5 I PP = 3 A, t p = 8/2 µs Dynamic resistance 2) R DYN.66 Ω t p = ns Device is electrically symmetrical 2 Please refer to Application Note AN2 []. TLP parameters: Z = 5 Ω, t p = ns, t r =.6 ns. 3 Stress pulse: 8/2μs current waveform according to IEC6-4-5 Datasheet 5 Revision.
Typical characteristic diagrams 3 Typical characteristic diagrams Note: T A = 25 C, unless otherwise specified -6-7 -8 I R [A] -9 - - -2-5 -4-3 -2-2 3 4 5 V R [V] Figure 3 Reverse leakage current: I R = f(v R ).5.45.4.35 C L [pf].3.25.2.5..5-5 -4-3 -2-2 3 4 5 V R [V] Figure 4 Line capacitance: C L = f(v R ), f = MHz Datasheet 6 Revision.
Typical characteristic diagrams V CL [V] 2 Scope: 6 GHz, 2 GS/s 9 8 7 6 V CL-max-peak = 8 V 5 4 V CL-3ns-peak = 4 V 3 2 - -2-5 5 5 2 25 3 35 4 45 t p [ns] Figure 5 Clamping voltage (ESD): V CL = f(t), 8 kv positive pulse according to IEC6-4-2 V CL [V] 2 Scope: 6 GHz, 2 GS/s - -2-3 -4-5 -6-7 V CL-max-peak = -8 V -8-9 V CL-3ns-peak = -4 V - - -2-5 5 5 2 25 3 35 4 45 t p [ns] Figure 6 Clamping voltage (ESD): V CL = f(t), 8 kv negative pulse according to IEC6-4-2 Datasheet 7 Revision.
Typical characteristic diagrams 6 4 Scope: 6 GHz, 2 GS/s V CL [V] 2 8 6 4 2 V CL-max-peak = 47 V V CL-3ns-peak = 2 V -2-5 5 5 2 25 3 35 4 45 t p [ns] Figure 7 Clamping voltage (ESD): V CL = f(t), 5 kv positive pulse according to IEC6-4-2 2 Scope: 6 GHz, 2 GS/s V CL [V] -2-4 -6-8 - -2-4 V CL-max-peak = -48 V V CL-3ns-peak = -22 V -6-5 5 5 2 25 3 35 4 45 t p [ns] Figure 8 Clamping voltage (ESD): V CL = f(t), 5 kv negative pulse according to IEC6-4-2 Datasheet 8 Revision.
Typical characteristic diagrams 4 ESD3-B-W2 R DYN 2 3 5 R DYN =.66 Ω 2 5 I TLP [A] Equivalent V IEC [kv] - -5-2 - R DYN =.66 Ω -3-5 -4-2 -3-25 -2-5 - -5 5 5 2 25 3 V TLP [V] Figure 9 Clamping voltage (TLP): I TLP = f(v TLP ) [] Datasheet 9 Revision.
Typical characteristic diagrams 4 3.5 3 2.5 2.5.5 I PP [A] -.5 - -.5-2 -2.5-3 -3.5-4 - -8-6 -4-2 2 4 6 8 V CL [V] Figure Clamping voltage (Surge): I PP = f(v CL ) according to IEC6-4-5 [] Datasheet Revision.
Typical characteristic diagrams Insertion Loss ( S 2 ) [db] 2 3 4 ESD3-B-W2 5.. Frequency [GHz] Figure Insertion loss vs. frequency in a 5 Ω system Datasheet Revision.
Package information 4 Package information 4. WLL-2-3 Package Top view Bottom view.5±..28±.3 2.36 (.9).58 ±.3.24 ±.2.7±.2 SG-WLL-2-3-PO V Figure 2 WLL-2-3 package outline (dimension in mm) Soldering Type: Reflow Soldering.3.37.22 Stencil thickness < 8 µm Stencil thickness 8 µm Copper Solder mask Stencil apertures SG-WLL-2-3-FP V Figure 3 WLL-2-3 footprint (dimension in mm), recommendation for Printed Circuit Board Assembly see [2].23.68 8 2.35.2 Deliveries can be in Embossed Tape with or without vacuum hole (no selection possible). Specification allows identical processing (pick & place) by users. SG-WLL-2-3-TP V Figure 4 WLL-2-3 packing (dimension in mm) Marking on pad-side Type code Type code 2 2 Figure 5 WLL-2-3 marking example (see Table ) Datasheet 2 Revision.
References 5 References [] Infineon AG - Application Note AN2: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology [2] Infineon AG - Recommendation for Printed Circuit Board Assembly of Infineon WLL Packages http://www.infineon.com/packageinformation_wll [3] Infineon AG - Application Note AN392: TVS Diodes in ChipScalePackage reduce size and save cost Revision history Revision history: Rev..9, 26-4-2 Page or Item Revision., 27-3-22 Tables 2, 3, 4 Subjects (major changes since previous revision) Values updated Missing figures added Datasheet 3 Revision.
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