N- CHANNEL PUSH - PULL PAIR 165V 400W 100MHz

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Transcription:

Common ource Push-Pull Pair RF POWER MOFET N- CHANNEL PUH - PULL PAIR 165V 4W 1MHz G G D D The is a matched pair of RF power transistors in a common source confi guration. It is designed for high voltage push-pull or parallel operation in IM and MRI power amplifi ers up to 1 MHz. pecified 15 Volt, 65 MHz Characteristics: Output Power = 4 Watts Gain = 15dB (Class AB) Efficiency = 5% min High Performance Push-Pull RF Package. High Voltage Breakdown and Large OA for uperior Ruggedness. Low Thermal Resistance. RoH Compliant MAXIMUM RATING All Ratings: T C = 25 C unless otherwise specifi ed. ymbol Parameter Ratings Unit Drain-ource Voltage 5 V DGO Drain-Gate Voltage 5 V Continuous Drain Current @ T C = 25 C (each device) 15 A V G Gate-ource Voltage ±3 V P D Total Power Dissipation @ T C = 25 C 75 W, T TG Operating and torage Junction Temperature Range -55 to 175 T L Lead Temperature:.63 from Case for 1 ec. 3 C tatic Electrical Characteristics ymbol Parameter Min Typ Max Unit B Drain-ource Breakdown Voltage (V G = V, = 25 μa) 5 (ON) On tate Drain Voltage 1 ((ON) = 7.5A, V G = 1V) 2.9 4 V Zero Gate Voltage Drain Current ( =, V G = V) 25 Zero Gate Voltage Drain Current ( = 5, V G =, T C = 125 C) 25 μa I G Gate-ource Leakage Current (V G = ±3V, = V) ±1 na g fs Forward Transconductance ( = 15V, = 7.5A) 3.5 5.6 8 mhos g fs1 /g fa2 Forward Transconductance Match Ratio ( = 15V, = 5A).9 1.1 V G(TH) Gate Threshold Voltage ( = V G, = 5mA) 3 5 V G(TH) Gate Threshold Voltage Match ( = V G, = 5mA).2 Volts Thermal Characteristics ymbol Parameter Min Typ Max Unit R θjc Junction to Case.18.2 R θjh Junction to ink (High Effi ciency Thermal Joint Compound and Planar Heat ink urface.).3.32 C/W CAUTION: These Devices are ensitive to Electrostatic Discharge. Proper Handling Procedures hould Be Followed. Microsemi Website - http://www.microsemi.com

DYNAMIC CHARACTERITIC (per section) ymbol Parameter Test Conditions Min Typ Max Unit C I Input Capacitance V G = V 12 14 C oss Output Capacitance = 15V 15 18 pf C rss Reverse Transfer Capacitance f = 1MHz 6 75 t d(on) Turn-on Delay Time V G = 15V 7 t r Rise Time V DD = 25V 6 t d(off) Turn-off Delay Time = [Cont.] @ 25 C 2 t f Fall Time R G = 1.6 Ω 4. 7 n Functional Characteristics ymbol Characteristic Test Conditions Min Typ Max Unit G P Common ource Amplifi er Power Gain f = 65MHz 14 16 db η Drain Effi ciency I dq = ma V DD = 15V 5 55 % Ψ Electrical Ruggedness VWR 1:1 P OUT = 4W No Degradation in Output Power 1. Pulse Test: Pulse width < 38 μ, Duty Cycle < 2%. Microsemi reserves the right to change, without notice, the specifications and information contained herein., DRAIN CURRENT (AMPERE) 25 2 15 1 5 V G =15 & 1V 9V 8V 7V 6.5V 6V 5.5V 5V 4.5V 5 1 15 2 25 3, DRAIN-TO-OURCE VOLTAGE (VOLT) Figure 1, Typical Output Characteristics CAPACITANCE (pf) 5 1 5 1 5 C iss C oss C rss 1.1.5 1 5 1 5 15, DRAIN-TO-OURCE VOLTAGE (VOLT) Figure 2, Typical Capacitance vs. Drain-to-ource Voltage, DRAIN CURRENT (AMPERE) 16 12 8 4 = -55 C > (ON) x R D (ON)MAX. 25μEC. PULE TET @ <.5 % DUTY CYCLE = +125 C = -55 C = +25 C 2 4 6 8 1 V G, GATE-TO-OURCE VOLTAGE (VOLT) Figure 3, Typical Transfer Characteristics, DRAIN CURRENT (AMPERE) 56. 1. 1. OPERATION HERE LIMITED BY R (ON) D T C =+25 C =+15 C INGLE PULE.1 1 5 1 5 1 5, DRAIN-TO-OURCE VOLTAGE (VOLT) Figure 4, Typical Maximum afe Operating Area

.25 Z θjc, THERMAL IMPEDANCE ( C/W).2.15.1.5 D =.9.7.5.3.1.5 INGLE PULE Duty Factor D = t1 /t 2 Peak = P DM x Z θjc + T C 1-5 1-4 1-3 1-2 -1 1 1. RECTANGULAR PULE DURATION (ECOND) Figure 5a, Maximum Effective Transient Thermal Impedance, Junction-To-Case vs Pulse Duration Note: P DM Figure 5b, TRANIENT THERMAL IMPEDANCE MODEL t 1 t 2 ( C ) T C ( C ) Dissipated Powe r (Watts ).915.18.111F.133F Z EXT Z EXT are the external ther mal impedances : Case to sink, sink to ambient, et c. et to ze ro when modeling onl y the case to junction. Freq. (MHz) Z in (Ω) Z OUT (Ω) 4 6 8 1.5 - j 1 1.9 - j 1.3 2.2 - j.82 24 - j 37 13 - j 29 7.9 - j 24 Z IN - Gate shunted with 1Ω I dq = Z OL - Conjugate of optimum load for 4 Watts output at V dd =125V

65MHz Test Circuit Thermal Considerations and Package Mounting:.125R 4 pls 1..32 +/-.1.8.125dia 4 pls.32.57 The rated power dissipation is only available when the package mounting surface is at 25 C and the junction temperature is 175 C. The thermal resistance between junctions and case mounting surface is.23 C/W. When installed, an additional thermal impedance of.7 C/W between the package base and the mounting surface is typical. Insure that the mounting surface is smooth and flat. Thermal joint compound must be used to reduce the effects of small surface irregularities. Use the minimum amount necessary to coat the surface. The heatsink should incorporate a copper heat spreader to obtain best results. 1.25.32 The package design clamps the ceramic base to the heatsink. A clamped joint maintains the required mounting pressure while allowing for thermal expansion of both the base and the heat sink. Four 4-4 (M3) screws provide the required mounting force. T = 3-4 in-lb (.34-.45 N-m)..15.175.175 1.5.15.3.2.5.4 HAZARDOU MATERIAL WARNING The white ceramic portion of the device between leads and mounting surface is beryllium oxide, BeO. Beryllium oxide dust is toxic when inhaled. Care must be taken during handling and mounting to avoid damage to this area. These devices must never be thrown away with general industrial or domestic waste. Microsemi s products are covered by one or more of U.. patents 4,895,81 5,45,93 5,89,434 5,182,234 5,19,522 5,262,336 6,53,786 5,256,583 4,748,13 5,283,22 5,231,474 5,434,95 5,528,58 6,939,743, 7,352,45 5,283,21 5,81,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. U and Foreign patents pending. All Rights Reserved.

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