Digital Communication Laboratories bako@ieee.org
DigiCom Labs There are 5 labs related to the digital communication. Study of the parameters of metal cables including: characteristic impendance, attenuation and basic data rate 2. Study of a digital transmission system with error detection and correction 3. Study of line codes with base-band (part ) and analogue modulation (part 2) 4. Study of a QPSK modulation and communication system based on SIMULINK model 5. Study of CRC code and communication system based on SIMULINK model 2
L3: transmission systems This lab is based on the usage of MODICOM boards: 3/ (transmitter) - digital - 3/2 (receiver) 5/ (modulator) analogue - 5/2 (demodulator) digital analogue analogue digital 3
L3: line codes (baseband) Part I: first we are going to study line codes (baseband). We need 3/ and 5/ boards. Sync code must be OFF. Mode must be ON. 3/ board operates in FAST mode without errors. 4
L3: settings for 3/ Sync code must be OFF. errors OFF Set value on 5
L3: line codes (baseband) NRZ clock NRZ-M RZ data BI BI-M BI-phase - Manchester 6
L3: line codes (baseband) BI BI-M Remark: rising edge of the BI-phase signal can either occur at the start, or at the centre, of each bit interval. Since 3/2 Clock Regeneration Circuit relies on rising edges, this circuit cannot be used for recovering timing information from BI-phase waveform! We need a special BI-phase clock recovery circuit located on the 5/2 board 7
L3: bi-phase clock recovery We need a special BI-phase clock recovery circuit located on the 5/2 board The output is a square wave with a rising edge that occurs one quarter (¼) of the bit interval. BI 8
L3: bipolar code Bipolar codes: In order to build bipolar codes we need addition block on 5/ board. We connect the NRZ-M output signal to the input of bipolar converter and the RZ output to the DISABLE entry for the same bipolar converter. bipolar code 9
L3: RZ transmission mono-phase clock recovery RZ code
L3: Manchester transmission BI-phase code (autosynchronization) needs bi-phase clock recovery
L3: Modulation with carrier Part II: In this part of lab we are going to study 3 modulation schemes to carry NRZ line codes.. ASK Amplitude Shift Keying 2. FSK Frequency Shift Keying 3. PSK Phase Shift Keying 2
L3: ASK Amplitude Shift Keying NRZ OFF ON OFF OFF OFF ON ON carrier 3
L3: ASK Amplitude Shift Keying Carrier generation circuit:.44 MHz, 96 khz (I), 96 khz (Q) 4
L3: ASK demodulation (5/2) 3/2 in MODE 3 to 3/2 from 5/ demodulation low-pass filtering signal squaring 5
L3: ASK transmission system MODE 3 6
L3: FSK modulation NRZ F F F FSK waveform F F F F F F 7
L3: FSK demodulation At the Receiver, the frequency shift-keyed signal is decoded by means of a phase-locked loop (PLL). The detector follows the changes in frequency and generates an output voltage proportional to the signal frequency. The phase-locked loop's output also contains components at the two carrier frequencies; a low-pass filter is used to filter these components out. The filter output is squared up» by a voltage comparator. 8
L3: FSK demodulation from 5/ to 3/2 PLL detector voltage comparator low-pass filter 9
L3: FSK transmission system MODE 3 2
L3: PSK modulation NRZ-M unipolar-bipolar converter The digital signal applied to the modulation input for PSK modulation is bipolar; it has equal positive and negative voltage levels. When the modulation input is positive the output signal is a sinewave in phase with the carrier input. When the modulation input is negative, the modulator's output (input sinewave * -) is a sinewave 8 out of phase with the input sinewave. 2
L3: PSK modulation PSK waveform 22
L3: PSK demodulation The incoming PSK signal first go to the input of a signal squarer, which multiplies the signal by itself (the signal squarer is a balanced modulator whose inputs are connected together). The output of the signal squarer is a signal at twice of the original frequency, with phases changes of and 36 (i.e; no phase change at all) The next stage of the PSK detector is a phase-locked loop that locks on to the squared signal and produces a clean square wave at the same frequency. 23
L3: PSK demodulation The next stage is to divide the digital signal frequency by a factor of 2 to get back the original PSK signal frequency. The following stage is the Phase Adjust circuit which allows the digital signal phase to be adjusted. The output of the Phase Adjust circuit is used to control an analog switch; when the Phase Adjust signal is high the switch is closed (), when Phase Adjust signal is low the switch is open and the detector's output drops to volts. Then the detector output goes through low-pass filter and voltage comparator that generates a clean square wave. Finally, the decoded digital signal (NRZ-M) is transformed into NRZ signal via a differential bit decoder. 24
L3: PSK modulation NRZ-M NRZ Clock synchronization from 3/2 (PLL) 25
L3: PSK transmission system clock recovery 26