Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects By Mieke Van Bavel, science editor, imec, Belgium; Joris Van Campenhout, imec, Belgium; Wim Bogaerts, imec s associated lab at Ghent University, Belgium; Roel Baets, imec s associated lab at Ghent University, Belgium; and Philippe Absil, imec, Belgium In the last few years, silicon photonics has become an attractive enabler for low cost, high bandwidth optical interconnects. To accelerate the developments in this field, imec proposes its silicon photonics platform, established on 200mm SOI substrates. With this platform, R&D has now moved beyond passive waveguide circuits by allowing the co integration of active photonic elements such as ring modulators, photodetectors, and heaters. Introduction Future high performance central processing units and dynamic random access memories will be interfaced with input/outputs that require ever higher bandwidths, equaling or even surpassing 1TB/s by 2018. It will be challenging to achieve this with electrical interconnects while keeping the power consumption low and the system architecture flexible. A promising alternative is to build optical components and use light to transport data. Among the various technologies to implement such components, silicon photonics is particularly attractive as it holds the most potential for small footprint, low power consumption, low cost, and scalability. It allows fabricating optical components with state ofthe art semiconductor equipment, using the same processes and tools as for the fabrication of state ofthe art chips. Below, a silicon photonics platform is presented that allows the co integration of various passive components (fiber couplers, waveguides...) and active elements (modulators, detectors, heaters...) in one single integration flow. While the co integration is primarily driven by the need of a single transceiver chip solution for optical interconnect applications, having a robust platform provides some additional benefits: (1) the use of a components library; (2) benchmarking against reference; and (3) a faster learning cycle. This approach will hence accelerate the development of silicon photonics and optical interconnects.
The Silicon Photonics Technology Platform The technology platform, called imec Silicon Photonics Platform or isipp, uses 200mm commercially available SOI wafers as a substrate, with a silicon thickness of 220nm on top of a buried oxide thickness of 2µm. On top of the SOI, an additional oxide/polysilicon stack is deposited, which allows for more degrees of freedom in the design of optical components. The main process modules are: patterning of the full layer stack using 4 levels, junction formation, Ge on silicon, salicide and W contacts, Cu metallization, and Al metallization [1]. With this single integration flow, key passive as well as active optical components can be co integrated, as shown in figure 1. One challenge of highly confined waveguides is the high sensitivity of the compact silicon photonics devices to process variability, such as the silicon thickness. For example, a 1nm variation of the silicon thickness can result in a resonance wavelength shift of up to 2nm. We demonstrated that it is possible to significantly reduce the thickness variation from an initial 13.2nm across a 200mm wafer down to 2.5nm. Figure 1: Silicon photonic ICs A Toolbox Of Passive Components Imec has a strong expertise in developing passive silicon photonic waveguide components, such as highefficiency vertical grating couplers, echelle gratings, and microring resonators [2,3]. These passive components can be integrated during the 4 level patterning of the full layer stack. Here, the first two levels pattern the polysilicon/oxide stack. In these levels, low loss couplers and compact ring modulators can be defined, as well as polysilicon waveguides and polarization rotators. The next two levels pattern the remaining 220nm silicon. These levels can be used for waveguides, crossings, waveguide apertures
for arrayed waveguide gratings, and they allow for the design of compact ring devices and bends with radii <15µm [4]. The advanced passives baseline flow finishes with a planarization module. For example, with the 4 layer advanced passives process, grating couplers with a coupling efficiency of 70% are now possible. And grating couplers with low on chip reflection losses have been demonstrated. It is also possible to design multi stage ring resonator filters with a targeted filter characteristic. We also developed improved designs for arrayed waveguide gratings, including flat top filter characteristics, etc. Co Integrated With Active Components A full optical platform needs, apart from passive components, active components enabling the conversion from the optical to the electrical domain and vice versa. We have therefore combined our advanced passive capability with electro optic modulators, integrated Ge waveguide photodetectors, and integrated silicon heaters [4, 5]. High Speed Opto Electronic Ring Modulators A low power, compact, high speed silicon electro optic modulator is a key device for realizing scalable, high bandwidth optical interconnects. The ideal optical modulator provides a high extinction ratio (ER) of more than 7dB together with an insertion loss (IL) below 1dB, with an energy consumption (E/bit) of less than a few tens of femto Joules per bit at speeds of 10Gb/s and above, all obtained from an electrical drive signal that is directly generated by circuits implemented in advanced CMOS technologies (voltage swing of less than 1Vpp). A common approach to reach these specifications is to use silicon ring modulators with embedded p n junctions that operate in charge depletion mode. Such modulators are typically designed with the depletion area parallel to the waveguide (lateral diode design), or with junctions perpendicular to the waveguide (interdigitated diode design). We demonstrated such modulators in both configurations. Both modulators are capable of high extinction ratios at resonance: extinction ratios of 3dB and 7.5dB for an insertion loss of 3dB and driving voltage 1 Vpp were obtained with the lateral and the interdigitated diode design respectively. The interdigitated design clearly shows an improvement over the lateral diode design and can operate up to 10Gb/s. While the modulation efficiency was 22pm/V for the lateral design, this was increased to 30pm/V for the interdigitated design. We also demonstrated a compact, low loss, low voltage ring modulator based on an embedded metaloxide semiconductor (MOS) capacitor. MOS based modulators have the advantage of exhibiting higher resonance wavelength shifts than depletion based ring modulators, owing to the high modulation efficiency of the embedded MOS based phase shifter. We fabricated a MOS based ring modulator with more than three times stronger electro optic modulation efficiency as compared to a highly optimized
depletion based ring modulator. Optical modulation with 8dB extinction ratio and 3dB insertion loss is achieved by applying a 1.5Vpp drive voltage to the 10µm ring with embedded MOS capacitor. All modulators have been realized by introducing dopants in three locations in the process flow. A first set of implantations are done before the oxide/poly stack deposition. These are relatively low dose B and P implantations, providing the p type and n type regions for the modulators, and the channel doping for the MOS based modulator. A second set of implants are done after advanced passives patterning, providing higher dose B and P implants in Si. Finally, the polysilicon is implanted after the full planarization module. This creates the gate doping for the MOS based modulators. Figure 2: (a) Tilted top view SEM image of the MOS based ring modulator and (b) cross sectional SEM image of the MOS structure
Ge On Silicon Waveguide Photodetectors Low power silicon based optical transceivers require the co integration of high speed Ge waveguide photodetectors on the same substrate as the silicon modulators. We have developed a process module for co integrating Ge photodetectors with the MOS modulators described above. The module involves selective Ge epitaxial growth by reduced pressure chemical vapor deposition, followed by a post growth anneal and chemical mechanical polishing step. We used this process to fabricate two types of lateral p i n structures: standard Ge waveguide photodetectors and inverted rib Ge waveguide structures. E.g. for a 3µm wide standard device, the photodetector responsivity at 1.5µm wavelength was measured to be around 0.9A/W; for the inverted rib Ge photodetector, the responsivity was as high as 0.9A/W even for a 1µm wide device. Figure 3: Dark current vs. voltage and temperature for a 10x2µm2 Ge photodetector Integrated Silicon Heaters The platform flow also allows for the introduction of resistive heaters close to the ring modulators. Resistive heaters can be realized by using the highly doped P implants. We realized a silicon heater next to the modulator ring. The heater element caused a shift of 0.29nm/mW of the resonance wavelength of the MOS ring device. Conclusion The imec Silicon Photonics Platform provides a broad set of components passive as well as active that are needed to realize complex photonics integrated circuits. Such circuits are anticipated to be required for high speed and power efficient optical interconnects.
Imec and its associated lab at Ghent University carry out these activities in the frame of imec s industrial affiliation program on high bandwidth optical I/O, which is part of imec s research on deep submicron CMOS scaling. References: [1] P. Absil et al., A robust technology platform for high density silicon based photonics integration, ISPEC 2011. [2] G. Roelkens et al., Bridging the Gap Between Nanophotonic Waveguide Circuits and Single Mode Optical Fibers Using Diffractive Grating Structures, Journal of Nanoscience and Nanotechnology (invited), 10, p.1551 1562 (2010). [3] W. Bogaerts et al., Silicon on Insulator Spectral Filters Fabricated with CMOS Technology, J. Sel. Top. Quantum Electron. (invited), 16(1), p.33 44 (2010). [4] P. Verheyen et al., Co integration of Ge detectors and Si modulators in an advanced Si photonics platform, SPIE Europe Belgium, 2012. [5] M. Pantouvaki et al., Lateral versus interdigitated diode design for 10Gb/s low voltage low loss silicon ring modulators, IEEE Photonics Society Optical Interconnects conference (IEEE, 2012).