EE247 Lecture 9. Sampling Sine Waves Frequency Spectrum

Similar documents
EE247 Lecture 11. Switched-Capacitor Filters (continued) Effect of non-idealities Bilinear switched-capacitor filters Filter design summary

EE247 Lecture 11. Switched-Capacitor Filters (continued) Effect of non-idealities Bilinear switched-capacitor filters Filter design summary

EE247 Lecture 10. EECS 247 Lecture 10 Switched-Capacitor Filters 2010 H. K. Page 1. DDI Switched-Capacitor Integrator 1 2 C I. Vin. Cs 1.

Summary Last Lecture

The Case for Oversampling

EE247 Lecture 26. This lecture is taped on Wed. Nov. 28 th due to conflict of regular class hours with a meeting

INF4420 Switched capacitor circuits Outline

Analog-to-Digital Converters

INF4420. Switched capacitor circuits. Spring Jørgen Andreas Michaelsen

Switched Capacitor Concepts & Circuits

Summary Last Lecture

EE247 Lecture 26. EE247 Lecture 26

ECE626 Project Switched Capacitor Filter Design

EE 508 Lecture 28. Integrator Design. Alaising in SC Circuits Elimination of redundant switches Switched Resistor Integrators

Active Filter Design Techniques

Summary of Lecture 4

Signals and Systems Lecture 6: Fourier Applications

BandPass Sigma-Delta Modulator for wideband IF signals

Combination Notch and Bandpass Filter

Digital Processing of Continuous-Time Signals

Outline. Discrete time signals. Impulse sampling z-transform Frequency response Stability INF4420. Jørgen Andreas Michaelsen Spring / 37 2 / 37

Digital Processing of

EE247 Lecture 24. EE247 Lecture 24

Signals and Systems Lecture 6: Fourier Applications

EE247 - Lecture 2 Filters. EECS 247 Lecture 2: Filters 2005 H.K. Page 1. Administrative. Office hours for H.K. changed to:

Electronic Noise. Analog Dynamic Range

SWITCHED CAPACITOR CIRCUITS

ECEN 325 Lab 5: Operational Amplifiers Part III

Outline. Noise and Distortion. Noise basics Component and system noise Distortion INF4420. Jørgen Andreas Michaelsen Spring / 45 2 / 45

EECS 247 Analog-Digital Interface Integrated Circuits 2005

Fundamentals of Data Converters. DAVID KRESS Director of Technical Marketing

EE 230 Lecture 39. Data Converters. Time and Amplitude Quantization

Lecture 17: BJT/FET Mixers/Mixer Noise

Summary Last Lecture

EE247 Lecture 2. Butterworth Chebyshev I Chebyshev II Elliptic Bessel Group delay comparison example. EECS 247 Lecture 2: Filters

EE247 Lecture 11. Example: Switched-capacitor filters in CODEC integrated circuits. Switched-capacitor filter design summary

System on a Chip. Prof. Dr. Michael Kraft

Nonlinear Macromodeling of Amplifiers and Applications to Filter Design.

EE247 Lecture 6. Frequency tuning for continuous-time filters

Summary of Lecture 4

THE TREND toward implementing systems with low

E4215: Analog Filter Synthesis and Design: HW0

Experiment 8 Frequency Response

Lecture #6: Analog-to-Digital Converter

EE247 Lecture 27. EE247 Lecture 27

EE247 Lecture 16. EECS 247 Lecture 16: Data Converters- DAC Design & Intro. to ADCs 2009 Page 1

ECE503: Digital Filter Design Lecture 9

Summary of Last Lecture

NH 67, Karur Trichy Highways, Puliyur C.F, Karur District DEPARTMENT OF INFORMATION TECHNOLOGY DIGITAL SIGNAL PROCESSING UNIT 3

FYS3240 PC-based instrumentation and microcontrollers. Signal sampling. Spring 2015 Lecture #5

Applied Electronics II

Tuesday, March 22nd, 9:15 11:00

Nonlinear Macromodeling of Amplifiers and Applications to Filter Design.

Differential Amplifiers

LOW SAMPLING RATE OPERATION FOR BURR-BROWN

Advanced Operational Amplifiers

Transmit filter designs for ADSL modems

Summary of Lecture 4

Summary Last Lecture

Second-Order Sigma-Delta Modulator in Standard CMOS Technology

EE247 Lecture 6. Summary Lecture 5

Solution of ECE 342 Test 3 S12

PART. MAX7421CUA 0 C to +70 C 8 µmax INPUT CLOCK

Homework Assignment 06

Readout Electronics. P. Fischer, Heidelberg University. Silicon Detectors - Readout Electronics P. Fischer, ziti, Uni Heidelberg, page 1

Analog and Digital Signals

Chapter-2 SAMPLING PROCESS

Transmit filter designs for ADSL modems

How to turn an ADC into a DAC: A 110dB THD, 18mW DAC using sampling of the output and feedback to reduce distortion

EELE503. Modern filter design. Filter Design - Introduction

Analysis and Design of Analog Integrated Circuits Lecture 18. Key Opamp Specifications

NOWADAYS, multistage amplifiers are growing in demand

Experiment VI: The LRC Circuit and Resonance

Administrative. No office hour on Thurs. this week Instead, office hour 3 to 4pm on Wed.

Classic Filters. Figure 1 Butterworth Filter. Chebyshev

EE 508 Lecture 28. Nonideal Effects in Switched Capacitor Circuits. Charge Injection Alaising Redundant Switch Removal Matching

Summary last lecture

PHYS225 Lecture 15. Electronic Circuits

Telecommunication Electronics

Analog and Telecommunication Electronics

UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering And Computer Sciences MULTIFREQUENCY CELL IMPEDENCE MEASUREMENT

Filters and Tuned Amplifiers

Gábor C. Temes. School of Electrical Engineering and Computer Science Oregon State University. 1/25

Tones. EECS 247 Lecture 21: Oversampled ADC Implementation 2002 B. Boser 1. 1/512 1/16-1/64 b1. 1/10 1 1/4 1/4 1/8 k1z -1 1-z -1 I1. k2z -1.

PLL EXERCISE. R3 16k C3. 2π π 0 π 2π

Downloaded from

Chapter 7 Filter Design Techniques. Filter Design Techniques

Complex Digital Filters Using Isolated Poles and Zeroes

Using High Speed Differential Amplifiers to Drive Analog to Digital Converters

, answer the next six questions.

Common mode rejection ratio

Spectrum analyzer for frequency bands of 8-12, and MHz

CHAPTER. delta-sigma modulators 1.0

Introduction. Transients in RLC Circuits

Telecommunication Electronics

Thermal Johnson Noise Generated by a Resistor

B.Tech II Year II Semester (R13) Supplementary Examinations May/June 2017 ANALOG COMMUNICATION SYSTEMS (Electronics and Communication Engineering)

Analog and Telecommunication Electronics

SAMPLING THEORY. Representing continuous signals with discrete numbers

ECE 627 Project: Design of a High-Speed Delta-Sigma A/D Converter

Transcription:

EE247 Lecture 9 Switched-capacitor filters (continued) Example of anti-aliasing prefilter for S.. filters Switched-capacitor network electronic noise Switched-capacitor integrators DDI integrators LDI integrators Effect of parasitic capacitance Bottom-plate integrator topology Switched-capacitor resonators Bandpass filters Lowpass filters Switched-capacitor filter design considerations Termination implementation Transmission zero implementation Effect of non-idealities EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page Sampling Sine Waves Frequency Spectrum ontinuous-time Signal scenario before sampling Signal scenario after sampling Amplitude Amplitude f in 00kHz 0.4 0.2 0. 0.3 0.5 600kHz f s MHz.2MHz.7MHz Discrete Time 2f f s f /f s Key point: Signals @ nf S ±f max signal fold back into band of interest Aliasing EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 2

First Order S.. Filter φ V in V in S S2 V out time 2 time H(f) f -3dB f s 2f s Output Frequency Spectrum prior to hold Switched-apacitor Filters problem with aliasing EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 3 First Order S.. Filter φ V in V in Anti-Aliasing Filter S S2 V out time 2 time Antialiasing Pre-filter f -3dB f s 2f s Output Frequency Spectrum prior to hold Switched-apacitor Filters problem with aliasing EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 4

Sampled-Data Systems (Filters) Anti-aliasing Requirements Frequency response repeats at f s, 2f s, 3f s.. High frequency signals close to f s, 2f s,.folds back into passband (aliasing) Most cases must pre-filter input to sampled-data systems (filter) to attenuate signal at: f > f s /2 (nyquist f max < f s /2 ) Usually, anti-aliasing filter included on-chip as continuous-time filter with relaxed specs. (no tuning) EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 5 Example : Anti-Aliasing Filter Requirements Antialiasing Pre-filter f -3dB f s 2f s ice-band ODE S.. filter high order low-pass with f -3dB =4kHz & f s =256kHz Anti-aliasing continuous-time pre-filter requirements: Need at least 40dB attenuation of all out-of-band signals which can alias inband Incur no phase-error from 0 to 4kHz Gain error due to anti-aliasing filter 0 to 4kHz < 0.05dB Allow -30% variation for anti-aliasing filter corner frequency (no tuning) Need to find minimum required filter order EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 6

Oversampling Ratio versus Anti-Aliasing Filter Order Maximum Aliasing Dynamic Range Filter Order f s /f in =256K/4K=64 f s /f in_max * Assumption anti-aliasing filter is Butterworth type 2 nd order Butterworth Need to find minimum corner frequency for mag. droop < 0.05dB EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 7 Example : Anti-Aliasing Filter Specifications Normalized frequency for 0.05dB droop: need perform passband simulation normalized ω=0.34 4kHz/0.34=2kHz Set anti-aliasing filter corner frequency for minimum corner frequency 2kHz Find nominal corner frequency: 2kHz/0.7=7.kHz heck if attenuation requirement is satisfied for widest filter bandwidth 7.x.3=22.28kHz Find (f s -f sig )/f -3dB max Stopband Attenuation db 252/22.2=.35 make sure enough attenuation heck phase-error within 4kHz signal band for min. filter bandwidth via simulation 0.05dB droop Νοrmalized ω From: Williams and Taylor, p. 2-37 EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 8

Example : Anti-Aliasing Filter Antialiasing Pre-filter f -3dB f s 2f s ice-band S.. filter f -3dB =4kHz & f s =256kHz Anti-aliasing filter requirements: Need 40dB attenuation at clock freq. Incur no phase-error from 0 to 4kHz Gain error 0 to 4kHz < 0.05dB Allow -30% variation for anti-aliasing corner frequency (no tuning) 2-pole Butterworth LPF with nominal corner freq. of 7kHz & no tuning (min.=2khz & max.=22khz corner frequency ) EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 9 Summary Sampling theorem f s > 2f max_signal Signals at frequencies nf S ±f sig fold back down to desired signal band, f sig This is called aliasing & usually mandates use of anti-aliasing pre-filters combined with oversampling Oversampling helps reduce required order for anti-aliasing filter S/H function shapes the frequency response with sinx/x shape Need to pay attention to droop in passband due to sinx/x If the above requirements are not met, T signals can NOT be recovered from sampled-data networks without loss of information EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 0

Switched-apacitor Network Noise φ During φ high: Resistance of switch S (R on S ) produces a noise voltage on with variance kt/ (lecture - first order filter noise) v IN S S2 v OUT The corresponding noise charge is: v IN R on S Q 2 = 2 V 2 = 2. kt/ = kt φ low: S open This charge is sampled EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page Switched-apacitor Noise φ During high: Resistance of switch S2 contributes to an uncorrelated noise charge on at the end of : with variance kt/ v IN S S2 v OUT Mean-squared noise charge transferred from v IN to v OUT per sample period is: R on S2 Q 2 =2kT EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 2

Switched-apacitor Noise The mean-squared noise current due to S and S2 s kt/ noise is : ( ) 2 Since i= Q then i 2 = Qf 2k Tf 2 t s = B s This noise is approximately white and distributed between 0 and f s /2 (noise spectra single sided by convention) The spectral density of the noise is found: 2 2k Tf 2 i = B s = 4k B Tf Δf f s s 2 i 2 4k B T Since R EQ = then: = f s Δf R EQ S.. resistor noise = a physical resistor noise with same value! EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 3 Sampling Noise from S S/H Periodic Noise Analysis SpectreRF Netlist ahdl_include "zoh.def" Netlist simoptions options reltol=0u vabstol=n iabstol=p Vclk 00ns 00kOhm R S Vrc ZOH Vrc_hold PNOISE Analysis PNOISE sweep from 0 to 20.0M (037 steps) pf ZOH T = 00ns SpectreRF PNOISE: check 00kOhm R noisetype=timedomain ltage NOISE VNOISE noisetimepoints=[ ] pf as alternative to ZOH. noiseskipcount=large might speed up things in this case. PSS pss period=00n maxacfreq=.5g errpreset=conservative PNOISE ( Vrc_hold 0 ) pnoise start=0 stop=20m lin=500 maxsideband=0 EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 4

Sampled Noise Spectrum V/sqrt(Hz) Normalized Noise Density [db] Spectral density of sampled noise including sinx/x effect Noise spectral density with sinx/x effect taken out EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 5 Total Noise Normalized Total Noise v n T /(KT/) 0. f s /2 Sampled simulated noise in 0 f s /2: 62.2μV rms (expect 64μV for pf) EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 6

Switched-apacitor Integrator - φ φ - T=/f s for fsignal<< fsampling s fs V s 0 = V dt in I ω s 0 = fs I Main advantage: No tuning needed ritical frequency function of ratio of capacitors & clock freq. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 7 Switched-apacitor Integrator φ I - s φ T=/f s φ - - s s φ High s harged to High harge transferred from s to EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 8

ontinuous-time versus Discrete-Time Analysis Approach ontinuous-time Discrete-Time Write differential equation Laplace transform (F(s)) Let s=jω F(jω) Plot F(jω), phase(f(jω)) Write difference equation relates output sequence to input sequence Use delay operator z - to transform the recursive realization to algebraic = equation (n )T in z domain Set z= e jωt [ ] V o(nt s) V i s... Plot mag./phase versus frequency ( ) z = z V i ( z)... EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 9 Discrete Time Design Flow Transforming the recursive realization to algebraic equation in z domain: Use delay operator z : nt s... (n )T s... z (n /2)T / 2 s... z (n )T s... z (n /2)T / 2 s... z * Note: z = e jωts = cos(ωt s ) j sin(ωt s ) EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 20

Switched-apacitor Integrator φ I - s φ T=/f s φ - - s s φ High s harged to High harge transferred from s to EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 2 Switched-apacitor Integrator Output Sampled on φ φ I - φ s φ φ φ lock Vs EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 22

(n-3/2)t s Switched-apacitor Integrator (n-)t s (n-/2)ts nt s (n/2)ts φ φ φ (n)ts lock Vs Φ Q s [(n-)t s ]= s V i [(n-)t s ], Q I [(n-)t s ] = Q I [(n-3/2)t s ] Φ 2 Q s [(n-/2) T s ] = 0, Q I [(n-/2) T s ] = Q I [(n-) T s ] Q s [(n-) T s ] Φ _ Q s [nt s ] = s V i [nt s ], Q I [nt s ] = Q I [(n-) T s ] Q s [(n-) T s ] Since V o = - Q I / & V i = Q s / s V o (nt s ) = V o [(n-) T s ] - s V i [(n-) T s ] EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 23 Switched-apacitor Integrator Output Sampled on φ φ I - φ s I V o(nt s) = I (n )T s s V in (n )Ts V o(nt s) = (n )T s s V s I in (n )T V o(z) = Z V o(z) Z s V I in (Z) V o s Z (Z) = V I Z in DDI (Direct-Transform Discrete Integrator) EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 24

z-domain Frequency Response Sampled-data systems z plane singularities analyzed via z-plane The s-plane jω axis maps onto the unit-circle LHP singularities in s-plane map into inside of unit-circle in z-domain RHP singularities in s-plane map into outside of unitcircle in z-domain Particular values: f = 0 z = f = f s /2 z = - imag. axis in s-domain f = f s /2 LHP in s-domain z = e s.ts z-plane f = 0 EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 25 z-domain Frequency Response The frequency response is obtained by evaluating H(z) on the unit circle at: z = e jωt = cos(ωt s ) j sin(ωt s ) Once z=- (f s /2) is reached, the frequency response repeats, as expected The angle to the pole is equal to 360 (or 2π radians) times the ratio of the pole frequency to the sampling frequency (cos(ωt s ),sin(ωt s )) 2πf f S z-plane EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 26

Switched-apacitor Direct-Transform Discrete Integrator φ I - φ s V o V in (z) = s z z s I z = EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 27 DDI Integrator Pole-Zero Map in z-plane z -=0 z = on unit circle f Pole from f 0 in s-plane mapped to z = As frequency increases z domain point moves on unit circle (W) f = f s /2 f increasing (z-) Once frequency gets to: z=- (f=f s /2) frequency response repeats z-plane EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 28

DDI Switched-apacitor Integrator φ - φ s V o s z s jωt (z) = =, z= e I I V z z in s s j T /2 j j e ω α α = = since: sinα = e e I jωt I jωt /2 jωt /2 e e e 2j s jωt /2 = j e I 2sin( ωt/2) s ωt/2 jωt /2 = e I jωt sin( ωt/2) Phase Error Ideal Integrator Magnitude Error EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 29 DDI Switched-apacitor Integrator φ - φ s s j T /2 (z) ωt/2 ω == e I jω T sin( T/2) V ω in Example: Mag. & phase error for: - f / f s =/2 Mag. error = % or 0.dB Phase error=5 degree Q intg = -3.8 Magnitude Error Phase Error 2- f / f s =/32 Mag. error=0.6% or 0.04dB Phase error=5.6 degree Q intg = -0.2 DDI Integrator: magnitude error no problem phase error major problem EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 30

5 th Order Low-Pass Switched apacitor Filter jω Built with DDI Integrators jω ω s s-plane oarse View s-plane Fine View σ σ Example: 5th Order Elliptic Filter Ideal Pole Singularities pushed Ideal Zero -ω s towards RHP due to DDI Pole integrator excess phase DDI Zero EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 3 H( jω) Passband Peaking Switched apacitor Filter Build with DDI Integrator S DDI based Filter Zeros lost! f s /2 ontinuous-time Prototype Frequency (Hz) fs 2f s f EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 32

Switched-apacitor Integrator Output Sampled on φ2 φ - s 2 Sample output ½ clock cycle earlier Sample output on EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 33 (n-3/2)t s Switched-apacitor Integrator Output Sampled on φ2 (n-)t s (n-/2)ts nt s (n/2)ts φ φ φ (n)ts lock Vs 2 Φ Q s [(n-)t s ]= s V i [(n-)t s ], Q I [(n-)t s ] = Q I [(n-3/2)t s ] Φ 2 Q s [(n-/2) T s ] = 0, Q I [(n-/2) T s ] = Q I [(n-3/2) T s ] Q s [(n-) T s ] Φ _ Q s [nt s ] = s V i [nt s ], Q I [nt s ] = Q I [(n-) T s ] Q s [(n-) T s ] Φ 2 Q s [(n/2) T s ] = 0, Q I [(n/2) T s ] = Q I [(n-/2) T s ] Q s [n T s ] EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 34

Switched-apacitor Integrator Output Sampled on φ2 (n-3/2)t s (n-)t s (n-/2)ts nt s (n)ts φ φ φ lock Vs Q I [(n/2) T s ] = Q I [(n-/2) T s ] Q s [n T s ] V o2 = - Q I / & V i = Q s / s V o2 [(n/2) T s ] = V o2 [(n-/2) T s ] - s V i [n T s ] Using the z operator rules: V o2 s z /2 (z) = V o2 z /2 = V o2 z -/2 - s V I i V z in EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 35 LDI Switched-apacitor Integrator LDI (Lossless Discrete Integrator) same as DDI but output is sampled ½ clock cycle earlier LDI V o2 s z / 2 jωt (z) =, z= e I V z in s e jωt /2 = = s I jωt I jωt/2 jωt/2 e e e = j s I 2sin( ωt/2) φ - s 2 = s I jω T Ideal Integrator ωt/2 sin( ωt/2) Magnitude Error No Phase Error! For signals at frequencies << sampling freq. Magnitude error negligible EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 36

H( jω) Switched-apacitor Filter Built with LDI Integrators Zeros Preserved f s /2 Frequency f s (Hz) 2f s f EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 37 Switched-apacitor Integrator Parasitic apacitor Sensitivity φ I - p2 p s p3 Effect of parasitic capacitors: - p3 driven by opamp o.k. 2- p2 at opamp virtual gnd o.k. 3- p harges to & discharges into, p includes the MOS switch junction capacitors which are voltage dependent, not only affects ratios but results in non-linearities Problem parasitic capacitor sensitivity EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 38

Parasitic Insensitive Bottom-Plate Switched-apacitor Integrator Sensitive parasitic cap. p rearrange circuit so that p charge/discharge φ= p grounded does not φ2= p at virtual ground φ EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 39 Bottom Plate Switched-apacitor Integrator Vi φ s - Note: Different delay from Vi & Vi- to either output Special attention needed for input/output connections to ensure LDI realization φ Vi on φ s p - Vi p2 Vi- Solution: Bottom plate capacitor integrator Vi- Vion φ2 2 Output/Input z-transform 2 on φ on φ2 s z s z 2 I z I z s 2 z s I I z z EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 40

Bottom Plate Switched-apacitor Integrator z-transform Model Vi φ φ I 2 z -z 2 z s z z 2 Input/Output z-transform z z Viφ 2 Vi Vi- s I s I z 2 2 z z z 2 2 LDI EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 4 LDI Switched-apacitor Ladder Filter - sτ 3 sτ 4 sτ 5 - - s s z 2 z 2 z 2 z z z 2 z 2 s z 2 s z 2 z 2 z z 2 s s Delay around integrator loop is (z -/2. z /2 =) LDI function EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 42

Switched-apacitor LDI Resonator Resonator Signal Flowgraph ω s φ ω2 s φ ω f = = R s eq 2 2 ω f 3 2 = = R s eq3 4 4 EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 43 Fully Differential Switched-apacitor Resonator Note: Two sets of S.. bottom plate networks for each differential integrator φ φ EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 44

Switched-apacitor LDI Bandpass Filter Utilizing ontinuous-time Termination V i Bandpass Filter Signal Flowgraph ω0 s V o -/Q V o2 Q V o ω0 s 3 ω f f 0 = s = s 4 2 Q = 2 Q V o2 V i EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 45 Example: 2 nd Order LDI Bandpass Filter s-plane versus z-plane s-plane jω z-plane σ EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 46

Switched-apacitor LDI Bandpass Filter ontinuous-time Termination f f 0 = 2 s π 2 f Δ f = 0 Q Q = fs 2π 2 4 Both accurately determined by cap ratios & clock frequency 0-3dB Magnitude (db) Δf 0. 0 f 0 Frequency EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 47 Fifth Order All-Pole LDI Low-Pass Ladder Filter omplex onjugate Terminations Termination Resistor Termination Resistor omplex conjugate terminations (alternate phase switching) Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 48

Fifth-Order All-Pole Low-Pass Ladder Filter Termination Implementation Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 49 Sixth-Order Elliptic LDI Bandpass Filter Transmission Zero Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 50

Use of T-Network V V = 2 2 V2 4 = V 2 3 4 High Q filter large cap. ratio for Q & transmission zero implementation To reduce large ratios required T-networks utilized Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 5 Sixth Order Elliptic Bandpass Filter Utilizing T-Network Q implementation Zero T-networks utilized for: Q implemention Transmission zero implementation Ref: Tat. hoi, "High-Frequency MOS Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, May 983 (ERL Memorandum No. UB/ERL M83/3). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 52

Effect of Opamp Nonidealities on Switched apacitor Filter Behaviour Opamp finite gain Opamp finite bandwidth Finite slew rate of the opamp Non-linearity associated with opamp output/input characteristics EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 53 Effect of Opamp Non-Idealities Finite D Gain s H(s) fs s f s s I a ωo H(s) s ω o a Qintg a Vi Vi- s φ - Input/Output z-transform D Gain = a Finite D gain same effect in S.. filters as for.t. filters If D gain not high enough lowering of overall Q & droop in passband EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 54

Effect of Opamp Non-Idealities Finite Opamp Bandwidth Vi Vi- s φ - Input/Output z-transform Unity-gain-freq. = f t >> f u intg V o settling error time T=/f s Assumption- Opamp does not slew (will be revisited) Opamp has one pole only exponential settling Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 55 Vi Vi- φ Effect of Opamp Non-Idealities Finite Opamp Bandwidth s - Input/Output z-transform Unity-gain-freq. = f t k k I H actual (Z) H e e Z ideal(z) I s where k = π I ft I s fs ft Opamp unity gain frequency, fs lock frequency Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. V o settling error T=/f s time EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 56

Effect of Opamp Finite Bandwidth on Filter Magnitude Response Τ non-ideal / Τ ideal (db) Magnitude deviation due to finite opamp unity-gainfrequency Active R f c /f s =/32 f c /f s =/2 Example: 2 nd order bandpass with ideal Q=25 f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 57 Effect of Opamp Finite Bandwidth on Filter Magnitude Response Τ non-ideal / Τ ideal Example: For db magnitude response deviation: - f c /f s =/2 f c /f t ~0.04 f t >25f c 2- f c /f s =/32 f c /f t ~0.022 f t >45f c (db) Active R f c /f s =/32 f c /f s =/2 3- ont.-time f c /f t ~/700 f t >700f c fc /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 58

Effect of Opamp Finite Bandwidth on Filter ritical Frequency Δω c /ω c ritical frequency deviation due to finite opamp unity-gainfrequency Example: 2 nd order filter Active R f c /f s =/32 f c /f s =/2 f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 59 Effect of Opamp Finite Bandwidth on Filter ritical Frequency Example: For maximum critical frequency shift of <% - f c /f s =/32 f c /f t ~0.028 f t >36f c 2- f c /f s =/2 f c /f t ~0.046 f t >22f c Δω c /ω c Active R f c /f s =/32 f c /f s =/2 3- Active R f c /f t ~0.008 f t >25f c f c /f t Ref: K.Martin, A. Sedra, Effect of the Opamp Finite Gain & Bandwidth on the Performance of Switched- apacitor Filters," IEEE Trans. ircuits Syst., vol. AS-28, no. 8, pp. 822-829, Aug 98. EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 60

Opamp Bandwidth Requirements for Switched- apacitor Filters ompared to ontinuous-time Filters Finite opamp bandwidth causes phase lag at the unity-gain frequency of the integrator for both type filters Results in negative intg. Q & thus increases overall Q and gain & results in peaking in the passband in the frequency band of interest For given filter requirements, opamp bandwidth requirements are much less stringent for S.. filters compared to cont. time filters Lower power dissipation for S.. filters (at low freq.s only due to other effects) Finite opamp bandwidth causes down shifting of critical frequencies in both type filters Since cont. time filters are usually tuned tuning accounts for frequency deviation S.. filters are untuned and thus frequency shift could cause problems specially for narrow-band filters EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 6 Sources of Distortion in Switched- apacitor Filters Opamp output/input transfer function nonlinearity- similar to cont. time filters apacitor non-linearity, similar to cont. time filters Distortion induced by finite slew rate of the opamp Distortion incurred by finite setting time of the opamp Distortion due to switch clock feed-through and charge injection EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 62

What is Slewing? - s L V o Viφ 2 s Vi Assumption: Integrator opamp is a simple class A transconductance type differential pair with fixed tail current, Iss=const. Iss EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 63 What is Slewing? Opamp I o v.s. V in I o I max= I ss/2 Slope ~ g m V o I o V max V in I max= -I ss/2 s Vi- Iss Vi V s > V max Output current constant I o =Iss/2 or Iss/2 onstant current charging/discharging : V o ramps down/up Slewing After V s is discharged enough to have: V s <V max I o =gm V s Exponential or over-shoot settling EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 64

Distortion Induced by Opamp Finite Slew Rate Output ltage Multiple pole settling One pole settling Slewing Settling Settling (multi-pole) Time EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 65 Ideal Switched-apacitor Output Waveform φ s - lock φ s - Vcs High harge transferred from s to I EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 66

Slew Limited Switched-apacitor Integrator Output Slewing & Settling lock φ -ideal -real Slewing Linear Settling Slewing Linear Settling EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 67 Distortion Induced by Finite Slew Rate of the Opamp Ref: K.L. Lee, Low Distortion Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb. 986 (ERL Memorandum No. UB/ERL M86/2). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 68

Distortion Induced by Opamp Finite Slew Rate Error due to exponential settling changes linearly with signal amplitude Error due to slew-limited settling changes non-linearly with signal amplitude (doubling signal amplitude X4 error) For high-linearity need to have either high slew rate or non-slewing opamp ω ( os ) T 2 V 8 o sin HD 2 k = ST r s π k ( k 2 4 ) 2 8( sin ωos T ) 2 2 8π f HD o 3= for fo<< fs HD ST 3 r s 5π 5Sr fs Ref: K.L. Lee, Low Distortion Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb. 986 (ERL Memorandum No. UB/ERL M86/2). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 69 Example: Slew Related Harmonic Distortion ω ( os ) T V 8 o sin HD 2 3 = ST r s 5π 2 8π f HD o 3 5S r f s 2 2dB Switched-capacitor filter with 4kHz bandwidth, f s =28kHz, S r =V/μsec, V o =3V Ref: K.L. Lee, Low Distortion Switched-apacitor Filters," U.. Berkeley, Department of Electrical Engineering, Ph.D. Thesis, Feb. 986 (ERL Memorandum No. UB/ERL M86/2). EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 70

Distortion Induced by Opamp Finite Slew Rate Example -20-40 HD3 [db] -60-80 V o =V f / f s =/32 V o =2V f / f s =/2 V o =V V o =2V -00-20 0 00 000 (Slew-rate / f s ) [V] EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 7 Distortion Induced by Finite Slew Rate of the Opamp Note that for a high order switched capacitor filter only the last stage slewing will affect the output linearity (as long as the previous stages settle to the required accuracy) an reduce slew limited non-linearity by using an amplifier with a higher slew rate only for the last stage an reduce slew limited non-linearity by using class A/B amplifiers Even though the output/input characteristics is non-linear as long as the D open-loop gain is high, the significantly higher slew rate compared to class A amplifiers helps improve slew rate induced distortion In cases where the output is sampled by another sampled data circuit (e.g. an AD or a S/H) no issue with the slewing of the output as long as the output settles to the required accuracy & is sampled at the right time EES 247 Lecture 9 Switched-apacitor Filters 2009 H. K. Page 72