DEPARTMENT OF ELECTRICAL ENGINEERING LAB WORK EE301 ELECTRONIC CIRCUITS EXPERIMENT : 4 TITLE : 555 TIMERS OUTCOME : Upon completion of this unit, the student should be able to: 1. gain experience with design and construction of timer circuits. 2. explore simple timer concepts and functional circuits. 3. measure the frequency and duty cycle of an astable 555 timer. 4. measure the pulse width out of a astable 555 timer. MATERIALS REQUIRED: i. Resistors 1 kω, and 2 kω. ii. Capacitor 0.01µF. iii. 555 Timer chip iv. DC Power Supply (5 V) v. Breadboard vi. Analogue / Digital Multimeter vii. Oscilloscope
Part 1: THEORY RS Flip-Flop Figure 1.1 shows the schematic symbol for a set-reset latch or RS flip-flop. A high voltage (+ Vcc) applied to the set S input with a low (0V) to the reset R input forces the output Q to Vcc (high) and Q low (0 V). A high S input to therefore sets the output to 15 V, Where it remains even though the inputs are removed. A high reset R and Low set S causes the outputs to switch or flip-flop to a high Q and low Q. This is referred to as the reset condition of the flip-flop. The circuit latches in its current condition until the reverse input conditions are applied. The circuit latches in either of two states. A high S input sets Q to high; a high R input resets Q to low. Output Q remains in a given state until triggered into the opposite state.
Basic Timing Concept Figure 1.2(a) illustrates some basic ideas needed in our later discussion of the 555 timer. Assume output Q is high. This saturates the transistor and clamps the capacitors voltage at ground. In others words, the capacitors is short-circuited and cannot charge. The non inverting input voltage of the op Amp is called the threshold voltage, and the inverting input voltage is referred to as the control voltage. With the RS flip-flop set, the statured transistor holds the threshold voltage at 0. The control voltage, on the other hand, is fixed at + 10 V because of the voltage divider. Suppose we apply the high voltage to the R input. This resets the RS flipflop. Output Q goes to 0 and this cut off the transistor. Capacitor C is now free to charge. As the capacitor charges, the threshold voltage increases. Eventually, the threshold voltage becomes slightly greater than the control voltage (+10V). The output of the Op Amp then goes high, forcing the Rs flip-flop to set. The High Q output saturates the transistor and this quickly discharges the capacitor. Notice the two waveforms in Fig. 1.2(b). An exponential rise is across the capacitor, and a positive-going pulse appears at the Q output.
The 555 timer is a very popular and versatile integrated circuit that includes 23 transistors, 2 diodes and 16 resisters on in an 8-pin DIP (Dual In-line Package). It has two main operating modes: Monostable Mode the 555 functions as a one-shot. Applications include timers, missing pulse detectors, bouncefree switches and touch switches. Astable Mode the 555 functions as an oscillator. This mode is used for circuits such as LED and lamp flashers, pulse generators, logic clocks, tone generators and security alarms. 555 Timers in Astable Multivibrator Mode: The 555 timer can generate a very wide frequency range, depending on the values of R1, R2 and C. The following figure shows how to choose the timing resistors. Figure 1.4: The 555 connected as an astable multivibrator
Charge time (output high): 0.693*(R1+R2)*C Discharge time (output low): 0.693*(R2)*C Period: 0.693*(R1+2*R2) Frequency: 1.44 / ((R1+2*R2)*C) Duty cycle: Time High / Time Low: (R1+R2) / R2 Part 2: LABORATORY PROCEDURE Astable Multivibrator 1. Calculate the frequency and duty cycle in Fig. 1.10 for the resistances listed in Table 1-1. Record the result under fcalc and Dcalc. 2. Connect the circuit of Fig. 1-10 with RA = 1kΩ and RB = 2 kω 3. Measure W and T. Work out the frequency and duty factor. Record under fmeas and Dcalc in Table 1-1. 4. Look at the voltage across the capacitor (pin6). You should see an exponentially rising and falling wave 5 V. 5. Repeat step 2 through 4 for the other resistances of Table 1-1. 6. Using Graph 1, 2, and 3, sketch the output waveform you see on the oscilloscope.
Part 3: RESULT Table 1-1 Astable Operation RA, kω RB, kω fcalc Dcalc Charge Time (Output High) Charge Time (Output Low) Period fmeas 1 2 2 1 1 1 Part 4: GRAPH SECTION Be sure to note the scale Volt/div and Time/div settings. Volt / div: Time / div: Graph 1: 555 Output Signal (Astable Operation) RA = 1 kω, RB = 2 kω
Volt / div: Time / div: Graph 2: 555 Output Signal (Astable Operation) RA = 2 kω, RB = 1 kω Volt / div: Time / div: Graph 3: 555 Output Signal (Astable Operation) RA = 1 kω, RB = 1 kω
Part 4: DISCUSSION Write discussion base for your result of the experiment and most importantly, what you learned from performing it. It is also encouraged to include personal statements and suggestions about the lab activities. Part 5: QUESTION 1. How does ratio RA / RB affect the duty cycle of an astable 555 timer? 2. What effect does increasing the timing capacitor have on the frequency out of an astable 555 timer? Part 6: CONCLUSION Write conclusions base for your outcome of the experiment and most importantly, what you learned from performing it.