Analysis of Leakage Current and DC Injection in Transformerless PV Inverter Topologies

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Analysis of Leakage Current and DC Injection in Transformerless PV Inverter Topologies Anjali Varghese C #1, Karpagam M *2, Alwarsamy T #3 # Research Scholar, Anna University, Chennai # Liaison Officer, DOTE, Chennai India 1 anjuvicy@gmail.com 3 talwarsamy@gmail.com * Assosciate Professor, Hindusthan College of Engineering and Technology Coimbatore,India 2 karpagam.sathish@gmail.com Abstract Considering low efficiencies of solar panels, the reliability and efficiency of power electronic interface has to be ensured. Transformerless PV inverters increases the efficiency by nearly 2% and decreases cost by 25%. With no galvanic isolation comes the problem of dc injection and ground leakage current which pauses serious problems to core saturation of distribution transformers, cable corrosion, Power quality and EMI problems and has to be limited as per IEEE standards. This paper gives an analysis of leakage current flowing through the parasitic capacitance and also the DC injection in the output of the inverter. Analysis is done for various values of parasitic capacitance. Five different H- Bridge derived topologies and PWM techniques are evaluated on the basis of leakage current and DC injection. Keyword-DC injection, Common Mode Voltage, Differential Mode Voltage, Parasitic Capacitance, Leakage current. I. INTRODUCTION Avoiding transformers while connecting PV inverters to grid has gained much popularity due to its increased efficiency (nearly by 2%) and decreased cost (nearly by 25%). Transformers used for isolation could either be line frequency transformers which increase the bulkiness of the system while high frequency transformers require more than one power stage and increase system complexity. However, transformerless inverters have a serious drawback of ground leakage current which flows between the PV array and the ground through the parasitic capacitance that exists between PV cell and its frame. When the frame is grounded the parasitic capacitance exists between the PV array and ground. The common mode voltage fluctuations across this capacitance cause ground leakage current flow which initiates problems of EMI, personnel safety, power quality issues and system losses. Large ground leakage currents are formed when parasitic capacitance AC side filter inductors and grid form a resonant circuit. To minimize the leakage current, the maintenance of constant common mode voltage is primarily required. Common mode voltage largely depends on topology of the inverter and PWM techniques. Full bridge configuration with bipolar PWM has constant common mode voltage but with a reduced efficiency and large output current ripple. Full bridge with unipolar PWM has many advantages of increased efficiency and three level output. There are other full bridge derived structures like H5 and HERIC topologies which use additional switches for DC and AC decoupling respectively. Decoupling switches enable the disconnection of PV panel from the grid during freewheeling modes. This helps in limiting the DC link voltage ripple. The galvanic connection between the PV system and the utility also causes DC current injection from PV system to the utility. This DC injection, according to Blewitt et al can be classified as common mode and differential mode DC current injection. Common mode DC injection is established due to the parasitic capacitance that is formed between the PV array and ground. This in turn produces ground leakage current between inverter output and DC stage. A finite DC component is thereby injected to the inverter output through this connection. Ground leakage current can be prevented by maintaining the common mode voltage constant. This can also be prevented by using various topologies and pulse width modulation (PWM) techniques. Differential mode DC injection is produced due to the asymmetrical operation of inverter switches and also due to offset errors produced by sensors and transducers. Also a differential mode voltage component is generated ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 453

within common mode component which is discussed in section II and cann be avoided using equal value filter inductors. DC injection can be eliminated by using series capacitors, DC link sensors and particular topologies t using DC decoupling during freewheeling modess in inverter operation[1]-[7]. The organisation of the paper is as a follows: Section II contains modellingg of common mode voltagee. Section III gives the analysis of the five different H-Bridge derived topologies. Section IV gives the comparison and experimental analysis and Section V summarizes the conclusion obtained from the experiments. II. COMMONN MODE VOLTAGE MODEL The galvanic connection between PV inverterr and the grid pauses the problem p of leakage current and DC injection. This section models the equivalent common mode voltage considering both h differential mode and common mode voltage. Fig. 1 shows the model of single phase inverter connected to the output of PV array through a DC link capacitor. L R and L Y are line inductors respectively and L g is the inductor on the grid side. Parasitic capacitance can exist between PV panel and frame, f represented as C PV, between line and ground, as C LG and between transformer windings, C W. Ground leakage current flows from the output of PV through C PV V to the ground. Since grid is also grounded, leakage current flows to the grid. For PV inverters with galvanic isolation, the stray capacitance between transformer windings offer impedancee to DC current and therefore the DC injection is not much influenced by topology or PWM technique usedd in inverters. But in transformerless inverters sincee winding capacitance is absent the topology as a well as modulation strategies can be effectively e modified to eliminate DC injection. The common mode voltage existing betweenn R and Y terminals of the line is obtained where VCM_ C RY and V DM _ RY are the common mode and differential mode voltage between lines R and Y respectively. V RN N and V YN are the output voltages of the inverter with respect to the negative terminal N of the DC bus reference. V CM _ RY and V DM _ RY are defined as VCM C _ RY VDM D _ RY V V RNN V YN 2 RNN V YN (1) (2) Fig 1. Common Mode Voltage Model V CM_ EFF is the combination of common mode voltage between lines and the common mode voltage producedd by the differential mode voltage whichh is influenced by the filterr inductance imbalances depicted as V ry. Effective common mode voltage can be defined as V CM _ EFF V CM _ RY V ry (3) Vry V DM _ RY 2 L L Y Y L L R R (4) ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 454

This voltage can be made zero if L R =L Y. The inverter has been designed with equal output inductors. In this paper, the DC injection measured and shown n is the total DC injection inn the output off the inverter[8]-[11]. Fig 2. Model of Effective Common Mode III. ANA ALYSIS OF TOPOLOGIES This section gives an analysis off leakage current flowing through the parasitic capacitance and also the DC injection in the outpu of the inverter. Five different H-Bridge derived topologies andd PWM techniques are evaluated on the basiss of leakage current c and DC injection. Transformerless inverters based on H-Bridge are chosen for their less complexity in analysis a and modelling [12]-[14]. i) Bipolar Pulse Width Modulation (PWM) ii) Unipolar Pulse Width Modulation iii) Hybrid Pulse Width Modulation iv)h-bridge Topology with DC Bypass (one Switch) v)h-bridge Topology with DC Bypass(two switches) i) Bipolar Pulse Width Modulation Fig 3. H-Bridge inverter Topology S1 and S3 are switched by comparing sinusoidal signal with triangular carrier signal and S2 and S4 are switched complementarily. There iss no zero output voltage state in this configuration. Thee filtering requirements are high in bipolar PWM. The outpu voltage is bipolar in nature, (+V DC to -V- DC to +V DC ), and so core losses are high. Efficiency is low due to reactive power transfer between L R, L Y with C PV. ii) Unipolar PWM Two legs are switched by comparing high frequency with sinusoidal and mirrored sinusoidal references. Two zero output voltage states are possible when S1, S3 = ON and S2, S4 = ON. Since the switching ripple r has double the switching frequency, the t filtering requirements are lowered. The output voltage is unipolar in ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 455

nature.(0 to +V DC to 0 to V DC to 0). Losses aree reduced during zero voltage states andd therefore efficiency is higher than bipolar. iii) Hybrid PWM One leg is switched at low grid frequency andd the other leg is switchedd at high PWMM frequency. Two zero output voltage states are possible: S1, S2 = ONN and S3, S4 = ON. Efficiency is high as in unipolar. The switching ripple in the current follows switching frequency and hence filtering requirements are higher. iv) DC Bypass (one Switch) Fig 4. DC Bypass (one Switch) The H bridge switches in this topology t follow a unipolar switching pattern. Switch S5 is turned off during the freewheeling mode of the inverter. Two zeroo output voltage states are possible: p S1, S2 = ON and S3, S4 = ON. Efficiency is highh as in unipolar. The switching ripple in the current follows switching frequency and a hence filtering requirements are higher. This modulationn can be used only for two quadrant operation. v) DC Bypass (Two Switches) Fig 5. H-Bridgee with DC Bypasss (Two Switches) The H-Bridge switches in this topology followw a unipolar switching pattern. S5 and S66 (DC Bypass switches) are turned off during zero output voltage states. The efficiency is lowerr than unipolar has higherr filtering requirements. IV. COMPARISON OF RESULTS R To analyze and compare the leakage current off output for the various topologies, simulations were performed in MATLAB/Simulink. Two filter inductors i are placed in the line and neutral of the output as shown. Analysis is done by varying the parasitic capacitance CPVV over a range of 1µF to 10µF 1 and studying the FFT analysis and fundamental value of leakagee current. Analysis of the inverter output current with varying values of ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 456

parasitic capacitance has been done. Also the analysis of effect of output inductor imbalance on DC injection has been observed. Further the effect of seriess capacitance connected inn the output of inverter on the DC injection values has also been investigated. Fig 6. Leakage Current Vs Parasitic capacitance Fig 6 shows the effect of varying parasitic capacitance on the leakage current c for different topologies. This chapter evaluates 5 topologies on the basis of leakage current and shows that hybrid switched inverter has the highest leakage current and the topologies with DC bypass has lesser leakage current values. In I all the topologies, the leakagee current increases with increased with ncreasing values of parasiticc capacitance.. Fig 7. Comparison of DC Injection values for various topologies with varying parasitic capacitance Fig 7 shows the effect of various topologies onn DC injectionn with varyingg parasitic capacitance. It can be seen that the value of DC does not much depend on the value of parasitic capacitance but itt rather depends on the PWM technique and circuit topology. As can be seen, the DC injection value v is maximum for hybrid PWM topology and least for bipolar topology. The Unipolar topology has more DC injection than single switch DC Bypass and double switch DC Bypass topologies. ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 457

Fig 8. Comparison of DC Injection values for various topologies with varying output inductor values. Another interesting feature can be seen in fig 8. The effect of varying the output inductors can bee observed for the 5 topologies. When there is no imbalancee that is when L Y = L R, thee DC injectionn values are lesser. But when there is imbalance in the output inductor values, the DC injection has substantially increased for f all the topologies. So it can be clearly stated that DC injection depends on the common mode effective voltage. Fig 9. Comparison of DC Injection values for various topologies with varying output inductor values and output series capacitance. When series capacitance is added to the different topologies, as seen inn fig 9 the DCC injection values have considerably dropped. It can be observed that DC injectionn values does not much depend on thee value of parasitic capacitance.the value off injected DCC definitely depends on the effective common mode voltage which can be adjusted by the balance of output inductors. Topology Bipolar PWM Unipolar PWM Hybrid PWM DC Bypass (one Switch) DC Bypass (two Switches) Leakage Current High Highest est TABLE I Comparison of Topologies DC Injection High Highest est Parameters Common Mode voltagee V CM Effective Common Mode Voltage V CM _ EFF L Y =L R L Y =0 0,V DC, V DC, V DC, V DC ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 458

V. CONCLUSION This work evaluates five different transformerless topologies on the basis of leakage current and DC injection. It can be seen from the analysis that DC decoupling of the inverter during freewheeling tends to reduce the leakage current as well as DC injection. Moreover DC injection can be reduced by using equal values of output inductors which indicates the dependence of DC component on the common mode voltage values. Among the H-Bridge derived transformerless topologies, DC decoupling is suggested for use in grid connected PV systems. Table I summarizes the result of analysis and shows that variation in common mode voltage accounts for high leakage current values and also imbalance in output inductors causes wide variations in effective common mode voltage. REFERENCES [1] T. Kerekes, R. Teodorescu, M. Liserre, C. Klumpner, M. Sumner, Evaluation of three-phase transformerless photovoltaic inverter topologies, IEEE Transactions On Power Electronics, Vol. 24, No. 9, September 2009, pp 2202 2211 [2] T. Kerekes, R. Teodorescu, P. Rodríguez, G. Vázquez, E. Aldabas, "A new high-efficiency single-phase transformerless PV inverter topology", Industrial Electronics, IEEE Transactions, Vol 58, Issue: 1, January 2011, pp 184-191 [3] F. Berba, D. Atkinson, M. Armstrong, "A review of minimisation of output DC current component methods in single phase gridconnected inverters PV applications, Environment Friendly Energies and Applications (EFEA), 2012 2nd International Symposium, June 2012, pp 296 301 [4] W. M. Blewitt, D. J. Atkinson, J. Kelly, R. A. Lakin, "Approach to low-cost prevention of DC injection in transformerless grid connected inverters", Power Electronics, IET, Vol 3, Issue 1, January 2010, pp 111-119 [5] G. Vazquez, T. Kerekes, J. Rocabert, P. Rodríguez, R. Teodorescu, D.Aguilar, A photovoltaic three-phase topology to reduce common mode voltage,industrial Electronics (ISIE), 2010 IEEE International Symposium, July 2010, pp 2885 2890 [6] L. Bowtell, A. Ahfock, Direct current offset controller for transformerless single-phase photovoltaic grid-connected inverters", Renewable Power Generation, IET Vol 4, Issue 5, September 2010, pp 428-437 [7] Oscar L, F. D. Freijedo, A. G. Yepes, P. Fernandez-Comesaa, J. Malvar, R.Teodorescu, J. Doval-Gandoy, "Eliminating ground current in a transformerless photovoltaic application", Energy Conversion, IEEE Transactions,Vol 25, Issue 1, March 2010, pp 140-147 [8] Bo Yang, Wuhua Li, Yunjie Gu, Wenfeng Cui, Xiangning He, "Improved transformerless inverter with common-mode leakage current elimination for a photovoltaic grid-connected power system", IEEE Transactions On Power Electronics, Vol. 27, No. 2, February 2012, pp 752-762 [9] Xiaomeng Su, Yaojie Sun, Yandan Lin, "Analysis on leakage current in transformerless single-phase PV inverters connected to the grid", Power And Energy Engineering Conference (APPEEC), 2011 Asia-Pacific,March 2011,pp 1-5 [10] Huafeng Xiao, Shaojun Xie, "Leakage current analytical model and application in single-phase transformerless photovoltaic gridconnected inverter", IEEE Transactions on Electromagnetic Compatibility, Vol. 52, No. 4, November 2010, pp 902-913 [11] T.Kerekes,R.Teoderescu,M.Liserre, Common mode voltage in case of transformerless PV inverters connected to the grid,ieee International Symposium on Industrial Electronics,2008,page(s)2390-2395. [12] N. Mohan,T.M. Undeland and W.P.Robbins;Power Electronics Converters, Applications and Design: Wiley, 2002 [13] R. Teoderscu, Marco Liserre, Pedro Rodriguez; Grid Converters for Photovoltaic and Wind Power Systems:Wiley,2011 [14] Simone Buso, Paolo Mattavelli;Digital Control in Power Electronics: Morgan and Claypool,2006 ISSN : 0975-4024 Vol 6 No 1 Feb-Mar 2014 459