Neural Stimulation with Active Charge Balancing Feng Wang, Phuc-linh Nguyen, Jonathan Helm, Jimmy Zong Introduction We propose to design a micro-stimulation circuit cell for use in visual prosthesis applications. Other applications of micro-stimulation include: cochlea implants, deep brain stimulators, implants for bladder control, and stimulators for motor control in extremities. [1]. Such a cell could later be implemented in a wider array of cells for a complete visual prosthesis system[2] [3]. Neural stimulation is accomplished by transferring charge from an electrode onto nerve tissue. If too much charge is transferred to the tissue, Faradaic charge transfer occurs in which electrons are transferred between the electrode and electrolyte. This causes a change in the ph of the electrolyte fluid which is harmful to patients [5]. Thus it is important that a micro-stimulator cell implement a charge balancing mechanism to prevent Faradaic charge transfer. To achieve the resolution required for restoration of vision, visual prosthesis applications require many electrodes that must be very small. This imposes constraints in the physical size of the stimulation cell and the voltage range of the stimulation circuitry. Due to its small size, the resistance of each electrode can be large ~10kΩ [3]. Because a set current is delivered to the tissue though the electrode, the stimulation circuitry must have a high compliance voltage. Stimulation Strategy Biphasic or Monophasic? We also chose to generate biphasic current pulses because this is a very simple way to ensure that there is zero net charge transfer at the end of each stimulation cycle. Ideally the current pulse is generated with equal amplitude and duration for both positive and negative pulse. Since the positive pulse equals the negative pulse, ideally, the net charge transfer is zero. However due to the possibility of mismatches in transistors and process variations, the positive and negative current pulses will be different. This will result in the buildup of excess potential (ΔV) overtime on the tissue as shown in Figure 2. 1
Fig. 1: Electrode stimulation with excess potential over electrode Bipolar or Monopolar? To initiate an action potential in neural one can use bipolar or monopolar stimulation. In monopolar stimulation one will send source or sink current to or from a common (counter) electrode through the physiological medium and working electrode (Fig.1). The counter electrode is connected held at the common voltage by load impedance connections to the power supply rails and does not actively source or sink any current. The working electrode will source and sink current but not simultaneously. The counter electrode is usually common to all electrodes and is much larger than the other electrodes. This means that the total number of electrodes is N+1, where N is the total number of sites to be stimulated. For biphasic stimulation, switching between cathodic and anodic pulses is easier because there are fewer switches. However the maximum voltage across the physiological medium is ±0.5*V DD, the power supply voltage. Also one needs to generate a low impedance reference at the common voltage without burning a lot of power. In bipolar stimulation both electrodes (working and counter) will source or sink current at the same time. Current will be sourced through the working electrode and sunk through the counter electrode, or vice versa (Fig. 2). During the cathodic phase of biphasic stimulation current is sourced through the working electrode while simultaneously sunk through the counter electrode. In the anodic phase current is sourced from the counter electrode and sunk through the working electrode. Between stimulations the working and counter electrodes are disconnected from the current sources and float with respect to the stimulation circuit. This creates problems if one is trying to measure voltages across the physiological medium because the floating voltages may be outside of the ICMR of the voltage measurement circuitry. Furthermore, one needs to ensure that the same amount of current sourced is also sunk to prevent uncontrolled voltage excursions on the working and counter electrodes. Finally each stimulation site requires both a working electrode and counter electrode and the total number of electrodes required is 2N, where N is the total number of stimulation sites. The advantage to using bipolar stimulation is that the voltage swing range across the physiological medium is ±V DD. 2
Fig. 2: Monopolar vs. Bipolar Stimulation We are choosing to use a monopolar stimulation strategy in our design because in a larger system the total number of electrodes required about half of the number required by bipolar stimulation. Our circuit will be less complex because we will not need to ensure that the same amount of current is sourced and sunk simultaneously. Since one electrode is connected to a common reference point one can make voltage measurements across the physiological medium without the either voltage going outside ICMR of the measurement circuitry. One way of generating a the common voltage is to use a center tap of an offchip power coil if the stimulator is powered by an inductive link. This will be modeled in our circuit by using two series connected DC power supplies, with the common mode voltage halfway between VDD and GND. If we can solve problems associated with using a bipolar stimulation strategy, we will make necessary modifications to do so. The control signals will remain the same, but we will need to add some switches to the output stage. Because the greater dynamic voltage range provided, a bipolar stimulation strategy would allow for larger current or longer pulse duration before current sources and sinks on the output stage stop working. Architecture Our stimulation circuit is to be a cell in a larger neural stimulation system. The larger envisioned system would include a global controller, power management, and telemetry circuitry in addition to a large number of cells of our design. This stimulation cell provides biphasic, monopolar current stimulation pulses with amplitudes ranging from X to X. To achieve this goal we will use the architecture seen in the diagram below. 3
Fig.3: Architecture of Stimulator Cell Five bit data that is representative of the amplitude of the current pulses is loaded in parallel onto a storage register by a global controller. This data is output to a five-bit current steering DAC. The current from the DAC is mirrored and steered to an output stage consisting of both a source and a sink. Depending on signals from the global and local controllers, switches will either source or sink current to or from the electrode. We would like to use the current sources/sinks described in [High Voltage Compliant Current Source] because of the high voltage compliance and large output resistance provided, however we still need to decide on how to interface our current steering DAC with this design. After the biphasic stimulation, the working electrode is disconnected from the current source. The charge balance circuitry measures the voltage difference between the counter and the working electrode, and provides either a V_high or V_low signal to the local controller depending on of the voltage at the working electrode is 50 mv above or below V CM. The charge balance status is sent back to the global controller. If there is a charge imbalance, the global controller with initiate a charge balance signal that is interpreted along with either the V_low or V_high signal to either source or sink current to or from the working electrode. System Boundaries and Interfaces This cell is to be a cell within a larger stimulation system. As such power management, data telemetry, and a global controller are not within the scope of our design. Current stimulation amplitude data is to be provided by a global controller on five bit parallel data bus. A power management system will provide 3.3V and 5V supply voltages to our circuit. Furthermore a lowimpedance V CM node is provided by the power management system. Function Port name I/O Description Power supply 3.3V input 5.0V Data Bus Data[0..4] input The amplitude of the stimulation pulse, 5 bits Data_Load input Strobe Data[0..4] 4
Control Bus Positive_Pulse input Generate the positive part of the biphasic stimulation pulse Negative_Pulse input Generate the negative part of the biphasic stimulation pulse Stimulator output CB_Measurement input In this period, the output of the stimulation is measured, to see if it is charge balanced(the voltage is within the +/-50mV window), and to decide the polarity of the compensation pulse. CB_Pulse input Generate a compensation pulse for charge banlance. The width of the pulse is 5us. CB_Status output To tell the global controller if the output of the stimulator is charge balanced Electrode_Stim output The output of the stimulator is a biphasic stimulation pulse, with charge balance compensaton. In monopolar scheme, the reference is the common mode voltage - VCM Misc. Clock input 1MHz clock input Global Control The global controller issues the Positive_Pulse & Negative_Pulse signals consecutively on the control bus that tell the micro-stimulator to generate a biphasic stimulation pulse. After the generation of the biphasic stimulation pulse, the global controller will issue a sequence of control signals for charge balance compensation. At first, the global controller issues CB_Measurement signal to the charge balance comparator to measure the output of the stimulation and see if it is charge balanced(the voltage is within the +/-50mV window), and the local controller will decide the polarity of the successive compensation pulse. Data Bus & Clock 5b Register DAC Current Source Global Controller Control Bus CB_Status Local Controller Current Stimulator Electrode_Stim Charge Balance Comparator VCM Micro-Stimulator Cell Fig. 4: Interaction between global controller and stimulation cell 5
The global controller will check the CB_Status signal to decide if charge balance compensation is needed. When charge balance compensation is needed, the global controller will issue CB_Pulse to the stimulator instructing the stimulator to generate a compensation pulse with a 5us width. The global controller will repeat this control sequence for charge balance compensation if necessary. Global controller state Generate biphasic stimulation pulse - Positive_Pulse - Negative_Pulse Charge balance measurement - CB_Measurement balanced CB_Status? unbalanced Charge balance compensation -CB_Pulse Fig. 5: Flow chart of control signals from global controller 6
Fig. 6: Signals from global controller Local Control A local control will be implemented to interpret signals from the global controller and feedback from the charge balance circuitry. In the diagram below, Signals C1 and C2 are Negative_Pulse and Positive_Pulse respectively. These signals will turn on switches to source or sink current into or out of the working electrode. The signal C3, samples the output from the charge balance circuitry and stores this information onto a pair of flip-flops. This information combined with C4, CB_Pulse, will also turn on switches to source or sink current. A typical biphasic stimulation would be accomplished by C1 going high turning on a current sink. After a period of time, the global controller would de-assert the C1, wait a period of time, and then assert C2 to begin sourcing current. This completes the biphasic stimulation. At this point there may be a charge imbalance between the working and counter electrodes. The charge balance circuitry in this example senses that the voltage between the working and counter electrodes is greater than 50mV, and asserts a V_p signal to the local controller. This also asserts the CB_status feedback signal to the global controller (not shown). The global controller reads the CB_status and, because it is high, the global controller asserts the CB_Pulse (C4). This is and-ed with the stored V_p signal and a negative pulse is delivered. To end the negative pulse, C4 is deasserted. This measuring and pulsing continues until a voltage of < abs(50mv) is measured across the working and counter electrodes. 7
Digital to Analog Conversion Fig. 7: Logic circuit design of local control circuitry Interface Function Port name I/O Description Power supply 3.3V input Data input Data[0..4] input 5 bits input data, controls the amplitute of the output current, unsigned binary Misc. Clock input 1MHz clock Current output Current_Out output Current source output Specifications Supply 3.3V Clock frequency 1MHz Drive Single end current source 31*1uA =0-31uA full range Error +/-10% Topology Binary weighted current steering DAC resolution 5 bits Charge Balancing The buildup of excess potential due to mismatches in the stimulation current pulses is critical in the design of a visual prosthesis implant because when the electrode potential rises above a safe level, which is typically 50mV, electrolysis, electrode, and tissue destruction occur. The charge balancer is designed to detect or sense the voltage between the electrodes and counter electrodes and compare it to a reference voltage. If the electrode potential is larger than the safe window range of ± 50mV, it will send the signal to the controller to activate the current sources 8
to provide counter pulses to limit the potential to a safe level. Figure 3 below is a simplified block diagram of the charge balance input stage. 5V 3.3V VrefH Vol Vcm VrefL 5V 3.3V Voh Fig. 8: Charge Balancer Block. The charge balancer is basically a 2 bit ADC. Basically it detects the voltage across the electrode and outputs at Vol and Voh, respectively, a [0,1] for voltage higher than VrefH, a [1,0] for voltage lower than VrefL, and [1,1] for voltages inside the safe region. From the inputs, Vcm is the common voltage of the counter electrode which is 2.5V in this case. So the charge balancer is comparing the voltage across the electrode with the counter electrode to make sure that the electrode is always at Vcm ± 50mV after the biphasic current stimulation. Therefore the VrefH is around 2.55V and the VrefL is at 2.45V so the safe voltage range is determined to be within Vcm ± 50mV. The input stage of the charger balancer is two comparators with 5V supply to ensures that it can detect a 0-5V range from the electrode. The second stage is the inverter which acts as a level shifter to set the output to 3.3V to be compatible with the controller circuitries since Vol and Voh are input into the controller block. Table 1 is a summary of the specifications of the charge balancer. Table 1. Charge Balancer Specifications. Supply 3.3V and 5V Vcm 2.5V VrefH 2.55V VrefL 2.45V Voh and Vol 3.3V for bit 1 and 0V for bit 0 For power consideration, since the charger balancer only samples the electrode potential after one cycle of biphasic stimulation, it can be designed to turn off or sleep during the stimulations and turns on after every stimulation to sample the electrode potential. Therefore the controller stage will send a signal to the charge balancer to sleep when stimulation occurs. Output Stage Design Considerations:: The output stage must take a reference current from the DAC and source or sink enough current to trigger an action potential. Since our supply range is only 0 to 5V it is important to choose a 9
topology with high voltage compliance. The output stage must have a high output resistance, otherwise changes in the working electrode voltage will affect the current sourced to or sunk from the load. Finally the output stage must have a fast enough slew rate such the maximum amount of charge is delivered during the short pulse duration. Description: To achieve these objectives we will use the high voltage compliant, high output impedance current source from [Ghovanloo and Najafi]. Both a source and sink version of this topology will be implemented. Ghovanloo and Najafi achieved an experimental output resitance greater than 10 Mohms and with a Vmin of 580mV when sinking a maximum current of 220uA using an AMI 1.5um process. Interfaces and required specifications: The output stage is controlled by the local controller which selects either to source current or to sink current from the counter electrode. This is implemented as an NMOS/PMOS switch which is 5V voltage signal. The output stage will take a current signal from the DAC and amplify it to a maximum of ±115uA. Architecture Level Simulations We simulated the architecture of the stimulation cell by applying control signals and data normally sent by the global controller. We simulated the stimulation of a load similar to the electrode/tissue interface of a platinum electrode used in epiretinal implants, and neglected the load from the counter electrode. R1 models the very large charge transfer resistance, while C0 models the double layer interface capacitor. R0 models the solution tissue impedance. Fig. 9: Simulated load The simulated control signals generated a pulse duration of 800us for each phase of biphasic stimulation with a 200us interphase delay. Using the maximum sourcing/sinking current (124uA), we simulated three conditions. The first condition assumed the source and sink were perfectly matched. The second and third simulations assumed that the current source and sink 10
were imbalanced. In all cases the final voltage on the working electrode gets within 50 mv of V CM (2.5V). Fig. 10: Simulated output waveform assuming balanced source and sink Fig. 11 Simulated output waveform assuming more sinking current than sourcing current 11
Fig. 12: Simulated output waveform assuming less sinking current than sourcing current References: [1] M. Ortmanns, Charge Balancing In Functional Electrical Stimulators: A Comparative Study, IEEE Int. Symp. on Circ. and Systems, pp. 573-576, May 2007. [2] M. Ortmanns et al., A 0.1mm 2 Digitally Programmable Nerve Stimulation Pad Cell With High-Voltage Capability For A Retinal Implant, Proc. IEEE Int. Solit-State Circuits Conf., pp. 89-98, Feb. 2006. [3] M. Ortmmans et al., A Retina Stimulator ASIC With 232 Electrodes, Custom ESD Protection and Active Charge Balancing, IEEE Int. Symp. on Circ. and Systems, pp. 3345-3348, Feb. 2006. [4] M. Ortmanns et al., A 232-Channel Epiretinal Stimulator ASIC, IEEE Journal of Solid- State Circuits, vol. 42, No. 12, pp. 2946-2959, Dec. 2007. [5] D. R. Merrill, et al., Electrical Stimulation of excitable tissue:design of efficacious and safe protocols, Journal of Neuroscience Methods, vol. 141, Issue 2, pp. 171-178, Feb. 2005. [6] M. Sivaprakasam, et al., A Variable Range Bi-Phasic Current Stimulaus Drive Circuitry for Implantable Retinal Prosthetic Device, IEEE Jornal of Solid-State Circuits, vol. 40, No. 3, pp 763-771, Mar. 2005. [7] M. Ghovanloo, K. Najafi, A Small Size Large Voltage Compliance Programmable Current Source for Biomedical Implantable Microstimulator, Proceedings of te 25 th Annual International Conference of the IEEE EMBS, pp. 1979-1982, Sept. 2003. 12
[8] M. Ghovanloo, K. Najafi, A Compact Large Voltage-Compliance High Output-Impedance Programmable Current Source for Implantable Microstimulators IEEE Transactions on Biomedical Engineering, vol. 52, no. 1, pp. 97-105, January 2005. [9] A. Rothermel et al., A 1600-pixel Subretinal Chip with DC-free Terminals and ±2V Supply optimized for Long Lifetime and High Stimulation Efficiency, Proc. IEEE Int. Solit-State Circuits Conf., pp. 144-145, 602, 2008. 13