RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs

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Technical Data RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs RF Power transistors designed for applications operating at 10 MHz. These devices are suitable for use in pulsed and CW applications. Typical Performance: V DD =50Volts,I DQ = 0 ma Document Number: MRF6V13250H Rev. 0, 6/11 MRF6V13250HR3 MRF6V13250HSR3 Signal Type Pulsed (0 μsec, % Duty Cycle) P out (W) f (MHz) G ps (db) η D (%) IRL (db) 250 Peak 10 22.7 57.0 -- 18 10 MHz, 250 W, 50 V LATERAL N -CHANNEL RF POWER MOSFETs Typical Performance: V DD =50Volts,I DQ =ma,t C =25 C Signal Type P out (W) f (MHz) G ps (db) η D (%) IRL (db) CW 2 CW 10 21.0 55.0 -- 17 Capable of Handling a Load Mismatch of :1 VSWR, @ 50 Vdc, 10 MHz at all Phase Angles 250 Watts Pulsed Peak Power, % Duty Cycle, 0 μsec CW Capable Features Characterized with Series Equivalent Large--Signal Impedance Parameters Internally Matched for Ease of Use Qualified Up to a Maximum of 50 V DD Operation Characterized from V to 50 V for Extended Power Range Integrated ESD Protection Greater Negative Gate--Source Voltage Range for Improved Class C Operation RoHS Compliant In Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 13 inch Reel. For R5 Tape and Reel options, see p. 12. Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS --0.5, +1 Vdc Gate--Source Voltage V GS --6.0, + Vdc Storage Temperature Range T stg -- 65 to +150 C Case Operating Temperature T C 150 C Operating Junction Temperature (1,2) T J 225 C Total Device Dissipation @ T C =25 C Derate above 25 C Table 2. Thermal Characteristics CASE 465-06, STYLE 1 NI -780 MRF6V13250HR3 CASE 465A -06, STYLE 1 NI -780S MRF6V13250HSR3 P D 476 2.38 W W/ C Characteristic Symbol Value (2,3) Unit Thermal Resistance, Junction to Case Pulsed: Case Temperature 65 C, 250 W Pulsed, 0 μsec Pulse Width, % Duty Cycle, 50 Vdc, I DQ = 0 ma, 10 MHz CW: Case Temperature 77 C, 235 W CW, 50 Vdc, I DQ = ma, 10 MHz Z θjc 0.07 R θjc 0.42 C/W 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1955., Inc., 11. All rights reserved. 1

Table 3. ESD Protection Characteristics Test Methodology Human Body Model (per JESD22--A114) Machine Model (per EIA/JESD22--A115) Charge Device Model (per JESD22--C1) Class 2 (Minimum) B (Minimum) IV (Minimum) Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) Drain--Source Breakdown Voltage (V GS =0Vdc,I D =50mA) Zero Gate Voltage Drain Leakage Current (V DS =50Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =90Vdc,V GS =0Vdc) On Characteristics Gate Threshold Voltage (V DS =Vdc,I D = 640 μadc) Gate Quiescent Voltage (V DD =50Vdc,I D = 0 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =Vdc,I D =1.58Adc) Dynamic Characteristics (1) Reverse Transfer Capacitance (V DS =50Vdc± mv(rms)ac @ 1 MHz, V GS =0Vdc) Output Capacitance (V DS =50Vdc± mv(rms)ac @ 1 MHz, V GS =0Vdc) Input Capacitance (V DS =50Vdc,V GS =0Vdc± mv(rms)ac @ 1 MHz) I GSS 1 μadc V (BR)DSS 1 Vdc I DSS μadc I DSS μadc V GS(th) 1.0 1.8 2.7 Vdc V GS(Q) 2.0 2.4 3.0 Vdc V DS(on) 0.1 0.25 0.3 Vdc C rss 1.2 pf C oss 58 pf C iss 340 pf Functional Tests (In Freescale Test Fixture, 50 ohm system) V DD =50Vdc,I DQ = 0 ma, P out = 250 W Peak (25 W Avg.), f = 10 MHz Pulsed, 0 μsec Pulse Width, % Duty Cycle Power Gain G ps 21.5 22.7 24.0 db Drain Efficiency η D 53.5 57.0 % Input Return Loss IRL -- 18 -- 9 db Typical Performance (In Freescale Test Fixture, 50 ohm system) V DD =50Vdc,I DQ =ma,p out = 2 W CW, f = 10 MHz, T C =25 C Power Gain G ps 21.0 db Drain Efficiency η D 55.0 % Input Return Loss IRL -- 17 db Load Mismatch (In Freescale Application Test Fixture, 50 ohm system) V DD =50Vdc,I DQ = 0 ma, P out = 250 W Peak (25 W Avg.), f = 10 MHz, Pulsed, 0 μsec Pulse Width, % Duty Cycle VSWR :1 at all Phase Angles Ψ No Degradation in Output Power 1. Part internally input matched. 2

V BIAS + C1 R1 Z Z19 + C2 C3 C4 Z18 C7 C8 C9 C C11 + C12 V SUPPLY RF INPUT Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z9 Z8 Z11 Z12 Z13 Z14 Z15 Z16 C6 Z17 RF OUTPUT C5 DUT Z Z21 + C18 C17 C16 C15 C14 C13 V SUPPLY Z1 0.447 x 0.063 Microstrip Z2 0.0 x 0.084 Microstrip Z3 0.1 x 0.063 Microstrip Z4 0.855 x 0.293 Microstrip Z5 0.369 x 0.825 Microstrip Z6 0.3 x 0.516 Microstrip Z7 0.5 x 0.5 Microstrip Z8 0.5 x 0.5 Microstrip Z9* 0.116 x 0.050 Microstrip Z 0.122 x 0.050 Microstrip Z11 0.162 x 1.160 Microstrip Z12 0.419 x 1.160 Microstrip Z13 0.468 x 0.994 Microstrip Z14 0.131 x 0.472 Microstrip Z15 0.264 x 0.222 Microstrip Z16 0.500 x0.111 Microstrip Z17 0.291 x 0.063 Microstrip Z18, Z 0.5 x 0.388 Microstrip Z19*, Z21* 0.854 x 0.052 Microstrip *Line length includes microstrip bends. Figure 1. MRF6V13250HR3(HSR3) Test Circuit Schematic 10 MHz Table 5. MRF6V13250HR3(HSR3) Test Circuit Component Designations and Values 10 MHz Part Description Part Number Manufacturer C1, C2 22 μf, 35 V Tantalum Capacitors T491X226K035AT Kemet C3, C11, C14 0.1 μf, 50 V Chip Capacitors CDR33BX4AKWS AVX C4, C6, C7, C18 0 pf Chip Capacitors ATC800B1JT500XT ATC C5 4.7 pf Chip Capacitor ATC0B4R7CT500XT ATC C8, C17 00 pf Chip Capacitors ATC0B2JT50XT ATC C9, C16 00 pf Chip Capacitors ATC700B2FT50XT ATC C, C15 K pf Chip Capacitors ATC0B3KT50XT ATC C12, C13 470 μf, 63 V Electrolytic Capacitors MCGPR63V477M13X26--RH Multicomp R1 15 Ω, 1/4 W Chip Resistor CRCW1615R0FKEA Vishay PCB 0.0, ε r =3.50 RO4350B Rogers 3

C3 C4 C7 C9 C11 C1 C2 R1 C8 C C12 C5 CUT OUT AREA C6 C18 C17 C15 C13 MRF6V13250H/HS Rev 3 C16 C14 Figure 2. MRF6V13250HR3(HSR3) Test Circuit Component Layout 10 MHz 4

TYPICAL CHARACTERISTICS PULSED C, CAPACITANCE (pf) 00 0 C iss C oss C rss Measured with ± mv(rms)ac @ 1 MHz V GS =0Vdc P out, OUTPUT POWER (dbm) PULSED 60 59 58 57 56 55 54 V DD =50Vdc,I DQ = 0 ma, f = 10 MHz Pulse Width = 0 μsec, Duty Cycle = % P1dB = 54.7 dbm (293 W) P2dB = 55.1 dbm (326 W) P3dB = 55.4 dbm (345 W) Ideal Actual 1 0 40 50 53 31 32 33 34 35 36 37 V DS, DRAIN--SOURCE VOLTAGE (VOLTS) P in, INPUT POWER (dbm) PULSED Figure 3. Capacitance versus Drain -Source Voltage Figure 4. Pulsed Output Power versus Input Power 24 23 V DD =50Vdc,I DQ = 0 ma, f = 10 MHz Pulse Width = 0 μsec Duty Cycle = % 70 60 25 23 G ps, POWER GAIN (db) 22 21 19 18 17 1 G ps η D 0 P out, OUTPUT POWER (WATTS) PULSED 50 40 0 500 Figure 5. Pulsed Power Gain and Drain Efficiency versus Output Power η D, DRAIN EFFICIENCY (%) G ps, POWER GAIN (db) 21 19 17 15 13 11 0 V 25 V V 35 V 40 V 45 V 50 0 150 0 250 0 350 400 P out, OUTPUT POWER (WATTS) PULSED Figure 6. Pulsed Power Gain versus Output Power V DD =50V I DQ = 0 ma, f = 10 MHz Pulse Width = 0 μsec Duty Cycle = % η D, DRAIN EFFICIENCY (%) 70 60 50 40 0 V 25 V V 35 V 40 V 45 V V DD =50V I DQ = 0 ma, f = 10 MHz Pulse Width = 0 μsec Duty Cycle = % 50 0 150 0 250 0 350 400 P out, OUTPUT POWER (WATTS) PULSED G ps, POWER GAIN (db) 24 23 22 21 19 18 17 3 V DD =50Vdc I DQ = 0 ma f = 10 MHz Pulse Width = 0 μsec Duty Cycle = % T C =--_C 25_C 85_C G ps η D 0 85_C 25_C P out, OUTPUT POWER (WATTS) PULSED --_C 70 60 50 40 0 500 η D, DRAIN EFFICIENCY (%) Figure 7. Pulsed Efficiency versus Output Power Figure 8. Pulsed Power Gain and Drain Efficiency versus Output Power 5

G ps, POWER GAIN (db) 24 23 22 21 19 TYPICAL CHARACTERISTICS CW G ps 18 η D 17 25 V DD =50Vdc 16 I DQ =ma 15 f = 10 MHz 15 T 14 C =25 C 0 400 P out, OUTPUT POWER (WATTS) CW Figure 9. CW Power Gain and Drain Efficiency versus Output Power 60 55 50 45 40 35 η D, DRAIN EFFICIENCY (%) G ps, POWER GAIN (db) 25 24 23 22 21 19 18 17 16 I DQ = 700 ma 500 ma 350 ma 0 ma ma P out, OUTPUT POWER (WATTS) CW V DD =50Vdc f = 10 MHz T C =25 C 0 400 Figure. CW Power Gain versus Output Power η D, DRAIN EFFICIENCY (%) 60 55 50 45 40 35 25 15 0 0 ma P out, OUTPUT POWER (WATTS) CW ma 350 ma 500 ma I DQ = 700 ma V DD =50Vdc f = 10 MHz T C =25 C Figure 11. CW Efficiency versus Output Power 400 9 8 MTTF (HOURS) 7 6 5 4 90 1 1 150 170 190 2 2 T J, JUNCTION TEMPERATURE ( C) This above graph displays calculated MTTF in hours when the device is operated at V DD =50Vdc,P out = 2 W CW, and η D = 55%. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. Figure 12. MTTF versus Junction Temperature CW 250 6

Z o =Ω Z source Z load f = 10 MHz f = 10 MHz f MHz V DD =50Vdc,I DQ = 0 ma, P out = 250 W Peak Z source Ω Z load Ω 10 5.32 + j4.11 1.17 + j1.48 Z source = Test circuit impedance as measured from gate to ground. Z load = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 13. Series Equivalent Source and Load Impedance Pulsed 7

PACKAGE DIMENSIONS 8

9

11

PRODUCT DOCUMENTATION AND SOFTWARE Refer to the following documents and software to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model.s2p File For Software, do a Part Number search at http://www.freescale.com, and select the Part Number link. Go to the Software & Tools tab on the part s Product Summary page to download the respective tool. R5 Suffix = 50 Units, 56 mm Tape Width, 13 inch Reel. R5 TAPE AND REEL OPTION The R5 tape and reel option for MRF6V13250H and MRF6V13250HS parts will be available for 2 years after release of MRF6V13250H and MRF6V13250HS., Inc. reserves the right to limit the quantities that will be delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased these devices in the R5 tape and reel option will be offered MRF6V13250H and MRF6V13250HS in the R3 tape and reel option. The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description 0 June 11 Initial Release of Data Sheet 12

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