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Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

FDMS77S Dual N-Channel PowerTrench MOSFET N-Channel: 3 V, 3 A, 7.5 mω N-Channel: 3 V, 4 A,.4 mω Features : N-Channel Max r DS(on) = 7.5 mω at V GS = V, I D = A Max r DS(on) = mω at V GS = 4.5 V, I D = A : N-Channel Max r DS(on) =.4 mω at V GS = V, I D = A Max r DS(on) =.9 mω at V GS = 4.5 V, I D = 8 A RoHS Compliant General Description May 4 This device includes two specialized N-Channel MOSFETs in a dual MLP package.the switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET () and synchronous SyncFET TM () have been designed to provide optimal power efficiency. Applications Computing Communications General Purpose Point of Load Notebook VCORE FDMS77S Dual N-Channel PowerTrench MOSFET D DD D S/D S SS G S S S 5 7 Q 4 3 D D D Top Power 5 G Bottom G 8 Q G MOSFET Maximum Ratings T A = 5 C unless otherwise noted Symbol Parameter Units V DS Drain to Source Voltage 3 3 V V GS Gate to Source Voltage (Note 3) ± ± V I D -Continuous T A = 5 C a b Drain Current -Continuous T C = 5 C 3 4 Thermal Characteristics -Pulsed 4 P D Power Dissipation for Single Operation T A = 5 C. a.5 b W T A = 5 C. c. d T J, T STG Operating and Storage Junction Temperature Range -55 to +5 C A R θja Thermal Resistance, Junction to Ambient 57 a 5 b R θja Thermal Resistance, Junction to Ambient 5 c d C/W R θjc Thermal Resistance, Junction to Case 3.5 Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS77S FDMS77S Power 5 3 mm 3 units 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Electrical Characteristics T J = 5 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BV DSS ΔBV DSS ΔT J Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient I D = 5 μa, V GS = V I D = ma, V GS = V I D = 5 μa, referenced to 5 C I D = ma, referenced to 5 C I DSS Zero Gate Voltage Drain Current V DS = 4 V, V GS = V I GSS Gate to Source Leakage Current V GS = V, V DS = V On Characteristics V GS(th) ΔV GS(th) ΔT J r DS(on) g FS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Transconductance V GS = V DS, I D = 5 μa V GS = V DS, I D = ma I D = 5 μa, referenced to 5 C I D = ma, referenced to 5 C V GS = V, I D = A V GS = 4.5 V, I D = A V GS = V, I D = A, T J = 5 C V GS = V, I D = A V GS = 4.5 V, I D = 8 A V GS = V, I D = A, T J = 5 C V DS = 5 V, I D = A V DS = 5 V, I D = A 3 3 5 4.8.5 - -4. 8.5 8.3.9.. 3 5 3 3 7.5.4.9 3.4 V mv/ C μa μa na na V mv/ C mω S FDMS77S Dual N-Channel PowerTrench MOSFET Dynamic Characteristics C iss Input Capacitance : V DS = 5 V, V GS = V, f = MHZ C oss C rss R g Output Capacitance Reverse Transfer Capacitance Gate Resistance : V DS = 5 V, V GS = V, f = MHZ 35 74 445 9 45 85.9.8 75 93 358 7 8 pf pf pf Ω Switching Characteristics t d(on) t r t d(off) t f Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time : V DD = 5 V, I D = A, R GEN = Ω : V DD = 5 V, I D = A, R GEN = Ω Q g Total Gate Charge V GS = V to V V DD = 5 V, Q g Total Gate Charge V GS = V to 4.5 V I D = A Q gs Q gd Gate to Source Gate Charge Gate to Drain Miller Charge V DD = 5 V, I D = A 8..5 9. 58.3.8 5 9.3 48 4.3 9. 8 34 8 3 93 4 8 47 3 7 ns ns ns ns nc nc nc nc 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Electrical Characteristics T J = 5 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics V SD Source to Drain Diode Forward Voltage V GS = V, I S = A (Note ) V GS = V, I S = A (Note ) t rr Q rr Reverse Recovery Time Reverse Recovery Charge I F = A, di/dt = A/μs I F = A, di/dt = 3 A/μs Notes: : R θja is determined with the device mounted on a in pad oz copper pad on a.5 x.5 in. board of FR-4 material. R θjc is guaranteed by design while R θca is determined by the user's board design. a. 57 C/W when mounted on a in pad of oz copper c. 5 C/W when mounted on a minimum pad of oz copper.8.7 7 53 b. 5 C/W when mounted on a in pad of oz copper d. C/W when mounted on a minimum pad of oz copper.. 43 85 8 V ns nc FDMS77S Dual N-Channel PowerTrench MOSFET : Pulse Test: Pulse Width < 3 μs, Duty cycle <.%. 3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( N-Channel)T J = 5 C unless otherwise noted ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 4 3 V GS = 3.5 V PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX..5..5. V DS, DRAIN TO SOURCE VOLTAGE (V)..4.. Figure. I D = A V GS = V V GS = V V GS = 4.5 V V GS = 4 V V GS = V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3 4 I D, DRAIN CURRENT (A) On Region Characteristics Figure. Normalized On-Resistance vs Drain Current and Gate Voltage.8-75 -5-5 5 5 75 5 5 T J, JUNCTION TEMPERATURE ( o C) rds(on), DRAIN TO SOURCE ON-RESISTANCE (mω) 4 3 4 3 V GS = 3.5 V T J = 5 o C PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V GS = 4 V V GS = V I D = A V GS = 4.5 V V GS = V PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX T J = 5 o C 4 8 V GS, GATE TO SOURCE VOLTAGE (V) FDMS77S Dual N-Channel PowerTrench MOSFET Figure 3. Normalized On Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage I D, DRAIN CURRENT (A) 4 3 PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V DS = 5 V T J = 5 o C T J = 5 o C T J = -55 o C.5..5 3. 3.5 4. V GS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics IS, REVERSE DRAIN CURRENT (A) 4.. V GS = V T J = 5 o C T J = 5 o C T J = -55 o C....4..8.. V SD, BODY DIODE FORWARD VOLTAGE (V) Figure. Source to Drain Diode Forward Voltage vs Source Current 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( N-Channel)T J = 5 C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE (V) I D, DRAIN CURRENT (A) 8 4 I D = A 5 5 Q g, GATE CHARGE (nc) Figure 7. 4 V GS = 4.5 V V DD = V V DD = V V DD = 5 V f = MHz V GS = V. 3 V DS, DRAIN TO SOURCE VOLTAGE (V) Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage Limited by Package V GS = V R θjc = 3.5 o C/W 5 5 75 5 5 T C, CASE TEMPERATURE ( o C) CAPACITANCE (pf) ID, DRAIN CURRENT (A) C iss C oss C rss us ms THIS AREA IS ms LIMITED BY r DS(on) ms. SINGLE PULSE s T J = MAX RATED s R θja = 5 o C/W DC T A = 5 o C... V DS, DRAIN to SOURCE VOLTAGE (V) FDMS77S Dual N-Channel PowerTrench MOSFET Figure 9. Maximum Continuous Drain Current vs Case Temperature Figure. Forward Bias Safe Operating Area P (PK), PEAK TRANSIENT POWER (W) SINGLE PULSE R θja = 5 o C/W T A = 5 o C.5-4 -3 - - t, PULSE WIDTH (s) Figure. Single Pulse Maximum Power Dissipation 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( N-Channel)T J = 5 C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, Z θja.. DUTY CYCLE-DESCENDING ORDER D =.5...5.. SINGLE PULSE R θja = 5 o C/W (Note c). -4-3 - - t, RECTANGULAR PULSE DURATION (sec) Figure. Junction-to-Ambient Transient Thermal Response Curve P DM t t NOTES: DUTY FACTOR: D = t /t PEAK T J = P DM x Z θja x R θja + T A FDMS77S Dual N-Channel PowerTrench MOSFET 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( SyncFET) ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 5 4 3 V GS = 4.5 V V GS = 3.5 V V GS = 3 V V GS =.5 V V GS = V PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX..4..8. V DS, DRAIN TO SOURCE VOLTAGE (V)..4...8 Figure 3. On-Region Characteristics I D = A V GS = V. -75-5 -5 5 5 75 5 5 T J, JUNCTION TEMPERATURE ( o C) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 5 4 3 V GS =.5 V V GS = 3 V PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V GS = 3.5 V V GS = 4.5 V V GS = V 3 4 5 I D, DRAIN CURRENT (A) Figure 4. Normalized on-resistance vs Drain Current and Gate Voltage rds(on), DRAIN TO SOURCE ON-RESISTANCE (mω) 8 4 T J = 5 o C PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX I D = A T J = 5 o C 4 8 V GS, GATE TO SOURCE VOLTAGE (V) FDMS77S Dual N-Channel PowerTrench MOSFET Figure 5. Normalized On-Resistance vs Junction Temperature Figure. On-Resistance vs Gate to Source Voltage I D, DRAIN CURRENT (A) 5 4 3 PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V DS = 5 V T J = 5 o C T J = 5 o C T J = -55 o C IS, REVERSE DRAIN CURRENT (A).. V GS = V T J = 5 o C T J = -55 o C T J = 5 o C..5..5 3. V GS, GATE TO SOURCE VOLTAGE (V) Figure 7. Transfer Characteristics...4..8. V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 8. Source to Drain Diode Forward Voltage vs Source Current 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( SyncFET) VGS, GATE TO SOURCE VOLTAGE (V) I D, DRAIN CURRENT (A) 8 4 I D = A V DD = V V DD = V 4 8 5 Q g, GATE CHARGE (nc) V DD = 5 V Figure 9. Gate Charge Characteristics 5 V GS = 4.5 V Limited by Package V GS = V R θjc = o C/W 5 5 75 5 5 T C, CASE TEMPERATURE ( o C) CAPACITANCE (pf) ID, DRAIN CURRENT (A) 3 f = MHz V GS = V C iss C oss C rss. V DS, DRAIN TO SOURCE VOLTAGE (V). Figure. Capacitance vs Drain to Source Voltage THIS AREA IS LIMITED BY r DS(on) SINGLE PULSE T J = MAX RATED R θja = o C/W T A = 5 o C ms ms s... V DS, DRAIN to SOURCE VOLTAGE (V) s DC 3 ms FDMS77S Dual N-Channel PowerTrench MOSFET Figure. Maximum Continuous Drain Current vs Case Temperature Figure. Forward Bias Safe Operating Area P (PK), PEAK TRANSIENT POWER (W) SINGLE PULSE R θja = o C/W T A = 5 o C.5-3 - - t, PULSE WIDTH (s) Figure 3. Single Pulse Maximum Power Dissipation 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics ( SyncFET) NORMALIZED THERMAL IMPEDANCE, Z θja. DUTY CYCLE-DESCENDING ORDER D =.5...5... t t SINGLE PULSE NOTES: R θja = o DUTY FACTOR: D = t C/W /t PEAK T J = P DM x Z θja x R θja + T A. (Note d) -3 - - t, RECTANGULAR PULSE DURATION (s) Figure 4. Junction-to-Ambient Transient Thermal Response Curve P DM FDMS77S Dual N-Channel PowerTrench MOSFET 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

Typical Characteristics (continued) SyncFET TM Schottky Body Diode Characteristics Fairchild s SyncFET TM process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 5 shows the reverse recovery characteristic of the FDMS77S. CURRENT (A) 9 3-3 didt = 3 A/μs - 5 5 3 TIME (ns) Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. I DSS, REVERSE LEAKAGE CURRENT (A) - - -3-4 T J = 5 o C T J = o C T J = 5 o C -5 5 5 5 3 V DS, REVERSE VOLTAGE (V) FDMS77S Dual N-Channel PowerTrench MOSFET Figure 5. FDMS77S SyncFET TM Body Diode Reverse Recovery Characteristic Figure. SyncFET TM Body Diode Reverse Leakage vs. Drain-Source Voltage 9 Fairchild Semiconductor Corporation FDMS77S Rev.C

X.5 C 5. A B 4.4 8 7.7 5.5.3(5X)..5.4.7.54.3 PIN# IDENT X.5 C.9.. C.8 C.5±.5.75±.5 SIDE VIEW C SEATING PLANE.±.5.5 (5X) 3 4 4. RECOMMENDED LAND PATTERN (OPTION - FUSED LEADS 5,,7) (.34)4X PIN# IDENT (.) 5.±.5 3.8±.5 3 4.43±.5(5X).9±.5.3(8X) 8 7 4.4.7 5.5(8X).4.55±.5.±.5.7.7±.5.54.3..45.9.5±.5(5X). C A B.5 C NOTES: 8.7 3.8±.5 BOTTOM VIEW A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y4.5M, 9. D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. 7 5 3 4 4. RECOMMENDED LAND PATTERN (OPTION - ISOLATED LEADS) E. DRAWING FILENAME: MKT-MLP8Prev.

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