Document Category: Product Specification UltraCMOS, 1 MHz8 GHz Features High isolation: @ 6 GHz Low insertion loss: 1.1 @ 6 GHz Fast switching time of 227 ns Power handling of m CW Logic select (LS) pin provides maximum control logic flexibility Terminated all-off state mode Packaging -lead 4 4.85 mm QFN Applications Wireless infrastructure Wireless applications up to 8 GHz Filter bank switching RF signal routing Figure 1 PE482 Functional Diagram RF1 RF2 RF3 RF4 RFC CMOS Control Driver and ESD V1 V2 V3 V4 RF8 RF7 RF6 RF5 switch configuration Ω Product Description The PE482 is a HaRP technology-enhanced absorptive SP8T RF switch that supports a frequency range from 1 MHz to 8 GHz. It delivers high isolation, low insertion loss and fast switching time, making this device ideal for filter bank switching and RF signal routing in wireless infrastructure and wireless applications up to 8 GHz. No blocking capacitors are required if DC voltage is not present on the RF ports. The PE482 is manufactured on Peregrine s UltraCMOS process, a patented advanced form of silicon-oninsulator (SOI) technology. Peregrine s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. 217, Peregrine Semiconductor Corporation. All rights reserved. Headquarters: 9 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-785-3 (3/217)
Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE482 Parameter/Condition Min Max Unit Supply voltage, V DD.3 5.5 V Digital input voltage (V1, V2, V3, V4, LS).3 3.6 V RF input power (RFCRFX, Ω) See Figure 2 m RF input power into terminated ports, CW (1) (RFX, Ω) See Figure 2 m Maximum junction temperature +1 C Storage temperature range +1 C ESD voltage HBM, all pins (2) 1 V ESD voltage CDM, all pins (3) 1 V Notes: 1) 1% duty cycle, all bands, Ω. 2) Human body model (MIL-STD 883 Method 3). 3) Charged device model (JEDEC JESD22-C11). Page 2 DOC-785-3 (3/217)
Recommended Operating Conditions Table 2 lists the recommended operating conditions for the PE482. Devices should not be operated outside the recommended operating conditions listed below. Table 2 Recommended Operating Conditions for PE482 Parameter Min Typ Max Unit Supply voltage, V DD 2.3 3.3 5.5 V Supply current, I DD 12 2 µa Digital input high (V1, V2, V3, V4, LS) 1.17 3.6 V Digital input low (V1, V2, V3, V4, LS).3.6 V Digital input current V1, V2, V3, V4 LS 5 1 µa µa RF input power, CW (RFCRFX) (1) See Figure 2 m RF input power, pulsed (RFCRFX) (2) See Figure 2 m RF input power into terminated ports, CW (RFX) (1) See Figure 2 m Operating temperature range +25 + C Notes: 1) 1% duty cycle, all bands, Ω. 2) Pulsed, 5% duty cycle of 2 µs period, Ω. DOC-785-3 (3/217) Page 3
Electrical Specifications Table 3 provides the PE482 key electrical specifications at +25 C,V DD = 3.3V (Z S = Z L = Ω), unless otherwise specified. Table 3 PE482 Electrical Specifications Parameter Path Condition Min Typ Max Unit Operating frequency 1 MHz 8 GHz As shown RFCRF1/8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz.7.8.9.9 1.1 1.6.9 1. 1.2 1.5 1.9 2.8 Insertion loss (1) RFCRF2/7 RFCRF3/6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz.8.9.9 1. 1.3 1.3.8.9 1. 1.1 1.2 1.3 1. 1.1 1.3 1.6 2.3 2.4 1. 1.1 1.3 1.7 2.2 2.2 RFCRF4/5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz.9 1.1 1.2 1.3 1.4 1.5 1.1 1.3 1.6 1.9 2.2 2.8 Page 4 DOC-785-3 (3/217)
Table 3 PE482 Electrical Specifications (Cont.) Parameter Path Condition Min Typ Max Unit RFCRF1/8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 61 29 25 32 3 Isolation (1) RFCRF2/7 RFCRF3/6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 3 29 29 48 31 RFCRF4/5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 81 85 62 48 DOC-785-3 (3/217) Page 5
Table 3 PE482 Electrical Specifications (Cont.) Parameter Path Condition Min Typ Max Unit RFCRF1/8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 25 21 26 13 Return loss (active port) RFCRF2/7 RFCRF3/6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 23 2 18 23 18 12 12 RFCRF4/5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 23 17 18 Page 6 DOC-785-3 (3/217)
Table 3 PE482 Electrical Specifications (Cont.) Parameter Path Condition Min Typ Max Unit RFCRF1/8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 25 23 23 12 Return loss (RFC port) RFCRF2/7 RFCRF3/6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 23 21 19 2 18 23 19 13 13 RFCRF4/5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 22 18 17 17 DOC-785-3 (3/217) Page 7
Table 3 PE482 Electrical Specifications (Cont.) Parameter Path Condition Min Typ Max Unit RF1/8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 18 21 Return loss (terminated port) RF2/7 RF3/6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 18 19 19 RF4/5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 23 RF2RF1 (RF7RF8) 1 GHz 2 GHz 4 GHz 6 GHz 8 GHz 2.6 4.7 7.5 9.4 1.4 1.3 2.4 3.4 2.8 4.4.1.8 3.8 1.1 Relative insertion phase (2) RF3RF1 (RF6RF8) 1 GHz 2 GHz 4 GHz 6 GHz 8 GHz 3. 5.8 9.3 11.2 1.2 2.1 4. 5.6 5.7 1. 1.3 2.1 1.9.3 8.2 RF4RF1 (RF5RF8) 1 GHz 2 GHz 4 GHz 6 GHz 8 GHz 6.9 13.3.7.8.3 5.6 1.7 18.9 26.3 31.5 4.3 8.2 13..9 17.6 Input 1 compression point (3) RFCRFX See Figure 2 m Input.1 compression point (3) RFCRFX See Figure 2 m Page 8 DOC-785-3 (3/217)
Table 3 PE482 Electrical Specifications (Cont.) Parameter Path Condition Min Typ Max Unit Input IP2 RFCRFX 1 MHz8 GHz m Input IP3 RFCRFX 1 MHz8 GHz 6 m RF T RISE /T FALL 1%/9% RF 1 13 ns Settling time % CTRL to.5 final value 87 1 ns Switching time % CTRL to 9% or 1% of RF 227 29 ns Notes: 1) Insertion loss and isolation performance can be improved by a good RF ground on the LS pin (pin 1). 2) Defined with S-parameters, relative insertion phase (RFXRF1) = S (x+1)1 S 21, where incident Port-1 is RFC, response Port-2 = RF1, and response Port-(x+1) = RFx. 3) The input 1 and.1 compression point are linearity figures of merit. Refer to Table 2 for the RF input power (Ω). Switching Frequency The PE482 has a maximum 25 khz switching frequency. Switching frequency describes the time duration between switching events. Switching time is the time duration between the point the control signal reached % of the final value and the point the output signal reaches within 1% or 9% of its target value. Spurious Performance The PE482 spur fundamental occurs around 5 MHz. Its typical performance is 2 m/hz, with 3 khz bandwidth. Hot-Switching Capability The maximum hot switching capability of the PE482 is 2 m above 1 MHz. Hot switching occurs when RF power is applied while switching between RF ports. Thermal Data Psi-JT (Ψ JT ), junction top-of-package, is a thermal metric to estimate junction temperature of a device on the customer application PCB (JEDEC JESD-2). Ψ JT = (T J T T )/P where Ψ JT = junction-to-top of package characterization parameter, C/W T J = die junction temperature, C T T = package temperature (top surface, in the center), C P = power dissipated by device, Watts Table 4 Thermal Data for PE482 Parameter Typ Unit Ψ JT 23 C/W Θ JA, junction-to-ambient thermal resistance C/W DOC-785-3 (3/217) Page 9
Control Logic Table 5 provides the control logic truth table for PE482. Table 5 Truth Table for PE482 LS (1) V4 V3 V2 V1 RFCRF1 RFCRF2 RFCRF3 RFCRF4 RFCRF5 RFCRF6 RFCRF7 RFCRF8 ON OFF OFF OFF OFF OFF OFF OFF 1 OFF ON OFF OFF OFF OFF OFF OFF 1 OFF OFF ON OFF OFF OFF OFF OFF 1 1 OFF OFF OFF ON OFF OFF OFF OFF 1 OFF OFF OFF OFF ON OFF OFF OFF 1 1 OFF OFF OFF OFF OFF ON OFF OFF 1 1 OFF OFF OFF OFF OFF OFF ON OFF 1 1 1 OFF OFF OFF OFF OFF OFF OFF ON 1 1 1 1 ON OFF OFF OFF OFF OFF OFF OFF 1 1 1 OFF ON OFF OFF OFF OFF OFF OFF 1 1 1 OFF OFF ON OFF OFF OFF OFF OFF 1 1 OFF OFF OFF ON OFF OFF OFF OFF 1 1 1 OFF OFF OFF OFF ON OFF OFF OFF 1 1 OFF OFF OFF OFF OFF ON OFF OFF 1 1 OFF OFF OFF OFF OFF OFF ON OFF 1 OFF OFF OFF OFF OFF OFF OFF ON X (2) 1 OFF OFF OFF OFF OFF OFF OFF OFF Notes: 1) LS has an internal 1 MΩ pull-up resistor to logic high. Connect LS to GND externally to generate a logic. Leaving LS floating will generate a logic 1. 2) LS = don t care, V4 = 1, V3 = V2 = V1 =, all ports are terminated to provide an all isolated state. Page 1 DOC-785-3 (3/217)
Power De-rating Curve Figure 2 shows the power de-rating curve showing P1 compression, P.1 compression, maximum RF input power (pulsed), maximum RF input power (CW), absolute maximum RF terminated power (CW), and maximum RF terminated power (CW). Figure 2 Power De-rating Curve, 1 MHz8 GHz, C to + C Ambient, Ω Input Power (m) P1 Compression @ 25 C Ambient/Abs. Max. RF Input Power P.1 Compression @ 25 C Max. RF Input Power, Pulsed Max. RF Input Power, CW Abs. Max. RF Terminated Power, CW Max. RF Terminated Power, CW 3 25 2 1 5 1 1 1 1 Frequency (MHz) DOC-785-3 (3/217) Page 11
Isolation Matrix Table 6 provides RFC-to-port isolation and Table 7 provides port-to-port isolation at +25 C, V DD = 3.3V (Z S = Z L = Ω). Table 6 RFC-to-Port Isolation ON Port Frequency Isolation () RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 RF1 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 62 48 37 48 31 85 62 44 91 74 88 6 54 87 58 79 42 RF2 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 32 3 6 43 37 9 62 54 91 74 88 6 86 77 42 RF3 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 42 31 44 86 42 91 74 88 6 85 77 42 RF4 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 32 44 9 75 89 59 85 76 44 RF5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 73 37 84 61 43 89 59 48 9 75 61 48 44 RF6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 73 37 84 62 44 88 59 93 73 61 85 48 37 Page 12 DOC-785-3 (3/217)
Table 6 RFC-to-Port Isolation (Cont.) ON Port Frequency Isolation () RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 RF7 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 73 37 84 62 43 89 59 92 73 61 88 6 44 RF8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 74 37 84 62 42 87 6 93 73 6 85 42 54 48 31 6 Table 7 Port-to-Port Isolation ON Port Frequency Isolation () RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 RF1 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 31 29 3 84 59 43 91 75 7 89 89 71 6 88 6 43 RF2 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 32 29 3 27 78 43 9 75 58 91 7 58 92 75 89 74 72 RF3 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 37 3 3 94 75 7 9 7 58 92 78 72 91 8 79 54 54 RF4 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 42 44 3 28 9 71 61 54 89 58 89 78 71 91 79 8 54 54 DOC-785-3 (3/217) Page 13
Table 7 Port-to-Port Isolation (Cont.) ON Port Frequency Isolation () RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 RF5 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 88 79 91 8 73 89 7 58 9 71 61 44 3 28 RF6 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 9 77 92 82 75 89 7 58 91 75 7 59 3 42 32 31 32 RF7 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 92 85 7 48 92 77 72 89 7 58 9 76 71 59 78 44 3 27 29 3 RF8 11 MHz 1 MHz1 GHz 12 GHz GHz GHz GHz 87 42 91 73 61 88 9 75 7 59 82 59 54 43 3 29 29 Page 14 DOC-785-3 (3/217)
Typical Performance Data PE482 Figure 3Figure 2 show the typical performance data at +25 C,V DD = 3.3V (Z S = Z L = Ω), unless otherwise specified. Figure 3 Insertion Loss vs. Frequency (RFCRFX) Figure 5 Insertion Loss vs. Frequency Over V DD (RFCRF1) Insertion Loss () RFC-RF1 RFC-RF3 RFC-RF5 RFC-RF7-1 -2-3 -4-5 -6-7 -8 2 4 6 8 RFC-RF2 RFC-RF4 RFC-RF6 RFC-RF8 Insertion Loss () -1-2 -3-4 -5-6 -7-8 2.3V 3.3V 5.5V 2 4 6 8 Figure 4 Insertion Loss vs. Frequency Over Temperature (RFCRF1) Figure 6 RFC Port Return Loss vs. Frequency Insertion Loss () - C +25 C +85 C + C -1-2 -3-4 -5-6 -7-8 2 4 6 8 Return Loss () -1-2 -3 - - -6 RF1 On RF2 On RF3 On RF4 On RF5 On RF6 On RF7 On RF8 On 2 4 6 8 DOC-785-3 (3/217) Page
Figure 7 RFC Port Return Loss vs. Frequency Over Temperature (RF1 On) Figure 1 RF1 Active Port Return Loss vs. Frequency Over Temperature - C +25 C +85 C + C - C +25 C +85 C + C Return Loss () -1-2 -3 - - Return Loss () -1-2 -3 - - -6 2 4 6 8-6 2 4 6 8 Figure 8 RFC Port Return Loss vs. Frequency Over V DD (RF1 On) Figure 11 RF1 Active Port Return Loss vs. Frequency Over V DD 2.3V 3.3V 5.5V 2.3V 3.3V 5.5V Return Loss () -1-2 -3 - - Return Loss () -1-2 -3 - - -6 2 4 6 8-6 2 4 6 8 Figure 9 Active Port Return Loss vs. Frequency Figure 12 Terminated Port Return Loss vs. Frequency (RF1 On) Return Loss () -1-2 -3 - - -6 RF1 RF2 RF3 RF4 RF5 RF6 RF7 RF8 1 2 3 4 5 6 7 8 Return Loss () RF2 RF3 RF4 RF5 RF6 RF7 RF8-1 -2-3 - - -6-7 -8 2 4 6 8 Page DOC-785-3 (3/217)
Figure 13 RF2 Terminated Port Return Loss vs. Frequency Over Temperature (RF1 On) Figure Isolation vs.frequency Over V DD (RF1RF2, RF1 On) - C +25 C +85 C + C 2.3V 3.3V 5.5V Return Loss () -1-2 -3 - - -6-7 -8 2 4 6 8 Isolation () -1-2 -3 - - -6-7 -8 2 4 6 8 Figure 14 RF2 Terminated Port Return Loss vs. Frequency Over V DD (RF1 On) Figure 17 Isolation vs. Frequency Over Temperature (RFCRF2, RF1 On) 2.3V 3.3V 5.5V - C +25 C +85 C + C Return Loss () -1-2 -3 - - -6-7 -8 2 4 6 8 Isolation () -1-2 -3 - - -6-7 -8 2 4 6 8 Figure Isolation vs. Frequency Over Temperature (RF1RF2, RF1 On) Figure 18 Isolation vs. Frequency Over V DD (RFCRF2, RF1 On) Isolation () -1-2 -3 - - -6-7 -8 - C +25 C +85 C + C 2 4 6 8 Isolation () -1-2 -3 - - -6-7 -8 2.3V 3.3V 5.5V 2 4 6 8 DOC-785-3 (3/217) Page 17
Figure 19 IIP2 vs. RF Port Measured Figure 2 IIP3 vs. RF Port Measured IIP2 (m) 1 13 12 11 1 9 8 8 MHz IIP2 2 GHz IIP2 4 GHz IIP2 8 GHz IIP2 1 2 3 4 5 6 7 8 RF Port Measured IIP3 (m) 8 75 7 6 8 MHz IIP3 2 GHz IIP3 4 GHz IIP3 8 GHz IIP3 1 2 3 4 5 6 7 8 RF Port Measured Page 18 DOC-785-3 (3/217)
Evaluation Kit The high-throw count RF switch evaluation kit (EVK) includes hardware required to control and evaluate the functionality of the high-throw count switches. The high-throw count RF switch evaluation software can be downloaded at and requires a PC running Windows operating system to control the USB interface board. Refer to the Multi-throw Count RF Switch Evaluation Kit (EVK) User s Manual for more information. Figure 21 Evaluation Board Layout for PE482 DOC-785-3 (3/217) Page 19
Pin Information This section provides pinout information for the PE482. Figure 22 shows the pin map of this device for the available package. Table 8 provides a description for each pin. Figure 22 Pin Configuration (Top View) Table 8 Pin Descriptions for PE482 Pin No. Pin Name 1 LS 2 RF2 (1) RF port 2 Description Logic Select used to determine the definition for V1, V2, V3 and V4 pins Pin 1 Dot Marking RF1 GND 23 RFC 22 GND 21 NC 2 RF8 19 3, 5, 7, 14,, 18, 21, 23 GND Ground LS RF2 GND RF3 GND RF4 1 2 3 4 5 6 Exposed Ground Pad 18 17 14 13 GND RF7 GND RF6 GND RF5 4 RF3 (1) RF port 3 6 RF4 (1) RF port 4 8 V DD Supply voltage (nominal 3.3V) 9 V1 Digital control logic input 1 1 V2 Digital control logic input 2 11 V3 Digital control logic input 3 12 V4 Digital control logic input 4 7 8 9 1 11 12 13 RF5 (1) RF port 5 GND V DD V1 V2 V3 V4 RF6 (1) RF port 6 17 RF7 (1) RF port 7 19 RF8 (1) RF port 8 2 NC (2) No connect 22 RFC (1) RF common port RF1 (1) RF port 1 Pad GND Exposed pad: ground for proper operation Notes: 1) RF pins 2, 4, 6, 13,, 17, 19, 22, and must be at VDC. The RF pins do not require DC blocking capacitors for proper operation if the VDC requirement is met. 2) Pin 2 (NC) can be connected to GND or left not connected externally. Page 2 DOC-785-3 (3/217)
Packaging Information PE482 This section provides packaging data including the moisture sensitivity level, package drawing, package marking and tape-and-reel information. Moisture Sensitivity Level The moisture sensitivity level rating for the PE482 in the -lead 4 4.85 mm QFN package is MSL1. Package Drawing Figure 23 Package Mechanical Drawing for -lead 4 4.85 mm QFN B A 4..1 C (2X). (x2) 12 2.7±.5 13 18 19.±.5 (x).6 (x).3 (x). (x2) 4. 2.7±.5 2.75 4..1 C (2X) Pin #1 Corner.25±.5 (x) 7 6 2. Ref. 1 Chamfer.3 x 2.75 4. TOP VIEW BOTTOM VIEW RECOMMENDED LAND PATTERN.1 C.5 C SEATING PLANE.85±.5.1 C A B.5 C ALL FEATURES.23 Ref. SIDE VIEW.5 C Top-Marking Specification Figure Package Marking Specifications for PE482 482 YYWW ZZZZZZ = YY = WW = ZZZZZZ = Pin 1 indicator Last two digits of assembly year Assembly work week Assembly lot code (Maximum six characters) DOC-785-3 (3/217) Page 21
Tape and Reel Specification Figure 25 Tape and Reel Specifications for -lead 4 4.85 mm QFN Direction of Feed Section A-A T P see note 1 P1 P2 see note 3 D1 D A E F see note 3 B K A A W A B K D D1 E F P P1 P2 T W 4. 4. 1.1 1. +.1/ -. 1. min 1.75 ±.1 5. ±.5 4. 8. 2. ±.5.3 ±.5 12. ±.3 Notes: 1. 1 Sprocket hole pitch cumulative tolerance ±.2 2. Camber in compliance with EIA 481 3. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole Dimensions are in millimeters unless otherwise specified Pin 1 Device Orientation in Tape Page 22 DOC-785-3 (3/217)
Ordering Information Table 9 lists the available ordering codes for the PE482 as well as available shipping methods. Table 9 Order Codes for PE482 Order Codes Description Packaging Shipping Method PE482A-X PE482 SP8T RF switch Green -lead 4 4 mm QFN units/t&r EK482-2 PE482 Evaluation kit Evaluation kit 1/Box Document Categories Advance Information The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). Sales Contact For additional information, contact Sales at sales@psemi.com. Disclaimers The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party. Peregrine s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. Patent Statement Peregrine products are protected under one or more of the following U.S. patents: patents.psemi.com Copyright and Trademark 217, Peregrine Semiconductor Corporation. All rights reserved. The Peregrine name, logo, UTSi and UltraCMOS are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Product Specification DOC-785-3 (3/217)