Precision Gain of 5 Instrumentation Amplifier AD8225

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Precision Gain of Instrumentation Amplifier AD8 FEATURES No External Components Required Highly Stable, Factory Trimmed Gain of Low Power, 1. ma Max Supply Current Wide Power Supply Range ( 1.7 V to 18 V) Single- and Dual-Supply Operation Excellent Dynamic Performance High CMRR 86 db Min @ DC 8 db Min to 1 khz Wide Bandwidth 9 khz V to 6 V Single Supply High Slew Rate V/ s Min Outstanding DC Precision Low Gain Drift ppm/ C Max Low Input Offset Voltage 1 V Max Low Offset Drift V/ C Max Low Input Bias Current 1. na Max APPLICATIONS Patient Monitors Current Transmitters Multiplexed Systems to ma Converters Bridge Transducers Sensor Signal Conditioning GENERAL DESCRIPTION The AD8 is an instrumentation amplifier with a fixed gain of, which sets new standards of performance. The superior CMRR of the AD8 enables rejection of high frequency common-mode voltage (8 db Min @ 1 khz). As a result, higher ambient levels of noise from utility lines, industrial equipment, and other radiating sources are rejected. Extended CMV range enables the AD8 to extract low level differential signals in the presence of high common-mode dc voltage levels even at low supply voltages. Ambient electrical noise from utility lines is present at 6 Hz and harmonic frequencies. Power systems operating at Hz create high noise environments in aircraft instrument clusters. Good CMRR performance over frequency is necessary if power system generated noise is to be rejected. The dc to 1 khz CMRR db 1 1 1 11 1 9 8 7 6 FUNCTIONAL BLOCK DIAGRAM NC 1 IN +IN V S AD8 NC = NO CONNECT HIGH PERFORMANCE IN AMP @ GAIN OF 8 NC 7 +V S 6 V OUT REF AD8 1 1 1 1k 1k 1k FREQUENCY Hz Figure 1. Typical CMRR vs. Frequency CMRR performance of the AD8 rejects noise from utility systems, motors, and repair equipment on factory floors, switching power supplies, and medical equipment. Low input bias currents combined with a high slew rate of V/µs make the AD8 ideally suited for multiplexed applications. The AD8 provides excellent dc precision, with maximum input offset voltage of 1 µv and drift of µv/ C. Gain drift is ppm/ C or less. Operating on either single or dual supplies, the fixed gain of and wide input common-mode voltage range make the AD8 well suited for patient monitoring applications. The AD8 is packaged in an 8-lead SOIC package and is specified over the standard industrial temperature range, C to +8 C. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 916, Norwood, MA 6-916, U.S.A. Tel: 781/9-7 www.analog.com Fax: 781/6-87 Analog Devices, Inc. All rights reserved.

AD8 SPECIFICATIONS (T A = C, V S = 1 V, R L = k, unless otherwise noted.) Parameter Conditions Min Typ Max Unit GAIN Gain V/V Gain Error.1 +. +.1 % Nonlinearity 1 ± ppm vs. Temperature 1 ± ppm/ C OFFSET VOLTAGE (RTI) Offset Voltage 1 ±µv vs. Temperature. ±µv/ C vs. Supply (PSRR) 9 1 db INPUT Input Operating Impedance Differential 1 GΩ pf Common Mode 1 GΩ pf Input Voltage Range V S + 1.6 +V S 1. V (Common-Mode) vs. Temperature V S +. +V S 1. V Input Bias Current. 1. na vs. Temperature pa/ C Input Offset Current.1. na vs. Temperature 1. pa/ C Common-Mode Rejection Ratio 86 9 db T A = T MIN to T MAX 8 db f = 1 khz* 8 db OUTPUT Operating Voltage Range R L = kω V S + 1. +V S 1. V vs. Temperature V S + 1. +V S 1.6 V Operating Voltage Range R L = 1 kω V S + 1. +V S 1.1 V vs. Temperature V S + 1. +V S 1. V Short Circuit Current 18 ma DYNAMIC RESPONSE Small Signal db Bandwidth 9 khz Full Power Bandwidth V OUT = V p-p 7 khz Settling Time (.1%) 1 V Step. µs Settling Time (.1%) 1 V Step.8 µs Slew Rate V/µs NOISE (RTI) Voltage.1 Hz to 1 Hz 1. µv p-p Spectral Density, 1 khz nv/ Hz Current.1 Hz to 1 Hz pa p-p Spectral Density, 1 khz fa/ Hz REFERENCE INPUT R IN V IN+, V REF = 18 kω I IN 6 µa Voltage Range V S + 1. +V S 1. V Gain to Output.999 1 1.1 POWER SUPPLY Operating Range 1.7 18 ± V Quiescent Current 1. 1. ma TEMPERATURE RANGE For Specified Performance +8 C *Pin 1 connected to Pin. See Applications section. Specifications subject to change without notice.

AD8 SPECIFICATIONS (T A = C, V S = V, R L = k, unless otherwise noted.) Parameter Conditions Min Typ Max Unit GAIN Gain V/V Gain Error.1 +. +.1 % Nonlinearity 1 ± ppm vs. Temperature 1 ± ppm/ C VOLTAGE OFFSET (RTI) Offset Voltage 1 ±µv vs. Temperature ±µv/ C vs. Supply 9 1 db INPUT Input Operating Impedance Differential 1 GΩ pf Common-Mode 1 GΩ pf Input Operating Voltage Range V S + 1.6 +V S 1. V vs. Temperature V S +.1 +V S 1. V Input Bias Current. 1. na vs. Temperature pa/ C Input Offset Current.1. na vs. Temperature 1. pa/ C Common-Mode Rejection Ratio 86 9 db T A = T MIN to T MAX 8 db f = 1 khz* 8 db OUTPUT Operating Voltage Range R L = kω V S +.9 +V S 1. V vs. Temperature V S + 1. +V S 1. V Operating Voltage Range R L = 1 kω V S +.8 +V S 1. V vs. Temperature V S +.9 +V S 1. V Short Circuit Current 18 ma DYNAMIC RESPONSE Small Signal db Bandwidth 9 khz Full Power Bandwidth V OUT = 7.8 V p-p 17 khz Settling Time (.1%) 7 V Step µs Settling Time (.1%) 7 V Step. µs Slew Rate V/µs NOISE (RTI) Voltage.1 Hz to 1 Hz 1. µv p-p Spectral Density, 1 khz nv/ Hz Current.1 Hz to 1 Hz pa p-p Spectral Density, 1 khz fa/ Hz REFERENCE INPUT R IN 18 kω I IN V INT, V REF = 6 µa Voltage Range V S +.9 +V S 1. V Gain to Output.999 1 1.1 POWER SUPPLY Operating Range 1.7 18 ± V Quiescent Current 1. 1. ma TEMPERATURE RANGE For Specified Performance +8 C *Pin 1 connected to Pin. See Applications section. Specifications subject to change without notice.

AD8 SPECIFICATIONS (T A = C, V S = V, R L = k, unless otherwise noted.) Parameter Conditions Min Typ Max Unit GAIN Gain V/V Gain Error.1 +. +.1 % Nonlinearity 1 ± ppm vs. Temperature 1 ± ppm/ C OFFSET VOLTAGE (RTI) Offset Voltage 1 7 ±µv vs. Temperature ±µv/ C vs. Supply 9 1 db INPUT Input Operating Impedance Differential 1 GΩ pf Common Mode 1 GΩ pf Input Voltage Range 1.6 V S 1. V (Common-Mode) vs. Temperature 1.7 V S 1. V Input Bias Current. 1. na vs. Temperature pa/ C Input Offset Current.1. na vs. Temperature 1. pa/ C Common-Mode Rejection Ratio 86 9 db T A = T MIN to T MAX 8 db f = 1 khz* 8 db OUTPUT Operating Voltage Range R L = kω.8 V S 1. V vs. Temperature.9 V S 1. V Operating Voltage Range R L = 1 kω.8 V S 1. V vs. Temperature.9 V S 1. V Short Circuit Current 18 ma DYNAMIC RESPONSE Small Signal db Bandwidth 9 khz Full Power Bandwidth V OUT =. V p-p khz Settling Time (.1%) V Step. µs Settling Time (.1%) V Step.1 µs Slew Rate V/µs NOISE (RTI) Voltage.1 Hz to 1 Hz 1. µv p-p Spectral Density, 1 khz nv/ Hz Current.1 Hz to 1 Hz pa p-p Spectral Density, 1 khz fa/ Hz REFERENCE INPUT R IN 18 kω I IN 6 µa Voltage Range. V S.9 V Gain to Output.999 1 1.1 POWER SUPPLY Operating Range. 6 V Quiescent Current 1. 1. ma TEMPERATURE RANGE For Specified Performance +8 C *Pin 1 connected to Pin. See Applications section. Specifications subject to change without notice.

AD8 ABSOLUTE MAXIMUM RATINGS* Supply Voltage................................ ± 18 V Internal Power Dissipation.................... 6 mw Input Voltage (Common-Mode).................... ± V S Differential Input Voltage....................... ± V Output Short Circuit Duration................ Indefinite Storage Temperature.................. 6ºC to +1ºC Operating Temperature Range........... ºC to +8ºC Lead Temperature Range (1 sec Soldering)......... ºC *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PIN FUNCTION DESCRIPTIONS Pin Number Mnemonic Function 1 NC May be Connected to Pin to Balance C IN IN Inverting Input +IN Noninverting Input V S Negative Supply Voltage REF Connect to Desired Output CMV 6 V OUT Output 7 +V S Positive Supply Voltage 8 NC 1. T J = 1 C POWER DISSIPATION W 1.. 8-LEAD SOIC PACKAGE 1 1 6 7 8 AMBIENT TEMPERATURE C 9 Figure. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model Temperature Range Package Description Package Options AD8AR ºC to +8ºC 8-Lead SOIC RN-8 AD8AR-REEL ºC to +8ºC 8-Lead SOIC 1" REEL AD8AR-REEL7 ºC to +8ºC 8-Lead SOIC 7" REEL AD8-EVAL Evaluation Board RN-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

AD8 Typical Performance Characteristics (T A = C, R L = k, V S = 1 V, unless otherwise noted.) LOT SIZE = 77 % OF UNITS 1 BIAS CURRENT pa 1 1 +BIAS CURRENT BIAS CURRENT 1 1 1 1 8 6 6 8 1 1 INPUT OFFSET VOLTAGE V TPC 1. Typical Distribution of Input Offset Voltage, V S = ±1 V 6 6 8 1 TEMPERATURE C TPC. Bias Current vs. Temperature LOT SIZE = 7 8 % OF UNITS 1 1 CHANGE IN OFFSET VOLTAGE V 6 1 1 6 7 8 INPUT BIAS CURRENT pa TPC. Typical Distribution of Input Bias Current, V S = ±1 V 1 WARM-UP TIME Min TPC. Offset Voltage vs. Warm-Up Time % OF UNITS 1 1 LOT SIZE = 77 VOLTAGE NOISE DENSITY nv/ Hz 1 1 1 1 INPUT OFFSET CURRENT pa TPC. Typical Distribution of Input Offset Current, V S = ±1 V 1 1 1 1k 1k 1k FREQUENCY Hz TPC 6. Voltage Noise Spectral Density vs. Frequency (RTI) 6

AD8 1 1 1 VOLTAGE NOISE DENSITY nv/ Hz 1 CMR db 11 1 9 8 7 6 1 1 1 1k 1k FREQUENCY Hz TPC 7. Input Current Noise Spectral Density vs. Frequency 1 1 1 1k 1k 1k FREQUENCY Hz TPC 1. CMR vs. Frequency, RTI NOISE RTI V 1 1 1 9 1 TIME sec TPC 8..1 Hz to 1 Hz Voltage Noise, RTI 1S 1 CMRR DRIFT ppm/ C.1.8.6.....6.8.1 6 8 1 TEMPERATURE C TPC 11. CMRR vs. Temperature CURRENT NOISE pa/div 8 6 6 1 9 1 1S COMMON-MODE VOLTAGE V 1 1 1 V S = 1V V S = V 8 TIME sec TPC 9..1 Hz to 1 Hz Current Noise 1 1 1 1 1 1 OUTPUT VOLTAGE V TPC 1. CMV Range vs. V OUT, Dual Supplies 7

AD8 COMMON-MODE VOLTAGE V 1 V S = V GAIN db 1 1 1 OUTPUT VOLTAGE V TPC 1. CMV vs. V OUT, Single Supply 6 1 1k 1k 1k 1M 1M FREQUENCY Hz TPC 16. Large Signal Frequency Response, V OUT = V p-p 1 +V S. 1. PSRR db 1 8 6 V S +V S INPUT VOLTAGE V (REFERRED TO SUPPLY VOLTAGES) 1. 1.. 1 1. 1. 1...1 1 1 1 1k 1k 1k 1M FREQUENCY Hz V S +. 1 1 SUPPLY VOLTAGE V TPC 1. PSRR vs. Frequency, RTI TPC 17. Input Common Mode Voltage Range vs. Supply Voltage GAIN db 1 1 OUTPUT VOLTAGE SWING V (REFERENCED TO SUPPLY VOLTAGES) +V S. 1. 1.. 6 8 1 1 1 16 18. 1. 1.. R L = 1k R L = k R L = k R L = 1k 6 1 1k 1k 1k 1M 1M FREQUENCY Hz V S 6 8 1 1 1 16 18 SUPPLY VOLTAGE V TPC 1. Small Signal Frequency Response, V OUT = mv p-p TPC 18. Output Voltage Swing vs. Supply Voltage and Load Resistance 8

AD8 1 9 OUTPUT VOLTAGE SWING V p-p 1 1 SETTLING TIME s 8 7 6 1.1%.1% 1 1 1k 1k LOAD RESISTANCE TPC 19. Output Voltage Swing vs. Load Resistance 1 1 STEP SIZE V TPC. Settling Time vs. Step Size CH 1 = V/DIV 1 OUTPUT (V/DIV) 9 CH = 1mV/DIV 1 HORIZ ( s/div) TEST CIRCUIT OUTPUT (.1%/DIV) NONLINEARITY ppm 1 1 1 9 1 1mV V 1 1 OUTPUT VOLTAGE V TPC. Large Signal Pulse Response and Settling Time to.1% TPC. Gain Nonlinearity 1 1 9 1 INPUT OUTPUT CH 1 = 1mV, CH = mv, H = s SUPPLY CURRENT ma 1. 1. 1. 1. 1.1 1..9.8 +8 C + C C.7.6. 6 8 1 1 1 16 18 SUPPLY VOLTAGE V TPC 1. Small Signal Pulse Response, C L = 1 pf TPC. I SUPPLY vs. V SUPPLY and Temperature 9

AD8 Test Circuits G = 1 k G = 11 G = AD797 G = 1 1 AD89 AD8 LPF SCOPE G = k k AD8 k Test Circuit 1. 1 Hz to 1 Hz Voltage Noise Test Test Circuit. Settling Time to.1% 1

AD8 IN +V S +V S +V S V B Q Q1 A1 A V S R C C1 R1 V S +V S k 1k A +V S V S k 1k OUT +IN V REF APPLICATIONS Precision V-to-I Converter When small analog voltages are transmitted across significant distances, errors may develop due to ambient electrical noise, stray capacitance, or series impedance effects. If the desired voltage is converted to a current, however, the effects of ambient noise are mitigated. All that is required is a voltage to current conversion at the source, and an I-to-V conversion at the other end to reverse the process. Figure illustrates how the AD8 may be used as the transmitter and receiver in a current loop system. The full-scale output is ma. V S Figure. Simplified Schematic THEORY OF OPERATION The AD8 is a monolithic, three op amp instrumentation amplifier. Laser wafer trimming and proprietary circuit techniques enable the AD8 to boast the lowest output offset voltage and drift of any currently available in amp (1 µv RTI), as well as a higher common-mode voltage range. Referring to Figure, the input buffers consist of super-beta NPN transistors Q1 and Q, and op amps A1 and A. The transistors are compensated so that the bias currents are extremely low, typically 1 pa or less. As a result, current noise is also low, at fa/ Hz. The unity gain input buffers drive a gain-of-five difference amplifier. Because the kω and 1 kω resistors are ratio matched, gain stability is better than ppm/ C over the rated temperature range. The AD8 also has five times the gain bandwidth of a typical in amp. This wider GBW results from compensation at a fixed gain of, which can be one fifth of that required if the amplifier were compensated for unity gain. High frequency performance is also enhanced by the innovative pinout of the AD8. Since Pins 1 and 8 are uncommitted, Pin 1 may be connected to Pin. Since Pin is also ac common, the stray capacitance at Pins and is balanced. e IN mv pk FS AD8 6 1k 7pF 9k I OUT OP7 R SH V SH FULL SCALE CURRENT = ma 8 AD8 V I SH. e OUT = = IN R SH R SH GND OR REF V Figure. Precision Voltage-to-Current Converter 6 e OUT mv pk FS As noted in Figure, an additional op amp and four resistors are required to complete the converter. The precision gain of in the AD8s, used in the transmit and receive sections, preserves the integrity of the desired signal, while the high frequency common-mode performance at the receiver rejects noise on the transmission line. The reference of the receiver may be connected to local ground or the reference pin of an A/D converter (ADC). Figure 6 shows bench measurements of the input and output voltages, and output current of the circuit of Figure. The transmission media is 1 feet of insulated hook-up wire for the current drive and return lines. e IN = 98mV p-p, e OUT = 98mV p-p, I OUT = 1.mA p-p AC GROUND AD8 8 NC 1 e IN e OUT IN +IN 7 6 +V S V OUT I OUT REF AC GROUND CH 1 = 1mV, CH = 1mV, CH = 1mA, H = s PIN 1 HAS NO INTERNAL CONNECTION Figure. Pinout for Symmetrical Input Stray Capacitance Figure 6. V-to-I Converter Waveforms (CH1: V IN, CH: V OUT, CH: I OUT ) 11

AD8 Driving a High Resolution ADC Most high precision ADCs feature differential analog inputs. Differential inputs offer an inherent 6 db improvement in S/N ratio and resultant bit resolution. These advantages are easy to realize using a pair of AD8s. AD8s can be configured to drive an ADC with differential inputs by using either single-ended or differential inputs to the AD8s. Figure 7 shows the circuit connections for a differential input. A single-ended input may be configured by connecting the negative input terminal to ground. AD8 AD8 6 ALTERNATE CONNECTION FOR SE SOURCE 1.V 6 7 7 OP177.7nF.7nF.99k.99k +IN V AD767 1kSPS IN.V AD78 RERERENCE Figure 7. Driver for Differential ADC The AD767 ADC illustrated in Figure 7 is a SAR type converter. When the input is sampled, the internal sample-and-hold capacitor is charged to the input voltage level. Since the output of the AD8 cannot track the instantaneous current surge, a voltage glitch develops. To source the momentary current surge, a capacitor is connected from the A/D input terminal to ground. Since the AD8 cannot tolerate greater than approximately 16 BITS 1 pf of capacitance at its output, a 7 Ω series resistor is required at each in amp output to prevent oscillation. Using the Reference Input Note in the example in Figure 7 that Pin, the reference input, is driven by a voltage source. This is because the reference pin is internally connected to a 1 kω resistor, which is carefully trimmed to optimize common-mode rejection. Any additional resistance connected to this node will unbalance the bridge network formed by the two kω and two 1 kω resistors, resulting in an error voltage generated by common-mode voltages at the input pins. AD8 Used as an EKG Front End The topology of the instrumentation amplifier has made it the circuit configuration of choice for designers of EKG and other low level biomedical amplifiers. CMRR and common-mode voltage advantages of the instrumentation amplifier are tailor made to meet the challenges of detecting minuscule cardiac generated voltage levels in the presence of overwhelming levels of noise and dc offset voltage. The subtracter circuit of the in amp will extract and amplify low level signals that are virtually obscured by the presence of high common-mode dc and ac potentials. A typical circuit block diagram of an EKG amplifier is shown in Figure 8. Using discrete op amps in the in amp and gain stages, the signal chain usually includes several filters, high voltage protection, lead-select circuitry, patient lead buffering, and an ADC. Designers who roll their own instrumentation amplifiers must provide precision custom trimmed resistor networks and well matched op amps. The AD8 instrumentation amplifier not only replaces all the components shown in the highlighted block in Figure 8, but also provides a solution to many of the difficult design problems encountered in EKG front ends. Among these are patient generated errors from ac noise sources and errors generated by unequal electrode potentials. Alone, these error voltages can exceed the desired QRS complex by orders of magnitude. INSTRUMENTATION AMPLIFIER G = TO 1 PATIENT ISOLATION BARRIER LEAD SELECT, HV PROTECTION, FILTERING A1 A GAIN AND ADC TOTAL G = 1 DIGITAL DATA TO SYSTEM MAINFRAME A Figure 8. Block Diagram, EKG Monitor Front End Using Discrete Components 1

AD8 In the classical three op amp in amp topology shown in Figure 8, gain is developed differentially between the two input amplifiers A1 and A, sacrificing CMV (common-mode voltage) range. The gain of the in amp is typically 1 or less, and an additional gain stage increases the overall gain to approximately 1. Gain developed in the input stage results in a trade-off in commonmode voltage range, constraining the ability of the amplifier to tolerate high dc electrode errors. Although the AD8 is also a three amplifier design, its gain of is developed at the output amplifier, improving the CMV range at the input. Using ± V supplies, the CMV range of the AD8 is from. V to + V, compared to.1 V to +.8 V, a 7% improvement in input headroom over conventional in amps with the same gain. AD8 G = 1 OP77 G = 19.6k 1 RA-LA 1 LA-LL RA-LL CH 1 = V, CH = V, CH = V, H = ms Figure 1. EKG Waveform Using Circuit of Figure 9 Benefits of Fast Slew Rates At V/µs, the slew rate of the AD8 is as fast as many op amp circuits. This is an advantage in systems applications using multiple sensors. For example, an analog multiplexer (see Figure 11) may be used to select pairs of leads connected to several sensors. If the AD8 drives an ADC, the acquisition time is constrained by the ability of the in amp to settle to a stable level after a new set of leads is selected. Fast slew rates contribute greatly to this function, especially if the difference in input levels is large. S1A AD8 G = 1 OP77 G = 19.6k 1.V, V S1B SA SB SA SB SA ADG9 DA DB 1 AD8 REF SB AD8 G = 1 OP77 G = 19.6k 1 Figure 9. EKG Monitor Front End Figure 9 illustrates how an AD8 may be used in an EKG front end. In a low cost system, the AD8 can be connected to the patient. If buffers are required, the AD8 can replace the expensive precision resistor network and op amp. Figure 1 shows test waveforms observed from the circuit of Figure 9. Figure 11. Connection to an ADG9 Analog MUX Figure 1 illustrates the response of an AD8 connected to an ADG9 analog multiplexer in the circuit shown in Figure 11 at two signal levels. Two of the four MUX inputs are connected to test dc levels. The remaining two are at ground potential so that the output slews as the inputs A and A1 are addressed. As can be seen, the output response settles well within µs of the applied level. INPUT SIGNAL TRAN- SITION SMALL SIGNAL (mv/div) LARGE SIGNAL (V/DIV) CH 1 = mv, CH = V, H = ns Figure 1. Slew Responses After MUX Selection 1

AD8 Evaluation Board Figure 1 is a schematic of an evaluation board available for the AD8. The board is shipped with an AD8 already installed and tested. The user need only connect power and an input to conduct measurements. The supply may be configured for dual or single supplies, and the input may be dc- or ac-coupled. A circuit is provided on the board so that the user can zero the output offset. If desired, a reference may be applied from an external voltage source. +IN GND IN R 1 R 1 C1.1 F W W C.1 F R 1k * R 1k * +V S 7 6 A1 1 C.1 F R8 W1 OUTPUT C.1 F W1 EXT_REF W11 W1 V S USER-SUPPLIED +V AUX +V S C1 1 F, V W7 +V AUX C1.1 F CS1 J A GND V S C11 1 F, V W6 V AUX OFFSET A1 6 7 ADJ R1 1k R9.9k, 1% R1.9k, 1% C7.1 F C9.1 F V AUX CS J A C8.1 F NOTES REMOVE W AND W FOR AC COUPLING *INSTALL FOR AC COUPLING AD77JN V AUX Figure 1. Evaluation Board Schematic 1

AD8 OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package (SOIC) (RN-8) Dimensions shown in millimeters and (inches). (.1968).8 (.189). (.17).8 (.197) 8 1 6. (.).8 (.8). (.98).1 (.) COPLANARITY.1 1.7 (.) BSC SEATING PLANE 1.7 (.688) 1. (.).1 (.1). (.1). (.98).19 (.7) 8. (.196). (.99) 1.7 (.).1 (.16) COMPLIANT TO JEDEC STANDARDS MS-1AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 1

AD8 Revision History Location Page / Data Sheet changed from REV. to. Updated ORDERING GUIDE............................................................................. Change to TPC 1...................................................................................... 7 Change to TPC caption................................................................................ 9 Edit to Precision V-to-I Converter section.................................................................... 11 OUTLINE DIMENSIONS updated........................................................................ 1 C771 /(A) PRINTED IN U.S.A. 16