Voltage Sag and Swell Identification Using FFT Analysis and Mitigation with DVR

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IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE) e-issn: 2278-1676,p-ISSN: 2320-3331, Volume 12, Issue 2 Ver. I (Mar. Apr. 2017), PP 30-40 www.iosrjournals.org Voltage Sag and Swell Identification Using FFT Analysis and Mitigation with DVR G.Devadasu 1, Dr. M. Sushama 2 1 Department of EEE, CMR College of Engineering and Technology, Hyderabad, Telengana, India 2 Professor, Department of EEE, JNTU College of Engineering, Hyderabad, India Abstract:- Power quality issues like voltage sag, swell, harmonics and transients can affect the power system performance. Voltage sag and swell are now-a-days treated to reduce power quality issues by power engineers. A small variation in voltage can badly affect the operation of power system and connected loads as well. This paper presents the voltage sag and voltage swell identification using FFT analysis. The paper also presents the mitigation for identified voltage sag and swells issues addressed with DVR. DVR consists of a voltage source converter and is controlled with d-q theory which is simple producing reference signals and gate pulses for switches of DVR. The proposed concept was simulated using MATLAB/SIMULINK software and results were presented for identification and mitigation. FFT analyses for identification of voltage sags and swell existence in different phases of power system network were shown. Mitigation of voltage sag and swell with DVR was also shown with results. Keywords - Sag, swell, identification, mitigation, FFT, DVR I. INTRODUCTION Power system reliability is very important factor in fore-going proceedings of power network to ensure efficient operation of loads connected at point of utilization. Power engineers are more concentrated on power system reliability as it constitutes very important part of power system operation and control. Reliability ensures commercial and industrial loads which are dominant users of electric power to utilize electric power to possible extent without any disturbances [1-3]. Even though providing a very good reliable electric power network, fault cannot be avoided since some faults are due to human errors or due to environmental conditions and phenomenon. Faults in power system network can badly affect power system operation causing many power system issues. Transients, voltage sag, voltage swell, harmonics, flickers, electromagnetic interference, noise are some of the power quality issues that affect the normal operation of power system network out of which voltage sag and voltage swell are considered to be more dangerous power quality issues as they can produce serious threat to the power system network and loads connected at point of utilization as well. Small voltage sag can reduce the life time of the equipment connected at load section reducing the efficiency of operation. Swell in voltage can damage the load equipment connected to power system line. Identification of voltage sag and swell initiates the process of mitigation. Many researchers have carried their work on how to identify the power system voltage disturbances like voltage sag and swell. According to IEEE standards of power system operation, a sag is defined as reduce in voltage value from 90% to 10% of its final value and voltage swell is defined as raise in voltage value greater than 110% of its final value [4-6].There are several Techniques are followed to find out the harmonics level in power systems, but this work utilizes FFT analysis not only for its quick response but also for its simple implementation and its reduced complexity. The schematic arrangement of power system network for voltage sag and voltage swell identification is illustrated in Fig 1.Custom power devices might be a solution to eliminate or reduce power quality problems. FACTS devices are type of custom power devices employed to reduce the risk of power quality problems using power electronics circuits. Dynamic voltage restorer (DVR) is a type of FACTS controller placed in series to the power system network to nullify or reduce the affect of voltage sag or voltage swell [7-8] in the system by injecting or absorbing compensating voltages in to the main power system line through a coupling transformer. 3-phase load PCC(Point of common coupling) Fault 3-phase sensitive load PCC voltage for sag and swell identification Fig.1. Power system network schematic arrangement with presence of fault DOI: 10.9790/1676-1202013040 www.iosrjournals.org 30 Page

3-ph Source Source impedance A V dvr Injection TransFormer GRID R s L S a V dvrb V dv rc Sensitive Load DVR L se L se L se + DC - source LC Filters C se Fig.2. Schematic arrangement of power system for voltage problem mitigation with DVR This paper presents the voltage sag and voltage swell identification using FFT analysis. Also paper discusses the voltage sag and voltage swell mitigation using d-q theory based DVR. Power switches in DVR are controlled from pulses obtained from d-q control theory. The proposed concept was simulated using MATLAB/SIMULINK software and results were presented for identification and mitigation. FFT analyses for identification of voltage sags and swell existence in different phases of power system network were shown. Mitigation of voltage sag and swell with DVR was also shown with results. II. Multi Level Inverter For Electric Vehicle Fig.3 shows the flow chart for fault identifying for sag and swell conditions using FFT analysis FFT algorithms are based on fundamental of discrete Fourier computation. Initially source voltage is read from source parameters of power system line and fed to process of FFT block. The processed source voltage is fed to MATLAB file as RMS voltage and sent to test for sag and swell conditions. The source RMS voltage tests for both voltage sag and voltage swell and displays result. If the tested RMS voltage consists of voltage sag, displays result as sag exists and if swell presence is tested, displays result as swell exists in particular phase of power system. Read Source Voltage From each phase Process to FFT Block Load RMS voltage into MATLAB file Test for Sag, Swell Test for Sag in phases Test for Swell in phases Display Result Display Result. Fig.3. Flow chart for Fault Identification using FFT analysis III. Mitigation Of Voltage Sag And Swell Using Dvr The schematic arrangement of DVR connected to power system for mitigation of voltage sag and voltage swell is shown in figure 2. Custom power devices might be a solution to eliminate or reduce power quality problems. FACTS devices are type of custom power devices employed to reduce the risk of power DOI: 10.9790/1676-1202013040 www.iosrjournals.org 31 Page

quality problems using power electronics circuits. Dynamic voltage restorer (DVR) is a type of FACTS controller placed in series to the power system network to nullify or reduce the affect of voltage sag or voltage swell in the system by injecting or absorbing compensating voltages in to the main power system line through a coupling transformer. Voltage can be stabilized at load point by using a capacitor bank but this method is not suitable for high speed switching and also mechanical switching creates problem. DVR is a type of custom power devices which provides more reliable solution for load voltage stability. Sinwt, Coswt Vs(3-ɸ) PLL Vdc(act) Vdc(ref) - + PI Id(loss) IL(3-ɸ) abc/d-q Id HPF + +- Id(ref) + Id(fun) Iqɸ0 Iabc(sourceref) + d-q/abc - Iabc(sourceact) PWM generator Gate pulse Fig.4. d-q control for DVR The three-phase line voltages are fed to PLL, where the information regarding sinusoidal and cosine wave are obtained. On the other hand, three-phase line currents are fed to Clarke s transformation where abc co-ordinates are converted to dq co-ordinates. The obtained d coordinate of current is passed through high pass filter which yields reference d coordinate of current. Actual DC link voltage is measured with reference DC voltage and the error signal is fed to PI controller producing loss component current I d. Loss component of I d along with reference component of Id are compared and then sent to transformation from dq to abc coordinates producing reference components of source current. Reference source current is again measured with actual line currents and error signal is sent to pulse generator which generates the pulses and activate the power switches of DVR. Control circuit of DVR is illustrated in detail in Fig. 4 and arrangement of complete power system with d- q control for DVR is shown in Fig 5. 3-ph Source Source impedance GRID Rs LS A Vdvr a Injection TransFormer Vdvrb Vdv rc Sensitive Load DVR VSabc Lse Lse Lse + DC - source LC Filters Cse Gate Pulses d-q Theory Fig.5. Schematic arrangement of complete power system with d-q control for DVR DOI: 10.9790/1676-1202013040 www.iosrjournals.org 32 Page

IV RESULTS AND DISCUSSION 4.1. Case 1: Result of FFT analysis under Phase A to Ground Fault Fig.6. Result showing existence of sag and swell in phase-a Fig.7. Simulated wave form showing sag and swell in one phase Fig. 6 shows the result window showing existence of sag and swell in one phase of power system. Sag persists for 0.103s and swell persists for 0.0938s in power system with 19.9% and 30.1% depth respectively in phase-a. Figure 7 shows the simulation result of sag and swell existence in one phase of power system. 4.2. Case 2: Result of FFT analysis under Phase B to Ground Fault Fig.8. Result showing existence of sag and swell in phase-b Fig.9. Simulated wave form showing sag and swell in phase-b DOI: 10.9790/1676-1202013040 www.iosrjournals.org 33 Page

Fig. 8 shows the result window showing existence of sag and swell in phase-b of power system. Sag persists for 0.0972s and swell persists for 0.102s in power system with 19.9% and 30.1% depth respectively in phase-b. Figure 9 shows the simulation result of sag and swell existence in phase-b of power system. 4.3. Case 3: Result of FFT analysis under Phase C to Ground Fault Fig.10. Result showing existence of sag and swell in phase-c Fig.11. Simulated wave form showing sag and swell in phase-c Fig. 10 shows the result window showing existence of sag and swell in phase-c of power system. Sag persists for 0.0998s and swell persists for 0.09s in power system with 19.9% and 30.1% depth respectively in phase-c. Fig. 11 shows the simulation result of sag and swell existence in phase-c of power system. 4.4. Case 4: Result of FFT analysis under Phases AB Fault Fig.12. Result showing existence of sag and swell in phase-a and B DOI: 10.9790/1676-1202013040 www.iosrjournals.org 34 Page

Fig.13. Simulated wave form showing sag and swell in phase A and B Fig. 12 shows the result window showing existence of sag and swell in phase A and B of power system. Sag persists for 0.103s and swell persists for 0.0938s in power system with 19.9% and 30.1% depth respectively in phase-a and B too. Figure 13 shows the simulation result of sag and swell existence in one phase A and B of power system. 4.5. Case 5: Result of FFT analysis under Phases BC Fault Fig.14. Result showing existence of sag and swell in phase B and C Fig.15. Simulated wave form showing sag and swell in phase B and C DOI: 10.9790/1676-1202013040 www.iosrjournals.org 35 Page

Fig. 14 shows the result window showing existence sag and swell in phase B and C of power system. Sag persists for 0.0972s and swell persists for 0.102s in power system with 19.9% and 30.1% depth respectively in phase-b and C. Figure 15 shows the simulation result of sag and swell existence in phase B and C of power system. 4.6. Case 6: Result of FFT analysis under Phases AC Fault Fig.16. Result showing existence of sag and swell in phase-a and C Fig.17. Simulated wave form showing sag and swell in phase A and C Fig. 16 shows the result window showing existence of sag and swell in phase A and C of power system. Sag persists for 0.103s and swell persists for 0.0938s in power system with 19.9% and 30.1% depth respectively in phase-a and C. Figure 17 shows the simulation result of sag and swell existence in phase A and C of power system. DOI: 10.9790/1676-1202013040 www.iosrjournals.org 36 Page

4.7. Case 7: Result of FFT analysis under Phases ABC Fault Fig.18. Result showing existence of sag and swell in all three phases Fig.19. Simulated wave form showing sag and swell in all three phases Fig. 18 shows the result window showing existence of sag and swell in three phases of power system. Sag persists for 0.103s and swell persists for 0.0938s in power system with 19.9% and 30.1% depth respectively in all three phases. Figure 19 shows the simulation result of sag and swell existence in three phase of power system. 4.8. Case-8: Mitigation using DVR with sag and swell in one phase of power system Fig.20. Simulated wave form showing sag in one phase of power system, DVR voltage and load voltage DOI: 10.9790/1676-1202013040 www.iosrjournals.org 37 Page

Fig.21. Simulated wave form showing swell in one phase of power system, DVR voltage and load voltage Fig. 20 shows the sag in one phase and Fig. 21 shows swell in only one phase of power system. The DVR injected voltages and load voltages are also shown. DVR injects compensating voltages and thus load voltage is maintained stable. 4.9. Case-9: Mitigation using DVR with sag and swell in two phases of power system Fig.22. Simulated wave form showing sag in two phases of power system, DVR voltage and load voltage Fig.23. Simulated wave form showing swell in two phases of power system, DVR voltage and load voltage Fig. 22 shows the sag in two phases and Fig. 23 shows swell in two phases of power system. The DVR injected voltages and load voltages are also shown. DVR injects compensating voltages and thus load voltage is maintained stable. DOI: 10.9790/1676-1202013040 www.iosrjournals.org 38 Page

4.10. Case-10: Mitigation using DVR with sag and swell in three phases of power system Fig.24. Simulated wave form showing sag in all three phases of power system, DVR voltage and load voltage Fig.25. Simulated wave form showing swell in all three phases of power system, DVR voltage and load voltage Fig. 24 shows the sag in three phases and Fig. 25 shows swell in three phases of power system. The DVR injected voltages and load voltages are also shown. DVR injects compensating voltages and thus load voltage is maintained stable. 4.11. Case-11: Mitigation using DVR with sag and swell in three phases of power system inconsecutive times Fig.26. Simulated wave form showing sag and swell existence in all three phases of power system, DVR voltage and load voltage Fig. 26 shows the sag and swell in three phases of power system in consecutive times. The DVR injected voltages and load voltages are also shown. DVR injects compensating voltages and thus load voltage is maintained stable. DOI: 10.9790/1676-1202013040 www.iosrjournals.org 39 Page

IV. Conclusion The paper presents the identification and mitigation of voltage sag and voltage swell in power system network. The identified voltage sag and swell are mitigated using DVR. DVR is controlled using d-q theory and the compensating signals are sent to compensate voltage sag and swell conditions in power system. The proposed concept was simulated using MATLAB/SIMULINK software and results were presented for identification and mitigation. FFT analyses for identification of voltage sag and swell existence in different phases of power system network were shown. Mitigation of voltage sag and swell with DVR was also shown with results. DVR is found suitable to mitigate the identified swell or sag condition that occurs in any of the phase or many phases of power system network. REFERENCES [1] Rosli Omar and Nasrudin Abddul, Mitigation of Voltage Sags/Swells Using Dynamic Volt Age Restorer (DVR) in ARPN Journal of Engineering and Applied Sciences Vol..4, No. 4, June 2009 [2] Christoph Meyer, Yun Wei Li, Optimized Control Strategy for a Medium-Voltage DVR Theoretical Investigations and Experimental Results in IEEE Trnsaction on Power Electronics, Vol. 23, No. 6, November2008 [3] H. Ezoji, A. Sheikholeslami, M. Tabasi M.M. Saeednia "Simulation of Dynamic Voltage Restorer Using Hysteresis Voltage Control in European Journal of Scientific Research ISSN 1450-216X Vol.27 No.1 (2009), pp.152-166 [4] Mahmoud A. El-Gammal, Amr Y. Abou-Ghazala, Tarek I. El-Shennawy, Dynamic Voltage Restorer (DVR) for Voltage Sag Mitigation in International Journal on Electrical Engineering and Informatics Vol. 3, Number 1, 2011 [5] Firouz Badrkhani Ajaei, Saeed Afsharnia, Alireza Kahrobaeian, and Shahrokh Farhangi A Fast and Effective Control Scheme for the Dynamic Voltage Restorer in IEEE Transactions on power delivery, VOL. 26, NO. 4, OCTOBER 2011 [6] Michael John Newman, Donald Grahame Holmes, John Godsk Nielsen, and Frede Blaabjerg, A Dynamic Voltage Restorer (DVR) With Selective Harmonic Compensation at Medium Voltage Level in IEEE Transactions on Industry Applications, Vol.. 41, No. 6,November/December 2005 [7] Poh Chiang Loh, D Mahinda Vilathgamuwa, SengKhai Tang, and HianLih Long Multilevel Dynamic Voltage Restorer in IEEE Power Electronics Letter, Vol. 2, No. 4, December 2004 [8] Chris Fitzer, Mike Barnes, and Peter Green, Voltage Sag Detection Technique for a Dynamic Voltage Restorer in IEEE Transactions on Industry Applications, Vol. 40, NO. 1, January/February 2004 DOI: 10.9790/1676-1202013040 www.iosrjournals.org 40 Page