VISHAY SILICONIX www.vishay.com ICs By Ron Vinsant INTRODUCTION Industrial power applications typically require a high input voltage. Standard voltage rails are 4 V, 36 V, and 48 V. The DC/DC step-down (buck) switching regulators and controllers used to power circuitry in industrial applications are required to provide the solid, reliable performance needed for environments subject to noise, power surges, and outages. It is common for the power supply requirements in industrial systems to be quite complex. Galvanic isolation is often needed to meet safety standards, as well as to break ground loop interference for noise-sensitive applications. For example, in new factory automation systems such as PLCs and I/O modules, an increasing number of I/O channels is driving higher sensing accuracy. As a result, isolation between different voltages is preferred for digital / analog signal isolation or channel to channel isolation to prevent noise interference from a common ground (see Fig. ). 4 V / 36 V / 48 V OP AMP Isolated bias supplies Buck regulators ADC/DAC Processor / memory Digital isolator Communication RS-485 Fig. The traditional way to achieve these isolated supplies would be to use a flyback converter of the main supply to generate the various voltages needed by the bias supply. Flyback designs typically utilize asymmetric transformer turn ratios for primary and secondary power windings, with an optocoupler and reference, or an auxiliary winding for feedback regulation. Additionally, flyback converters need an elaborate compensation design for stability. This results in a tedious design process and a bulky solution with a higher component count and cost. This article explores a simpler way to achieve isolated voltages without the use of a flyback topology. Revision: 3-Aug-7 Document Number: 76498
ISOLATED SYNCHRONOUS BUCK CONVERTER An isolated buck converter uses a synchronous buck converter with coupled inductor windings to create isolated outputs (see Fig. ). Isolated converters utilizing this topology use a smaller transformer for an equivalent power transfer, as the transformer s primary and secondary turn ratios are better matched. There is no need for an optocoupler or auxiliary winding, as the secondary output closely tracks the primary regulated output voltage, resulting in a smaller solution size and lower cost. V OUT V IN V IN + = V OUT V OUT Fig. - An isolated synchronous buck converter generating two outputs This topology has several advantages, including: Easy to generate, isolated positive and negative supplies The primary side supply is available to power loads that do not require isolation from V IN Simplified design compared with the traditional flyback approach Fewer components and a smaller solution size compared to a flyback topology To showcase the ease of designing such a power supply, we will use as an example the SiC46, which is the 6 A member of a family of fully integrated synchronous buck regulators. These devices offer high power conversion efficiency and high power density with low electrical parasitics due to both excellent silicon (MOSFETs and drivers) and packaging design techniques. The power stages used in this family can supply 3 A to 0 A of continuous current, depending on the model number. Their output voltage is adjustable from 0.8 V to 0.9 x V IN, with an input range from 4.5 V to 60 V. These devices offer such features as multiple power saving modes for very low output current operation, adjustable operating frequency, fast transient response, cycle by cycle current limiting, adjustable current limit, OVP, OTP, UVP, Power Good and enable signals, tracking, sequencing, an ultrasonic mode for a minimum operating frequency of 5 khz to avoid audible noise, soft start, and the use of an all-ceramic capacitor solution for both input and output. This flexibility allows us to create a design that generates two well-generated outputs, one isolated. The basic requirements for this design are: V IN : 3 V to 56 V V OUT : V at A and an isolated 5 V at A (referred to as Iso +5) Min. load: of full load values The design is based on a buck regulator with a dual winding inductor. The flyback aspect of the inductor is used to generate another output. This is a continuous flyback design, as the SiC46 is always operating in full synchronous mode, even under no-load conditions. This is possible due to the mode feature of the regulator. This feature allows operation in different modes, depending on requirements. There are two modes: power save, where the regulator can go into deep discontinuous operation with energy being transferred to the output only a few times per second, and continuous mode, where energy transfer occurs in every switching cycle. The continuous operation is not as efficient at light loads; however, this mode of operation allows for an improved transient response and the ability to add flyback windings that are suitable at light or zero loads. Revision: 3-Aug-7 Document Number: 76498
9 4 www.vishay.com In Fig. 3 below, the inductor, L, consists of a high temperature powder toroidal core with 4-turn primary and 6-turn secondary bifilar windings. The design of this inductor was created specifically for this project (non-standard) and was built in our lab. Since the main regulator loop controls the voltage during the time the low side switch is on, the flyback voltage remains constant by virtue of the main control loop. With 4 turns on the primary, there are V / 4 turns = 0.5 V per turn. On the flyback winding then, 6 turns x 0.5 V per turn = 8 V. Taking into account the drop of the diode, D, of 0.65 V, we wind up with 7.35 V. In addition, there is drop in the winding DCR and the coupling coefficient of the inductor. This gets us to about 6.5 V or so. Note the blue dots next to L indicating phasing of the windings. As can be observed in the performance characterization below, input capacitor stress is greatly increased in this type of design. A snubber consisting of C7 and R7 will be needed across the diode, D, used in the flyback output due to leakage inductance. There will need to be a snubber consisting of C7 and R8 from the LX node to the power ground to limit the peak value of the voltage that the SiC46 is subjected to due to device parasitics. nf C7 R7 33 Switcher Board (46) 30 V IN to 56 V IN P Terminal 0.85 V to start R8 4.7K C. μf C06 C3. μf C06 R5 40K %.53 V R9 6K C4. μf C06 C3 μf 6.3 V X5R C5. μf C06 R6 0K C6. μf C06 R7 0K C4 nf C040 C7 00 nf X7S C5 00n F X7S TP R 40K Enable Mode COMP US SS fsw R0 88.7K R 6 5 3 7 8 9 4 5 88.7K V DD GL P GOOD EN MODE COMP ULTRASONIC SS f sw I LIM V IN 8 8 TP3 TP506 V IN 7 A GND R3 3 0 9 V IN3 V CIN A GND U SiC46XCD 30 P GND5 7 P GND4 P GND3 0 4 V IN V OUT 5 V OUT BS R 0R BS D VPM P3 C8 C 330 μf U0 00 nf 35 V Terminal 5 V return This return can float or be tied to main power ground 6 PH X7S 6T PHASE_ 5 TP L PHASE_ Inductor 4 LX T68-60A core V OUT SW3 4T 3 V SW OUT P SW R3 6K C0A. nf C0 C C8 C9 00 nf μf μf + C0805 C0805 6 V 6 V Terminal 0 V SNS C nf V SNS X7S X5R X5R FB V FB BOOT P GND P GND V DRV 6 C6 μf 6.3 V TP4 X5R TP506 C0B. nf R4 40K R 0K GND 330UF Power ground and analog ground are tied together only at one point by R3, which is a virtual resistor seperating the two ground nets and represents a PCB trace from P of U to P5 of U. It does not exist as a real component on the PCB. Brown nets indicate heavy traces / planes for high current; Green net indicates analog ground plane Fig. 3 - Schematic of a dual output regulator The effect of the flyback winding on circuit operation is to make the inductor look like less than its nominal value. In all oscillographs below, the trace legend is as follows (refer to Fig. 3 for circuit nets): Ch, yellow: inductor current in the Lx node Ch, blue: voltage at Lx node Ch4, green: flyback winding voltage between 5 V return and the anode of D Revision: 3-Aug-7 3 Document Number: 76498
Here is a map of the legend above: Fig. 4 - Waveform legend map Here are some example waveforms showing operation of the circuit: Fig. 5 - Waveform with no load on Iso +5 and 0 A on main + 45 V IN Fig. 5 above shows a normal looking buck running in continuous current mode. The average current is zero. Revision: 3-Aug-7 4 Document Number: 76498
Now we will increase current in the + output (primary), only leaving the +5 Iso at zero: Fig. 6 - Waveform with no load on Iso +5 and A on main + at 45 V IN In Fig. 6 above, the peak to peak current in the main winding of L remains constant, but the average current increases. Now we will add current to the flyback winding by increasing the load on the +5 Iso but lowering the main current to zero: Fig. 7 - Waveform with a full load ( A) on Iso +5 and 0 A on main + at 45 V IN Compare Fig. 7 to Fig. 6 and notice the increase in peak to peak current. The next oscillograph shows both outputs at full load. Notice that the peak to peak current is about the same as Fig. 6, but now the average value of the current has increased. Revision: 3-Aug-7 5 Document Number: 76498
Fig. 8 - Waveform with a full load ( A) on Iso +5 and A on main + 45 V IN As can be observed in Fig. 5 through Fig. 8 above, the flyback voltage does not substantially change over all of the required operating conditions. Efficiency over the input voltage range is quite flat. 8 Efficiency (%) 80 78 76 74 7 70 Overall efficiency max. load Overall efficiency min. load Max. load is A on V and A on isolated 5 V Min. load is 0.A on V and 0. A on isolated 5 V 68 5 30 35 40 45 50 55 Input (V) Fig. 9 - Efficiency over the input voltage range and load range (includes secondary switching regulator, U0) Revision: 3-Aug-7 6 Document Number: 76498
Line regulation is excellent with a minimum load on the main + V output:.060.055.050 Output (V).045.040.035 V OUT main max. load V OUT main min. load.030.05 5 45.05 40.03 35 30 Input (V) Fig. 0 - Main + V output voltage regulation over loading on all outputs and line voltage The DC output voltage from the flyback winding across C8 is not as well-regulated as shown in Fig.. However, if the V IN range of the input bus is not as wide as in this design, better regulation can be achieved. If a lower cost solution is needed, a linear regulator can be used in place of U0 to post-regulate the Iso +5 V rail. 7.6 7.4 7. Output (V) 7 6.8 6.6 V OUT fly max. load V OUT fly min. load 6.4 6. 6 5 45.05 40.03 35 30 Input (V) Fig. - Flyback output voltage regulation on C8 over loading on all outputs and line voltage Revision: 3-Aug-7 7 Document Number: 76498
Fig. is a thermal image of the breadboard operating at a full load and a 55 V input: Fig. - Thermal image at 55 V INPUT and a full load on both outputs H sw is the high side switch in the SiC46, U L is the inductor temperature of L SD is the temperature of the Schottky diode, D R snb is the temperature of the snubber resistor, R7 C snb is the temperature of the snubber capacitor, C7 CONCLUSION PLCs and I/O module power supply designs have become quite complex with the need for multiple isolated voltages, floating bias voltages, and negative output voltages. PLCs are used extensively in factory automation, building automation, and process control. The need to supply various isolated rails for gate drivers, op-amps, and isolated communication interfaces such as RS-485, RS-3, etc. results in the need for a simpler way to achieve these voltages that also meets the requirements of low component count, small PCB size, and a compact, low profile design. This breadboard design is an example of the new possibilities afforded by the introduction of higher voltage families of buck regulators, such as the SiC46. Revision: 3-Aug-7 8 Document Number: 76498