The ULNA is obsolete -ma Rated Collector Current (Single ) High-oltage s... Clamp Diodes ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY Inputs Compatible With arious Types of Logic Relay Driver Applications Designed to Be Interchangeable With Sprague ULNA Series Package Options Include Plastic Small Outline (D, NS) Packages, and Plastic DIP (N) description The ULNA, ULNA, ULNA, ULNA, ULQA, and ULQA are high-voltage, high-current Darlington transistor arrays. Each consists of seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The collector-current rating of a single Darlington pair is ma. The Darlington pairs may be paralleled for higher current capability. Applications include relay drivers, hammer drivers, lamp drivers, display drivers (LED and gas discharge), line drivers, and logic buffers. For - (otherwise interchangeable) versions of the ULNA and ULNA, see the SN8 and SN, respectively. The ULNA is a general-purpose array and can be used with TTL and CMOS technologies. The ULNA is specifically designed for use with - to - PMOS devices. Each input of this device has a zener diode and resistor in series to control the input current to a safe limit. The ULNA and ULQA have a.-kω series base resistor for each Darlington pair for operation directly with TTL or - CMOS devices. The ULNA and ULQA have a.-kω series base resistor to allow operation directly from CMOS devices that use supply voltages of to. The required input current of the ULN/ULQA is below that of the ULN/ULQA, and the required voltage is less than that required by the ULNA. TA C to C C to8 C AAILABLE OPTIONS PACKAGES SMALL OUTLINE (D, NS) PLAST DIP (N) ULNAN ULNAD ULNANS ULNAN ULNAD ULNANS ULNAN ULQAD ULQAD The D package is available taped and reeled. Add the suffix R to device type (e.g., ULNADR). The NS package is only available taped and reeled. ULNA...D OR N PACKAGE ULNA...N PACKAGE ULNA, ULNA... D, N, OR NS PACKAGE ULQA, ULQA...D PACKAGE (TOP IEW) B B B B B B B E 8 C C C C C C C COM Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright, Texas Instruments Incorporated POST OFFE BOX DALLAS, TEXAS
ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY logic diagram The ULNA is obsolete B COM C B C B C B C B C B C B C schematics (each Darlington pair) COM COM Input B C Input B. kω C. kω kω E. kω kω E ULNA ULNA COM Input B RB C ULN/ULQA: RB =. kω ULN/ULQA: RB =. kω. kω kω E All resistor values shown are nominal. ULNA, ULNA, ULQA, ULQA POST OFFE BOX DALLAS, TEXAS
The ULNA is obsolete ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY absolute maximum ratings at C free-air temperature (unless otherwise noted) Collector-emitter voltage.................................................................... Clamp diode reverse voltage (see Note )..................................................... Input voltage, I (see Note )................................................................ Peak collector current (see Figures and )............................................. ma clamp current, I OK................................................................ ma Total emitter-terminal current............................................................... A Continuous total power dissipation..................................... See Dissipation Rating Table Package thermal impedance, θ JA (see Note ): D package................................... C/W N package................................... C/W NS package................................. C/W Operating free-air temperature range, T A, ULNxA.................................. C to C ULQxA................................. C to 8 C Lead temperature, mm (/ inch) from case for seconds............................... C Storage temperature range, T stg................................................... C to C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.. The package thermal impedance is calculated in accordance with JESD -. PACKAGE DISSIPATION RATING TABLE TA A = C DERATING FACTOR TA A = 8 C POWER RATING ABOE TA = C POWER RATING D mw. mw/ C mw N mw. mw/ C 8 mw electrical characteristics, T A = C (unless otherwise noted) PARAMETER TEST FIGURE TEST CONDITIONS ULNA ULNA MIN TYP MAX MIN TYP MAX I(on) On-state input voltage CE =, = ma Collector-emitter CE(sat) saturation voltage II = µa, = ma.... II = µa, = ma.. II = µa, = ma.... F Clamp forward voltage 8 IF = ma.. EX Collector cutoff current CE =, II(off) Off-state input current TA = C CE =, II = UNIT CE =, II = µa TA = C I = C = µa, µa II Input current I =.8. ma IR Clamp reverse current hfe Static forward current transfer ratio R =, TA = C R = CE =, = ma Ci Input capacitance I =, f = MHz pf µa POST OFFE BOX DALLAS, TEXAS
ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY electrical characteristics, T A = C (unless otherwise noted) PARAMETER TEST FIGURE I(on) On-state input voltage CE = Collector-emitter CE(sat) saturation voltage EX Collector cutoff current TEST CONDITIONS The ULNA is obsolete ULNA ULNA MIN TYP MAX MIN TYP MAX = ma = ma. = ma. = ma = ma = ma 8 II = µa, = ma.... II = µa, = ma.. II = µa, = ma.... CE =, II = UNIT CE =, II = µa TA = C I = F Clamp forward voltage 8 IF = ma.. CE =, II(off) Off-state input current TA = C = µa,, I =.8.. µa II Input current I =.. ma IR Clamp reverse current I =. R = R =, TA = C Ci Input capacitance I =, f = MHz pf µa POST OFFE BOX DALLAS, TEXAS
The ULNA is obsolete ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST FIGURE I(on) On-state input voltage CE = Collector-emitter CE(sat) saturation voltage EX Collector cutoff current TEST CONDITIONS ULQA ULQA MIN TYP MAX MIN TYP MAX = ma = ma. = ma. = ma = ma = ma 8 II = µa, = ma.... II = µa, = ma.. II = µa, = ma.... CE =, II = = I I = µa CE I = F Clamp forward voltage 8 IF = ma... II(off) Off-state input current CE =, = µa µa I =.8.. II Input current I =.. ma IR Clamp reverse current I =. R =, TA = C R = Ci Input capacitance I =, f = MHz pf UNIT µa switching characteristics, T A = C PARAMETER TEST CONDITIONS ULNA, ULNA, ULNA, ULNA MIN TYP MAX UNIT tplh tphl Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output See Figure. µs. µs OH High-level output voltage after switching S =, See Figure IO ma, S m switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS ULQA, ULQA MIN TYP MAX UNIT tplh tphl Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output See Figure µs µs OH High-level output voltage after switching S =, See Figure IO ma, S m POST OFFE BOX DALLAS, TEXAS
ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY PARAMETER MEASUREMENT INFORMATION The ULNA is obsolete CE CE EX EX I Figure. I CEX Test Circuit Figure. I CEX Test Circuit CE II(off) II(on) I Figure. I I(off) Test Circuit Figure. I I Test Circuit hfe = I C II II CE I(on) CE NOTE: II is fixed for measuring CE(sat), variable for measuring hfe. Figure. h FE, CE(sat) Test Circuit Figure. I(on) Test Circuit R IR F IF Figure. I R Test Circuit Figure 8. F Test Circuit POST OFFE BOX DALLAS, TEXAS
The ULNA is obsolete ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY PARAMETER MEASUREMENT INFORMATION Input % % t PHL t PLH % % OLTAGE WAEFORMS Figure. Propagation Delay-Time Waveforms S Pulse Generator (see Note A) Input ULNA only. kω ULNA ULN/ULQA ULN/ULQA N mh Ω CL = pf (see Note B) TEST CIRCUIT Input ns % %.. % % µs ns IH (see Note C) OLTAGE WAEFORMS OH OL NOTES: A. The pulse generator has the following characteristics: PRR =. khz, ZO = Ω. B. CL includes probe and jig capacitance. C. For testing the ULNA, the ULNA, and the ULQA, IH = ; for the ULNA, IH = ; for the ULNA and the ULQA, IH = 8. Figure. Latch-Up Test Circuit and oltage Waveforms POST OFFE BOX DALLAS, TEXAS
ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY The ULNA is obsolete TYPAL CHARACTERISTS COLLECTOR-EMITTER SATURATION OLTAGE vs COLLECTOR CURRENT (ONE DARLINGTON) COLLECTOR-EMITTER SATURATION OLTAGE vs TOTAL COLLECTOR CURRENT (TWO DARLINGTONS PARALLELED) CE(sat) Collector-Emitter Saturation oltage CE(sat)... TA = C II = µa II = µa II = µa Collector Current ma 8 CE(sat) Collector-Emitter Saturation oltage... TA = C II = µa II = µa II = µa (tot) Total Collector Current ma 8 Figure Figure Collector Current ma RL = Ω TA = C COLLECTOR CURRENT vs INPUT CURRENT S = S = 8 II Input Current µa Figure 8 POST OFFE BOX DALLAS, TEXAS
The ULNA is obsolete ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY THERMAL INFORMATION D PACKAGE MAXIMUM COLLECTOR CURRENT vs DUTY CYCLE N PACKAGE MAXIMUM COLLECTOR CURRENT vs DUTY CYCLE Maximum Collector Current ma N = N = N = N = N = N = TA = C N = Number of s Conducting Simultaneously N = 8 Duty Cycle % Maximum Collector Current ma N = N = N = TA = 8 C N = Number of s Conducting Simultaneously N = Duty Cycle % N = N = N = 8 Figure Figure POST OFFE BOX DALLAS, TEXAS
ULNA, ULNA, ULNA, ULNA, ULQA, ULQA, SLRSC DECEMBER REISED MAY APPLATION INFORMATION The ULNA is obsolete SS ULNA CC ULNA ULQA P-MOS 8 8 TTL Lamp Test Figure. P-MOS to Load Figure. TTL to Load DD ULNA ULQA CC ULNA ULQA RP CMOS 8 Figure 8. Buffer for Higher Current Loads TTL 8 Figure. Use of Pullup Resistors to Increase Drive Current POST OFFE BOX DALLAS, TEXAS
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