Low-Power RF Integrated Circuit Design Techniques for Short-Range Wireless Connectivity Marvin Onabajo Assistant Professor Analog and Mixed-Signal Integrated Circuits (AMSIC) Research Laboratory Dept. of Electrical and Computer Engineering Northeastern University, Boston, USA Email: monabajo@ece.neu.edu Website: www.ece.neu.edu/~monabajo ES2 Northeastern University Planning Grant Meeting November 30, 207
Introduction Outline Motivation for low-power RF CMOS circuit design Technical challenges Linearity improvement method for subthreshold low-noise amplifiers Theory and simulation Measurement results Integrated RF front-end chip Low-noise amplifier and mixer Measurement results Conclusions 2
Health Monitoring Application Example: Wireless Body Area Network (WBAN) Circuit design challenges (in addition to performance, size, reliability, cost) Reduction of power consumption to extend battery lifetime Resilience to interference signals 3
Subthreshold RF Design Considerations Power efficiency Higher transconductance-to-drain current (g m /I D ) ratio than in the strong inversion region Suitable for low supply voltages Lower transition frequency (ω T g m /C gg ) Capacitance C gs does not dominate in the subthreshold region Other parasitic capacitances (C gd and C gb ) should be carefully taken into account 4
Subthreshold RF Design Considerations (cont.) For a weakly nonlinear transconductance amplification stage: i d g v g v g v 2 3 gs 2 gs 3 gs where: g = g m (linear transconductance gain) g 2 and g 3 are the 2 nd -order and 3 rd -order nonlinearity coefficients g I V D GS, g 2 2 2 I V D 2, g 3 6 3 I D 3 GS V GS Subthreshold linearity characteristics Sign change of g 3 /g High g 3 /g ratio (signal distortion) 5
Linearized Subthreshold Low-Noise Amplifier (LNA) 3 3 rd -order nonlinearity (distortion) cancellation Without active components minimization of power consumption No cross-coupling is required permits the use of a single-ended architecture C.-H. Chang and M. Onabajo, Linearization of subthreshold low-noise amplifiers, in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS), pp. 377-380, May 203. 6
3 3rd-Order Intermodulation Intercept Point (IIP3) where: Analysis result: ),2 ( ) ( ) ( 6 3 3 A H R IIP s g g ob 3 ),2 ( ) (2 ) ( 2 3 2 2 2 g g g g g g ob ) ( ) ( ) ( ) ( ) ( ) ( 3 x x gs gd C j C j g ] [ 3 2 3 2 2 C j gd x 7
IIP3 Evaluation with Various L g2 and C gd2_ext Values 8
Chip Micrographs of Fabricated Linearized Subthreshold LNAs AMSIC Research Lab (a) Work (b) Work 2 (a) Dongbu 0.μm CMOS technology C.-H. Chang and M. Onabajo, Low-power low-noise amplifier IIP3 improvement under consideration of the cascode stage, in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS), May 207. (b) IBM 0.3μm CMOS technology 9
LNA Printed Circuit Board with IIP3 Tuning Functionality 0
Comparison with Other Subthreshold LNAs Reference Work + Work 2 + [] + [2] + [3] # [4] $ [5] f c [GHz].8 2. 2.4 3 2.4 S 2 [db] 4.8 9 2.4 4.5 3.6 3. 6.8 NF [db] 3.7 5.8 5.2 6.3 4.6 5.3 3.9 IIP3 [dbm] -3.7 0 - -0.5 7.2-2.2 -.2 P db [dbm] -2.6-8.4-5 -9.5 0.2-9 -2 P DC [μw] 336 300 34 56 260 60 00 Tech. [μm] 0. 0.3 0.8 0.3 0.8 0.3 0.8 Layout [mm 2 ] (# of Ind.) 0.624 (3) 0.24 (3) 0.77 () 2.0 (4) 0.694 (3) 0.63 (2) 0.809 () FOM 9.7 8.5-0.7-0.5 7. -6.6 5.6 + measured in package (cascode topology) # probe measurements (single-transistor topology) $ measured in package (self-biased inverter topology) measured in package (inductive feedback topology) FOM Gain[ abs] IIP3[ mw ] f [ GHz] 0 log ( NF[ abs] ) PD[ mw ]
References [] A. V. Do, C. C. Boon, M. A. Do, K. S. Yeo, and A. Cabuk, A subthreshold low-noise amplifier optimized for ultra-low-power applications in the ISM band, IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 2, pp. 286-292, Feb. 2008. [2] H. Lee and S. Mohammadi, A 3GHz subthreshold CMOS low noise amplifier, in Proc. Radio Frequency Integrated Circuits (RFIC) Symp., June 2006. [3] B. G. Perumana, S. Chakraborty, C.-H. Lee, J. and Laskar, A fully monolithic 260- μw, -GHz subthreshold low noise amplifier, IEEE Microwave Theory and Wireless Component Letters, vol. 5, no. 6, pp. 428-430, June 2005. [4] T. Taris, J. Begueret, and Y. Deval, A 60μW LNA for 2.4 GHz wireless sensors network applications, in Proc. Radio Frequency Integrated Circuits (RFIC) Symp., June 20. [5] A. Shameli and P. Heydari, A novel ultra low power low noise amplifier using differential inductor feedback, IEEE European Solid State Circuit Conference (ESSCIRC), Sep. 2006, pp. 352-355. 2
Low-Power RF Front-End Combined LNA & mixer to demonstrate the compatibility of the linearization techniques Proof-of-concept measurements L. Xu, C.-H. Chang, and M. Onabajo, A 0.77mW 2.4GHz RF front-end with -4.5dBm in-band IIP3 through inherent filtering, IEEE Microwave and Wireless Components Letters (MWCL), vol. 26, no. 5, pp. 352-354, May 206. 3
Die Micrograph of the RF Front-End (0.3μm CMOS Technology) 4
Measurement Setup Measured voltages at the intermediate frequency (IF) outputs Simulated voltages at the IF outputs 5
Performance Summary and Comparison 6
References [6] A. Selvakumar, M. argham, and A. Liscidini, Sub-mW Current Re-Use Receiver Front- End for Wireless Sensor Network Applications, IEEE J. Solid-State Circuits, vol. 50, no. 2, Dec. 205. [7]. Lin, P.-I. Mak, and R. P. Martins, A 0.4-mm 2.4-mW 59.4-dB-SFDR 2.4 GHz igbee/wpan Receiver Exploiting a Split-LNTA + 50% LO topology in 65-nm CMOS, IEEE Trans. on Microwave Theory and Techniques, vol. 62, no. 7, pp. 525-534, Jul. 204. [8]. Lin, P.-I. Mak and R. P. Martins, A 2.4-GHz igbee Receiver Exploiting an RF-to-BB- Current-Reuse Blixer + Hybrid Filter Topology in 65-nm CMOS, IEEE J. of Solid-State Circuits, vol. 49, pp. 333-344, June 204. [9] F. hang, K. Wang, J. Koo, Y. Miyahara, and B. Otis, A.6mW 300mV-Supply 2.4GHz Receiver with -94dBm Sensitivity for Energy-Harvesting Applications, in Int. Solid-State Circuits Conf. Tech. Dig., pp. 456-457, Feb. 203. [0] B. W. Cook, A. D. Berny, A. Molnar, S. Lanzisera, and K. S. J. Pister, Low-power 2.4- GHz Transceiver With Passive RX Front-End and 400-mV Supply, IEEE J. Solid-State Circuits, vol. 4, no. 2, pp. 2757-2766, Dec. 2006. 7
Conclusion Subthreshold LNA linearization method to enable low-power design Extra inductor and capacitor for nonlinearity cancellation Negligible impact on power, noise and gain design tradeoffs IIP3 improvement: 4.8-.2 db -db compression point improvement: 7.-.6 db Linearization techniques for low-power RF front-ends in short-range wireless communication devices Adaptation of the linearization technique for low-power active mixers Demonstrated with a low-power linearized RF front-end The design methods do not require an auxiliary amplifier circuit Suitable for low-power applications 8
Thank You. Questions are Welcome. Marvin Onabajo Analog and Mixed-Signal Integrated Circuits (AMSIC) Research Laboratory Dept. of Electrical and Computer Engineering Northeastern University, Boston, USA Email: monabajo@ece.neu.edu Website: www.ece.neu.edu/~monabajo The projects were supported in part by the National Science Foundation under awards #349692 and #4523.
Appendix
Examples of Low-Power Wireless Communication Standards AMSIC Research Lab Wireless Personal Area Network (WPAN) Wireless Body Area Network (WBAN) Bluetooth Low Energy (BLE) IEEE 802.5.4 (igbee) IEEE 802.5.6 Frequency Range 2.4-2.4835 GHz 2.4 GHz, 868 MHz, 95 MHz, 2.4-2.2483 GHz, 2.36-2.4 GHz(US), (400/868/95/950 MHz) Data Rate Mbps 20 Kbps 250 Kbps 75.9 Kbps 97.4 Kbps Network Size undefined up to 65536 devices up to 256 devices Range 0-75 m 0-00 m 2-5 m 2
Generalized Linearization Approach AMSIC Research Lab Commonly used technique for LNAs: one or more auxiliary amplifiers to cancel the 3 rd -order nonlinearity term of the main amplifier Main amplifier: typically in strong inversion Auxiliary amplifier: in strong inversion or weak inversion (depending on the topology) α 3 = α 3m + α 3a = 0 Main drawback: extra power consumption and increased complexity due to the DC biasing circuitry for the auxiliary amplifier(s) 22
3 Analysis with and without L g2 and C gd2_ext Small-signal equivalent circuit for the second stage (with M 2 ) and load: Conventional LNA: 3conv ( ) g j m C 2 gs 2 Linearized LNA: 3_ Lin ( ) j C g m2 gd 2 d j C ( j C gs2 gs2 j C gd 2 j C ( g m2 gd 2 2 C j C gs2 gs2 C )( d gd 2 d ) g2 ) g2 23
IIP3 Simulation Results >db IIP3 improvement for input power levels below -35dBm 24
LNA IIP3 vs. C gd2_ext Comparison (Simulation vs. Measurement Results) IIP3 vs. tuning code 25
Linearized Subthreshold Mixer AMSIC Research Lab R d R d IF - IF + LO + M 2 M 3 M 3 M 2 LO + X C C LO- X C C RF + M M RF - Structure with cross-coupling capacitors (C C ) Negative capacitance generation to partially cancel the parasitic capacitance at X Terminal impedances can be adjusted to enhance IIP3 Enables wideband linearization L. Xu, K. Wang, C.-H. Chang, and M. Onabajo, Inductorless linearization of low-power active mixers, in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS), pp. 223-226, May 205. 26
Differential Front-End with LNA and Mixer: Measured S Parameter, Voltage Conversion Gain and Noise Figure (NF) Voltage gain from the LNA input to mixer output (IF = 0MHz) and S vs. frequency Voltage gain and NF vs. LO power 27
Differential Front-End with LNA and Mixer: Linearity Performance Measurements (IIP3 & IM3) IIP3 of the RF front-end IM3 dbc with input power of -3.5dBm (including 0.3dB loss from the buffer stage) 28