Benefit of ArF immersion lithography in 55 nm logic device manufacturing

Benefit of ArF immersion lithography in 55 nm logic device manufacturing Takayuki Uchiyama* a, Takao Tamura a, Kazuyuki Yoshimochi a, Paul Graupner b, Hans Bakker c, Eelco van Setten c, Kenji Morisaki d, a NEC Electronics Corporation, 112 Shimokuzawa, Sagamihara, Kanagawa, Japan, 229-1198; b Carl Zeiss, Semiconductor Manufacturing Technology AG, 73447 Oberkochen, Germany; c ASML, De Run 651, DR Veldhoven, The Netherlands; d ASML Japan, 2-15-1 Konan, Minato-ku, Tokyo 18-622, Japan ABSTRACT In this paper we demonstrate the many benefits of using immersion lithography that go beyond depth of focus (DOF) improvement by comparing several key features of dry and immersion lithography. Immersion lithography improves critical dimension uniformity (CDU) as well as avoiding the necessity for strong resolution enhancement techniques (RET) as compared with dry lithography. Thus it is possible to significantly reduce the burden of optical proximity correction (OPC) work with immersion lithography. With respect to imaging, we studied the sensitivity of the lithographic performances to aberrations and light source spectral bandwidth E95 fluctuations to highlight the benefits of immersion lithography. The significant improvements that have been seen in the last year in overlay accuracy, defect control and focus & leveling accuracy have been considered to be challenges to the realization of immersion lithography in mass production. Now these challenges have been met for the manufacturing requirements of 55 nm logic devices. The achievements of immersion lithography include overlay accuracy within 1 nm on resist-to-resist wafers and within 2 nm on production wafers, fewer than 1 defects per wafer, and errors of less than 4 nm in focus & leveling on full wafers. We have established a top-coat resist process. In conclusion, immersion lithography is the most promising manufacturing solution for 55 nm node logic devices, providing advantages in CDU control, and equivalent overlay performance and focus & leveling accuracy to dry ArF, without an increased level of defects. NEC Electronics has completed development and preproduction of the 55 nm logic device UX7LS using immersion lithography and has established the lithography technology for mass production of the UX7LS this year. Keywords: Immersion lithography, 55nm logic device, Imaging, Overlay, CD uniformity 1. INTRODUCTION ArF immersion lithography is the technology that will follow dry ArF, leading to smaller devices in the future, at the 65 nm node and below 1-13. This technology is ready for mass production, as immersion exposure tools with a numerical aperture () larger than 1. have started to be shipped. Many technological challenges had to be overcome to bring about immersion lithography for mass production, but those challenges have been met. In this paper, we discuss the current status of immersion lithography, focusing on the pros and cons of its introduction to a mass production environment, especially for lower (<1.) applications by comparative factor analysis of several lithographic performance errors. The key challenges in ArF immersion are defectivity and overlay control. There are several concerns in the immersion process such as tool contamination and/or defects due to leaching from the resist material, pattern defects, and resist profile degradation due to water droplets. Thus immersion hood improvements and a hydrophobic topcoat have been introduced. Also, overlay accuracy degradation due to water evaporation is a concern as it can cause wafer temperature instability during exposure. We have confirmed that overlay performance is well controlled by having a wafer table temperature control system in the exposure tool. *t.uchiyama@necel.com

With respect to imaging performance, DOF improvement with immersion lithography is well known. Recently the burden of OPC work for ASIC devices has become a more serious issue. Reduction in the burden of OPC work is a significant benefit of immersion lithography, as the use of strong RETS can be avoided due to improved DOF. In this paper, we will highlight the advantages of immersion lithography by contrasting it with dry lithography for 55 nm logic device patterns with respect to robustness against imaging errors, and sensitivity to aberrations and to E95 fluctuation under optimum optical conditions. Also, we will show that overlay, focus and defect control of immersion lithography meet the requirements for 55 nm logic device manufacture due to significant improvements in the past year. Finally, we will discuss the status of immersion lithography as applied to the UX7LS 55 nm logic device by NEC Electronics. 2. IMAGING PERFORMANCE COMPARISON Optical conditions for an 8 nm line pattern were optimized for both immersion and dry lithography. Simulation was done assuming a gate layer for a 55 nm logic device. CDUs were calculated with each error factor, assuming conventional illumination with Att-PSM, annular illumination with attenuated phase shift mask (Att-PSM) and conventional illumination with alternated phase shift mask (Alt -PSM). It was assumed that the was smaller than 3. The simulation conditions are shown in Table 1, and results in Figure 1a~c. Item Simulation mode CD Partial coherence (sigma) Pattern Error Table 1 Simulation condition for optimizing & Sigma setting Conditions Vector mode light intensity threshold.78~3, dry & wet(n=1.44).7~@conv.+attpsm (6%) Outer sigma=.75~@2/3 Annular + AttPSM (6%).3~.45@Conv.+Alt-PSM 8nm L&S, pitch=,, Mask error=+/-2nm Dose error=+/-1.2% Focus error=+/-5nm Flare=1% (fixed).85.85.8.8.75.75.78.81.84.87 3.7.78.81.84.87 Figure 1a CDU Map of Conv. + Att-PSM 3.7

.85.85.8.8.78.81.84.87 3.75.78.81.84.87 Figure 1b CDU Map of Annular + Att-PSM 3.75.45.45.4.4.35.35.78.81.84.87.78.81.84.87 3.3 Figure 1c CDU Map of Conv. + Alt-PSM 3.3 Figure 2a shows a summary of CDUs for each optimum and sigma setting. It was found that immersion lithography gave better CDU than dry when the same exposure method was used. lithography using Alt-PSM could not give better CDU than immersion lithography using conventional illumination. Therefore, a strong RET was not required for immersion lithography to achieve the same CDU as dry lithography. 15 CDU (nm) 8.7 8. 5.7 12.6 11.1 9.9 1 5 Figure 2a Optimized and sigma setting and CDU 3/.8 Conv. 3/.75 Annular 3/.3 alt-psm /.8 Conv..87/.75 Annular 3/.3 alt-psm

Sensitivity to coma and spherical aberration was evaluated. As mentioned above, conventional illumination with Att- PSM, annular illumination with Att-PSM and Alt PSM were optimized and used. The simulation conditions are shown in Table 2. Sensitivity was defined as CD changes per Zernike aberration (nm). Figure 2b shows the CD sensitivity against spherical aberration with a 1 nm defocus condition. Table 2 Simulation conditions for aberration sensitivity Item Conditions Aberrations Z7, Z14 (coma), Z9, Z16 (spherical) Patterns 8nm line and space, pitch= 8nm line and space, pitch= 8nm line and space, pitch= (Iso) 8nm line 2-bar, pitch= & sigma setting and mask WC)3/.8 Conv. + AttPSM WA)3/.75 2/3 Annular + AttPSM WL)3/.3 Conv. + AltPSM DC)/.8 Conv. + Att-PSM DA).87/.75 2/3 Annular + AttPSM DL)3/.3 Conv. + AltPSM Sensitivity (nm/nm_in_zernike) 1.8.7.6.5.4.3.2.1 pitch Z9 Z16 WC WA WL DC DA DL Figure 2b CD sensitivities of spherical aberration Sensitivity (nm/nm_in_zernike) 1.5 1.5 WC WA WL DC DA DL Z7 Z14 Figure 2c Delta CD sensitivities in 2-bar of coma aberration

lithography displayed 3-5 % higher sensitivity to spherical aberration than immersion lithography. Immersion lithography was less sensitive to longitudinal aberrations because of its greater DOF. The sensitivity to spherical aberration of dry lithography with Alt-PSM was 1 nm/nm, the highest sensitivity among the conditions used in these evaluations. Coma aberration (lateral) generated a CD difference of 2-bar or placement error of the pattern. As shown in Figures 2c and 2d, it was clear that there was no great difference between dry lithography and immersion lithography. The CD difference of 2-bar for alt-psm was large at 1 nm/nm for Z7 with dry exposure, and it was very small with conventional illumination. Sensitivity (nm/nm_in_zernike) 1.4 1.2 1.8.6.4.2 pitch Z7 Z14 WC WA WL DC DA DL Figure 2d Overlay sensitivities of coma aberration Sensitivity (nm/[sigma error(%)]) 2.5 2 1.5 1.5 pitch WC WA WL DC DA DL Figure 2e CD sensitivities of sigma Figure 2e shows the sensitivity of illumination sigma on CD. Conventional illumination with Att-PSM showed high sensitivity, which was different from aberration sensitivity. Immersion lithography displayed 2% lower sensitivity than dry lithography. The sensitivity of aberration and illumination sigma for both immersion and dry lithography were studied. It was shown that immersion lithography had an advantage over dry lithography. In particular, immersion lithography can reduce the effect of a longitudinal aberration (such as spherical aberration) on CD by 3-5%.

85 14i(wet:WC) 85 14(dry:DC) CD (nm) 8 75 7 65.3.5.7 CD (nm) 8 75 7 65 5 1 15 2 5 1 15 2 Pattern pitch (nm) Pattern pitch (nm) Figure 2f OPE curve sensitivity of spectral width E95 in case of Conv. + Att-PSM).3.5.7 Sensitivity (nm/.1pm_in_e95) 2 1.5 1.5 WC WA WL DC DA DL Figure 2g CD sensitivity of spectral width E95 The impact of the laser bandwidth E95 of the ArF excimer laser illumination source was also studied. The CD change of an 8 nm line pattern with 24 nm pitch and 2 nm pitch was calculated with E95s of.3 -.7 pm under the given conditions of and sigma and shown in Table 2. Exposure was appropriate for an 8 nm line with 18 nm pitch printed onto 8 nm. Figure 2f shows an OPE curve under conventional illumination with Att-PSM. It was found that the effect of E95 on CD using immersion lithography is 2-3% smaller than with dry lithography (Figure 2g). The spectrum width of the light source caused chromatic aberration and reduced the image contrast through imperfect focus. Thus immersion lithography had an advantage because of its greater DOF. 3. SCANNER PERFORMANCE COMPARISON In immersion lithography, filling the gap between the bottom lens of the projection optics and the wafer with water of refractive index 1.44 makes the incidence angle smaller and increases DOF by a factor of approximately 1.4, and can produce the effect of a greater than 1. In the partial-fill method, water is introduced only into the gap between the lens and wafer, to avoid leaving a water droplet behind on the wafer when the exposure is completed. Furthermore, there is a temperature control function in each part to compensate for temperature change due to water evaporation and prevent wafer deformation from causing overlay problems or focus instability to the extent possible 8. In the past year, the overlay performance of immersion lithography has shown drastic improvement. Figure 3a shows the improvement of XT:14Ei (ArF immersion) overlay performance. An 8 nm level was achieved in SMO under the present conditions, confirmed to be the same level of performance as with dry ArF for an XT:14 (less than 8 nm).

Furthermore, 3 sigma of focus accuracy in a wafer is equal to or less than 4 nm, which is quite good (Figure 3b). This is also same level as dry scanner for an XT:14 (equal to or less than 4 nm at 3 sigma). Overlay (nm) 3. 25. 2. 15. 1. 5.. 25/1/3 >2nm <2nm <15nm <1nm 25/11/3 25/12/3 26/1/3 26/2/28 level 26/3/3 26/4/3 26/5/3 26/6/3 25 26 27 26/7/3 26/8/3 26/9/3 26/1/3 26/11/3 26/12/3 27/1/3 27/2/28 Figure 3a Overlay improvement history of immersion scanner Chuck#1: 36nm 1nm 5nm nm -5nm Defocus (nm) 5 4 3 2 1 3sigma Ave Chuck#2: 38nm -1nm 1 3 9 11 17 19 Wafer No. Figure 3b Focus accuracy of immersion scanner X MA 1.nm MSD 6.9nm Y MA.7nm MSD 5.8nm result MA<2nm MSD<8nm level MA<2nm MSD<7nm Figure 3c MA and MSD of immersion scanner

In immersion lithography the introduction of water and extraction of water and air can cause vibration at the edge of a wafer, leading to problems with scan synchronization. However this was found not to be a problem across the full wafer surface, as shown in Figure 3c for XT:14Ei. The moving average (MA) of immersion lithography is equal to or less than 2 nm and moving standard deviation (MSD) is equal to or less than 8 nm. MSD is at a level that will produce no problems in imaging performance for a 55 nm logic device even though it is inferior to a dry scanner at levels equal to or less than 7 nm. 4. DEFECTIVITY In the immersion resist process, a top coat is applied together with dry resist. The top coat is selected to match the resist, with an eye to controlling surface hydrophilicity. As shown in Figure 4, the defectivity, with a top coat resist process and an XT:14Ei, is 1 and below, which is substantially similar to dry performance. A possible concern is that the wafer stage surface will be contaminated by leaching of the photo resist and particles deposited by the water. To reduce the defect rate, it is important to establish periodic cleaning procedures for the lithography tool. Line pattern Total defect 6 Pattern defect 5 Particle 1 Hole pattern Total defect 5 Pattern defect 4 Circle defect 1 Figure 4 Defectivity of immersion scanner Focus offset (nm) -2 Active -15-1 -5 5 1 15 2 25nm Gate layer Gate Focus offset (nm) -18 Contact Metal1-135 -9-45 45 9 225nm Contact layer Figure 5 Patterning results of 55nm logic device by immersion scanner 135 18

5. 55 NM LOGIC DEVICE EXPOSURE RESULTS The result of immersion lithography for a 55 nm logic device, whose minimum pitch is 18 nm, is shown below. The imaging result for an XT:14Ei with an of 3 under conventional illumination is shown in Figure 5. It is clear that a DOF greater than 2 nm was achieved. In addition, the overlay performance of the gate-layer of the 55 nm logic device is shown in Figure 6a, and the Metal-1 layer in Figure 6b. Using a Mean +3 sigma definition, X = 15.9 nm, 12.6 nm, and Y = 22 nm, 11.4 nm were achieved, confirming good performance. 6 5 mean +3_X mean +3_Y mean + 3[nm] 4 3 2 1 5 1 15 2 Wafer No. Figure 6a Overlay performance of 55nm logic device by immersion scanner, gate to STI mean +3 [nm] 6 5 4 3 2 1 mean +3_X mean +3_Y 5 1 15 2 25 Wafer No. Figure 6b Overlay performance of 55nm logic device by immersion scanner, metal 1 to contact 6. CONCLUSION We have described for the advantages and disadvantages of < 1. immersion lithography. Optical image simulation results show that CD uniformity can be improved by using immersion lithography. Strong RETs such as Alt-PSM is not required for immersion lithography to achieve the same CD uniformity as the dry lithography. From a view of sensitivity to lens aberration, immersion lithography reduces sensitivity to spherical aberration by 3-5% (one of the longitudinal aberrations). CD sensitivity to a variation in illumination sigma is 2% better with immersion lithography. Also, sensitivity to E95 laser bandwidth control is improved by 2-3%. From a machine performance point of view, the overlay accuracy of immersion scanner has been significantly improved in the past year. Current overlay accuracy has reached the 8 nm level, which is almost equal to that of the dry-arf tool. Focus control variation over the wafer also remains within 4 nm (3 sigma), which is also same level as the dry tool. For scan synchronization, the MA is less than 2 nm, the MSD is less than 8 nm. These key variables are almost identical to those of a dry-arf exposure.

Furthermore, we detected fewer than 1 pattern defects which is same level as dry lithography using top coat resist process on XT:14Ei. Thus we can conclude that proof imaging and overlay performance results give every indication that the NEC Electronics 55 nm logic device UX7LS can be fabricated successfully with immersion lithography in volume mass production. 7. FUTURE ACTION/CHALLENGES NEC Electronics will continue to pursue the cost savings offered by a top-coat-less resist process for immersion lithography. Additionally, improved in-situ cleaning methods will be required to achieve lower defect levels. ACKNOWLEDGEMENT We would like to thank Mr. J. Miyazaki of ASML Japan for his help, and to thank Mr. S. Inoue, Mr. H. Miyamoto, Mr. T. Kodama, Ms. M. Miyasaka, Mr. K. Takeda, Dr. Seiji Nagahara, Mr. T. Nakata and other members of Process Technology Division of NEC Electronics Corporation for their continuous encouragement. REFERENCES 1. B. J. Lin, Immersion lithography and its impact on semiconductor manufacturing, J. Microlith. Microfab. Microsys., 3, 377-395 (24). 2. J. Mulkens, et.al., Benefits and limitations of immersion lithography, J. Microlith., Microfab., Microsyst, 3 (1), p. 14, (24). 3. D. Flagello, et.al., Polarization effects associated with hyper-numerical-aperture (>1) lithography J. Microlith., Microfab., Microsyst. 4, 3114 (25). 4. B. Streefkerk, et.al., Extending Optical Lithography with Immersion, SPIE 5377, p.285 (24). 5. J. Mulkens, et.al., Immersion Lithography Exposure Systems: Today s Capabilities and Tomorrow s Expectations, SPIE 5754, p. 71 (24). 6. H. Nakano, et.al., Development of ArF Immersion Exposure Tool SPIE5754, p. 693(25). 7. S. Owa, et.al., Full-field exposure tools for immersion lithography, SPIE5754, p. 655 (25). 8. S. Nagahara, et.al., Immersion Effects on Lithography System Performance SPIE 6154-3, (26). 9. H. Jasper et.al., Immersion lithography with an ultrahigh- in-line catadioptric lens and a high-transmission flexible polarization illumination system, SPIE6154-69, (26). 1. B Streefkerk., et. al. A dive into clear water: immersion defect capabilities, SPIE6154-28, (26). 11. E. van Setten et. al., Pushing the boundary: low-k1 extension by polarized illumination, SPIE652-12, (27). 12. J. Mulkens et.al., Defects, overlay and focus performance improvements with five generations of immersion exposure tools, SPIE652-5, (27). 13. J.W. de Klerk et. al, Performance of a 1.35 ArF immersion lithography system for 4nm applications, SPIE 652-69, (27).