A New Three-Phase Two-Switch ZVS PFC DCM Boost Rectifier

A New Three-Phase Two-Swich ZVS PFC DCM Boos Recifier Yungaek Jang, Milan M. Jovanović, and Juan M. Ruiz Power Elecronics Laboraory Dela Producs Corporaion 5101 Davis Drive, Research Triangle Park, NC, USA Absrac A new, hree-phase, wo-swich, power-facorcorrecion (PFC recifier ha can achieve less han 5% inpucurren oal harmonic disorion (THD and feaures zerovolage swiching (ZVS of all he swiches over he enire inpu-volage and load ranges is inroduced. The proposed recifier also offers auomaic volage balancing across he wo oupu capaciors conneced in series, which makes i possible o use downsream converers designed wih lower-volageraed componen ha offer beer performance and are less expensive han heir high-volage-raed counerpars. In addiion, he proposed recifier also exhibis low common-mode EMI noise. The performance of he proposed recifier was evaluaed on a 2.8-kW prooype wih a 780-V oupu ha was designed o operae in 340-520-V L-L, RMS inpu-volage range. I. INTRODUCTION I is well esablished ha hree-phase power-facorcorrecion (PFC recifiers wih hree or more acive swiches exhibi superior power facor and inpu-curren oal harmonic disorion (THD compared wih hose implemened wih a fewer number of swiches, [1]-[15]. However, because he simpliciy and low cos of single- and wo-swich recifiers are so aracive, hey are increasingly employed in cossensiive applicaions such as, for example, hree-phase baery chargers. Major concerns in hree-phase single- and wo-swich recifiers is heir relaively low efficiency due o hard swiching and a relaively high inpu-curren THD because of heir inabiliy o acively shape each phase curren independenly. To address he efficiency issue, various implemenaions of he hree-phase single-swich recifiers wih reduced swiching losses were proposed, [2], [5], [6]. Specifically, in he circuis proposed in [2] and [5] resonan echniques are employed o achieve zero-curren swiching (ZCS of he swich, whereas in [6], ZCS is achieved by using an acive snubber. Generally, all hese echniques require addiional circuiry ha increases heir complexiy and cos. In addiion, he implemenaions employing resonan echniques suffer from high volage and/or curren sresses. To improve he inpu-curren THD of he hree-phase single- and wo-swich recifiers, a number of harmonicinjecion echniques were inroduced in [3], [8]-[10]. In [3], a hird-harmonic injecion echnique for wo-swich recifiers was proposed ha can reduce line-curren THD below 5%, which is a ypical requiremen for oday s recifiers. However, his echnique and is refinemens are no quie suiable for implemenaion in sae-of-he-ar, high-power densiy, highefficiency recifiers since hey require addiional componens such as low-frequency harmonic filers, or zig-zag auoransformers ha have adverse effecs on he efficiency, size, weigh, and cos. The harmonic-injecion echniques for single-swich recifiers inroduced in [8]-[10] do no require addiional componens since he harmonic injecion is solely performed a he conrol level. While all hese echniques are proven o reduce THD wihou penalizing efficiency, hey are no capable of reducing he THD below 5% Anoher major concern in he applicaion of hree-phase fron-end PFC recifiers ha employ he boos opology is he adverse effec of heir high oupu volage on he cos and performance of downsream converer(s. Namely, for recifiers operaing wih a nominal hree-phase line-o-line volage 380/480 V, he oupu volage is ypically in he 800-V range. Because he majoriy of high-performance lowcos silicon devices are raed below 650 V and he majoriy of high-energy-densiy low-cos aluminum capaciors are raed below 450 V, he high oupu volage of he fron-sage recifier dicaes he use of relaively inefficien and expensive componens in downsream converers, unless he oupu volage is divided by wo capaciors in series so ha low-volage-raed componens in downsream converers can be used. While he spli capacior approach may seem aracive since i eliminaes a need for high-volage-raed componens, i is no preferred because i suffers from a volage imbalance of he spli oupu capaciors. Alhough here are many echniques ha can acively balance he volages across he spli capaciors, hose echniques ypically require addiional sensing componens and conrol loops, which increases he cos and he complexiy of heir conrol, [16]-[18]. In his paper, a new, hree-phase, wo-swich, zerovolage-swiching (ZVS, disconinuous-curren-mode 0 V A V B V C C 1 C 2 C 3 D 1 D 2 D 3 D 4 D 5 D 6 Fig. 1. Proposed hree-phase wo-swich ZVS PFC DCM boos recifier. N S 1 S 2 C R L C C O1 R C O2 978-1-4577-1216-6/12/$26.00 2012 IEEE 807

(DCM, PFC boos recifier is inroduced. The proposed recifier achieves less han 5% inpu-curren THD over he enire inpu range and above 20% load and feaures ZVS of all he swiches wihou any addiional sof-swiching circuiry. Moreover, he proposed recifier has auomaic volage balancing across he wo oupu capaciors conneced in series. As a resul, he volage across he wo oupu capaciors can be used eiher as a single high-volage oupu or wo idenical low-volage oupus, where series conneced downsream converers wih low-cos high-performance componens are employed. In addiion, he common-mode elecro-magneic inerference (EMI of he proposed recifier is quie low. The evaluaion of he proposed recifier was performed on a hree-phase 2.8-kW prooype operaing in he 340-520-V L-L, RMS line-volage range. II. THREE-PHASE TWO-SWITCH ZVS PFC DCM BOOST RECTIFIER Figure 1 shows he proposed hree-phase wo-swich ZVS PFC DCM boos recifier. In he proposed circui, he hree Y-conneced capaciors, C 1, C 2, and C 3, are used o creae virual neural N, i.e., a node wih he same poenial as power source neural 0 ha is no physically available or conneced in hree-wire power sysems. Since he virual neural is conneced o he mid-poin beween wo swiches S 1 and S 2 and also o he mid-poin of wo oupu capaciors C O1 and C O2, he poenials of hese wo mid-poins are he same as he poenial of neural 0 of he balanced hree-phase power source. In addiion, by connecing virual neural N direcly o he mid-poin beween swiches S 1 and S 2, decoupling of he hree inpu currens is achieved. In such a decoupled circui, he curren in each of he hree inducors is dependen only on he corresponding phase volage, which reduces he THD and increases he PF, [11]. Specifically, in he circui in Fig. 1, bridge diodes D 1 -D 6 allow only he phases wih posiive phase volages o deliver currens hrough swich S 1 when i is urned on and allow only he phases wih negaive phase volages o deliver currens hrough swich S 2 when swich S 2 is on. Therefore, he boos inducor in he phase in a posiive volage half-line cycle carries posiive curren N D 1 D 5 D 6 S 1 i S2 S 2 C R N 1 N 2 L M L LK1 1 2 L LK2 Fig. 2. Simplified circui diagram of proposed hree-phase boos power sage showing reference direcions of currens and volages in 60 0 -segmen where > 0, < 0, and < 0. i M when swich S 1 is on, while he boos inducor in he phase in a negaive volage half-line cycle carries negaive curren when swich S 2 is on. During he ime when swich S 1 is off, he sored energy in he inducor conneced o he posiive phase volage is delivered o capacior C R, whereas he sored energy in he inducor conneced o he negaive phase volage is delivered o capacior C R during he ime when swich S 2 is off. Because every swiching cycle he volage of each erminal of capacior C R changes wih a high dv/d, coupled inducor L C is conneced beween flying capacior C R and oupu o isolae he oupu from hese fas highvolage ransiions ha usually produce unaccepable common-mode EMI noise. Wih coupled inducor L C, he oupu common-mode noise is very low since i is conained in a relaively small area consising of he S 1 -S 2 -C R loop. Moreover, because of he presence of coupled inducor L C, a parallel operaion of muliple recifiers is also possible. III. ANALYSIS OF OPERATION To simplify he analysis of operaion, i is assumed ha ripple volages of he inpu and oupu filer capaciors shown in Fig. 1 are negligible so ha heir volages can be represened by consan-volage source,,, 1, and 2 as shown in Fig. 2. Also, i is assumed ha in he on sae, semiconducors exhibi zero resisance, i.e., hey are shor circuis. However, he oupu capaciances of he swiches are no negleced in his analysis. Coupled inducor L C in Fig. 1 is modeled as a wo-winding ideal ransformer wih magneizing inducance L M and leakage inducances L LK1 and L LK2. I should be noed ha he average volage across capacior C R is equal o oupu volage = 1 2. Since in a properly designed recifier he ripple volage of capacior C R is much smaller han oupu volage, volage across capacior C R can be consider consan and equal o. The circui diagram of he simplified recifier along wih he reference direcions of currens and volages is shown in Fig. 2. I should be noed ha he inpu model in Fig. 2 is only valid in a 60-degree segmen of he line cycle where > 0, <0, and <0. However, he same model is applicable o any oher 60-degree segmen wih a corresponding change of polariies of volage sources,, and. To furher faciliae he explanaion of he operaion, Fig. 3 shows opological sages of he circui in Fig. 2 during a swiching cycle, whereas Fig. 4 shows he power-sage key waveforms. As can be seen from he gae-drive iming diagrams for swiches S 1 and S 2 in Fig. 4, he swiches operae in a complemenary fashion wih approximaely 50% duy cycle and wih a shor dead ime beween he urn-off of swich S 1 and he urn-on of swich S 2, and vice versa. Because of his gaing sraegy, boh swiches can achieve ZVS. However, o mainain ZVS for a varying inpu volage and/or oupu load, he proposed recifier mus employ a variable swiching frequency conrol. The minimum frequency is se a full load and minimum inpu volage, 808

1 C OSS1 1 2 C OSS2 2 (a [T 0 - T 1] (b [T 1 - T 2] 1 1 2 2 (c [T 2 - T 3] (d [T 3 - T 4] 1 1 C OSS1 2 2 C OSS2 (e [T 4 - T 5] (f [T 5 - T 6] 1 1 2 2 (g [T 6 - T 7] (h [T 7 - T 8] 1 1 2 2 (i [T 8 - T 9] (j [T 9 - T 10] Fig. 3. Topological sages of proposed boos power sage when > 0 and < < 0. whereas he maximum frequency is se a ligh load and maximum inpu volage. The recifier operaes in conrolled burs mode a no load or a a very ligh load o avoid unnecessarily high swiching frequency. I should be noed 809

ha oher conrol sraegies could also be applied o his circui, including consan-frequency PWM conrol. However, wih PWM conrol, ZVS canno be mainained. As shown in Figs. 3(a and 4, before swich S 1 is urned off a =T 1, inducor curren flows hrough swich S 1. The slope of inducor curren is equal o / and he peak of he inducor curren a =T 1 is approximaely I VAN TS =, (1 (PK 1 where is line-o-neural volage and T S is he swiching period. Because he dead ime beween urn-off of swich S 1 and urn-on of swich S 2 is very small in comparison wih swiching period T S, he effec of he dead ime is negleced in Eq. (1, i.e., i is assumed ha he duy cycle of swich S 1 is exacly 50%. During he period beween T 0 and T 1, curren S 1 V S1 T OFF T S T ON S 2 T ON T OFF - - - - - i L L2 2 ZVS decreases wih he rae -1 /(L M L LK1 while curren increases wih he rae ( -1 /(L M L LK2. I should be noed ha he magneizing inducance value of coupled inducor L C is designed o be sufficienly large so ha he ripple curren in he coupled inducor does no significanly affec recifier operaion. As shown in Fig. 1 by he do convenion, he wo windings of inducor L C are coupled in such a way as o cancel he magneic fluxes from he differenial curren of he wo windings so ha he large magneizing inducance can be obained by a small gap in he core wihou sauraion. A =T 1, when swich S 1 is urned off, inducor curren sars charging he oupu capaciance of swich S 1, Fig. 3(b. Because he sum of he volages across swich S 1 and swich S 2 is clamped o he flying capacior volage, he oupu capaciance of swich S 2 discharges a he same rae as he charging rae of he oupu capaciance of swich S 1. This period ends when he oupu capaciance of swich S 2 is fully discharged and he ani-parallel body diode of swich S 2 sars conducing a =T 2, as shown in Fig. 3(c and Fig. 4. Because he body diode of swich S 2 is forward biased, inducor currens and begin o increase linearly. A =T 3, swich S 2 is urned on wih ZVS and inducor currens and are commuaed from he aniparallel diode of swich S 2 o he swich, Fig. 3(d. This period ends when inducor curren decreases o zero a =T 4. To mainain DCM operaion, he ime period beween =T 3 and =T 4 mus be less han one-half of swiching period T S which means ha he rising slope of inducor curren should be smaller han is falling slope. As illusraed in Fig. 4, he rising and falling slopes of are / and ( - /, respecively. As a resul, minimum volage (MIN across flying capacior C R, whose average is equal o oupu volage, is V S2 ZVS V CR(MIN 2 2 = 2 VAN(PK = V, (2 L L, RMS 3 V LC -1 where -PK is he peak line-o-neural volage. i S2 -V BN -V AN 1 - -V AN L 1 I should also be noed ha because during he T 2 -T 4 inerval inducor currens and flow in he opposie direcion from inducor curren, he average curren hrough swich S 2 is reduced so ha he swiches in he proposed recifier exhibi reduced power losses. During he period beween =T 4 and =T 5, inducor currens and coninue o flow hrough swich S 2, Fig. 3(e. The slopes of inducor currens and during his period are equal o / and /, respecively. The peaks of he inducor currens a he momen when swich S 2 urns off a =T 5 are approximaely T 0 T 1 T 2 T 3 T 4 T 5 T 6 T 7 T 8 T 9 Fig. 4. Key waveforms of proposed boos power sage when > 0 and < < 0. I VBN TS = and (3 (PK 2 810

I VCN TS =. (4 (PK 3 As i can be seen in Eqs. (1, (3, and (4, he peak of each inducor curren is proporional o is corresponding inpu volage. Afer swich S 2 is urned off a =T 5, inducor currens and sar o simulaneously charge he oupu capaciance of swich S 2 and discharge he oupu capaciance of swich S 1, Fig. 3(f. This period ends a =T 6 when he oupu capaciance of swich S 1 is fully discharged and is ani-parallel diode sars conducing, Fig. 3(g and Fig. 4. Afer =T 6, swich S 1 can be urned on wih ZVS. In Fig. 4, swich S 1 is urned on a =T 7. As shown in Fig. 3(h, once swich S 1 is on, increasing inducor curren flows in he opposie direcion from inducor currens and hrough swich S 1 so ha swich S 1 carries only he difference of curren and he sum of currens and. This period ends when inducor curren decreases o zero a =T 8. During period T 8 -T 9, decreasing inducor curren coninues o flow hrough swich S 1, Fig. 3(i. Finally, afer 8 in ( 1.8, in ( 2, 8 4 in ( 2.2, <I L_AVG > Ts in ( 2.4 [A], 0 in ( 2.6, in ( 2.8, 4 M = 2.8 M = 2.2 M = 2.6 M = 2.4 M = 2 M = 1.8 L=200 μh, =780 V, f L =50 Hz, P O =3 kw 8 8 0 510 3 0.01 0.015 0.02 0 Time [second] T L Fig. 5. Calculaed average boos inducor curren <I L-AVG> Ts for various inpu-o-oupu volage conversion raios M. TABLE I THD and harmonics of average boos inducor currens shown in Fig. 5. 3 rd M PF THD sum of oher harmonics [%] [%] 5 h - 99 h [%] 1.8 0.989 14.93 14.75 1.14 2 0.992 12.64 12.53 0.67 2.2 0.994 10.97 10.9 0.6 2.4 0.995 9.7 9.65 0.72 2.6 0.996 8.7 8.66 0.78 2.8 0.997 7.89 7.85 0.81 inducor curren reaches zero a =T 9, a new swiching cycle begins, Fig. 3(j. Since in he proposed circui he charging curren of each boos inducor during he ime when he relaed swich is on is proporional o is corresponding phase volage and is discharging curren is proporional o he difference of flying capacior volage and he corresponding phase volage, as illusraed in he inducor-curren waveforms in Fig. 4, average inducor curren <I L (AVG > Ts of each boos inducor during a swiching cycle is I L(AVG Ts T V S = 8L V CR CR 2V 2V L N, RMS L N, RMS sin ω, (5 sin ω where L= = =, and ω is he angular frequency of he line volage. By defining inpu-o-oupu volage conversion raio M as M V O = (6 2VL N, RMS and recalling ha he average volage across flying capacior C R is equal o oupu volage, i.e., =, average inducor curren <I L (AVG > Ts in Eq. (5 can be rewrien as I L(AVG Ts VOT = 8L S sin ω. (7 M sin ω I should be noed ha he expression for average inducor curren I L(AVG in Eq. (7 is exacly he same as ha for he average inducor curren of he single-phase consanfrequency boos PFC operaing in DCM. The curren disorion of he average inducor curren in Eq. (7 is brough abou by he denominaor erm (M sinω and i is dependan on volage-conversion raio M. Figure 5 shows calculaed average inducor currens <I L-AVG > Ts for various M, whereas Table I summarizes heir harmonic conen. As can be seen from Table I, he 3 rd harmonic is he dominan disorion componen. However, since in he hree-wire power sysems, he neural wire is no available (or no conneced he line currens canno conain he riplen harmonics (he 3 rd harmonic and he odd muliples of he 3 rd harmonic. Because in he proposed recifier he riplen harmonics of he inducor currens flow hrough capaciors C 1 -C 3, he proposed circui exhibis a very low THD and high PF since according o Table I he remaining harmonics conribue less han 1% of oal curren disorion if M is equal or greaer han 2. Finally, i should be noed ha he proposed recifier auomaically balances he volages across he wo oupu capaciors, i.e., no addiional volage-balancing circui is 811

required. Naural volage-balancing is achieved because in he circui in Fig. 1 he average volages across swiches S 1 and S 2 are equal o average volages 1 and 2 across capaciors C O1 and C O2, respecively, since he average volages across he windings of inducor L C are zero. Because he swiches are operaed wih approximaely 50% duy cycle, heir average volages are equal o /2 so ha 1 = 2 = /2. IV. EXPERIMENTAL RESULTS The performance of he proposed recifier was evaluaed on a 2.8-kW prooype circui ha was designed o operae from a 340-520 V L-L, RMS hree-phase inpu and wih a 780-V oupu. Figures 6 and 7 show he schemaic diagrams and componens of he prooype circui s power sage and EMI filer, respecively. Because he volage sress of swiches S 1 and S 2 is approximaely equal o oupu volage, i.e., i is around 780 V, in his wide inpu-volage design i is necessary o use swiches ha are raed a leas 950-V o mainain desirable design margin of 20%. As resul, in he prooype circui a CMF20120D SiC MOSFET (V DSS = 1.2 kv, R DS = 0.075 Ω from Cree was used for each swich. Since inpu diodes D 1 - D 6 mus block he same peak volage sress and conduc he same peak curren (approximaely 15 A as he swiches, an i A i B i C i A i B i C THD=1.4% i A i B i C V IN =380 V L-L, =780 V, P O =2.8 kw, f S =50 khz (a THD=2.8% i A i B i C V IN =480 V L-L, =780 V, P O =2.8 kw, f S =98 khz V A V B V C L1, L2, L3 PQ35/35-3C96 Liz 0.1mmx180 50T, 200 uh EMI FILTER C1, C2, C3 2.2uF /450 V C 1 C 2 C 3 D1-D6 STTH3012W S1, S2 CMF20120D D 1 D 2 D 3 D 4 D 5 D 6 N S 1 S 2 C R 3 x 1uF /875 V Lc : PQ35/35-3C96 Liz 0.1mmx100, 44T:44T Lm=1.7 mh, Llk=145uH L C C O1 270uF /450 V C O2 270uF /450 V Fig. 6. Experimenal prooype circui of proposed hree-phase wo-swich ZVS PFC DCM boos recifier. V A V B V C EMI FILTER 3 x 0.1uF /450 V TX36/23/10 AWG#14, 10T:10T:10T Lm=1.25mH Llk=5uH C a C b C c L CM 3 x CS330125 AWG#14, 28T, 100uH L DM1 L DM2 L DM3 C d C e C f 3 x 1uF /450 V Fig. 7. EMI filer circui of experimenal prooype in Fig. 6. (b Fig. 8. Measured inpu curren waveforms a full power for inpu volages: (a 380 V L-L, RMS; (b 480 V L-L, RMS. Time scale is 4 ms/div. STTH3012W diode (V RRM = 1.2 kv, I FAVM = 30 A from ST was used for each diode. To obain he desired inducance of boos inducors,, and of approximaely 200 μh and also o achieve high efficiency a ligh-load, each inducor was buil using a pair of ferrie cores (PQ-35/35, 3C96 wih 50 urns of Liz wire (Φ 0.1mm, 180 srands and 6.2 mm gap. The Liz wire was used o reduce he fringing-effecinduced winding loss near he gap of he inducor core. Coupled inducor L C was buil using a pair of ferrie cores (PQ-35/35, 3C96 wih 44 urns of Liz wire (Φ 0.1mm, 100 srands for each winding and 0.2 mm gap. The measured magneizing and leakage inducances are 1.7 mh and 145 μh, respecively. Three parallel conneced film capaciors (1 μf, 875 VDC were used for flying capacior C R and a film capacior (2.2 μf, 450 VDC was used for each inpu filer capacior C 1, C 2, and C 3. Two aluminum capaciors (270 μf, 450 VDC were used for oupu capaciors C O1 and C O2. Because of addiional filering by he leakage inducance of coupled inducor L C and capacior C R, he RMS curren hrough oupu capaciors C O1 and C O2 is quie small. The oupu volage across series-conneced oupu capaciors C O1 812

V S1-GATE [10 V/div] ZVS V GATE [20 A/div] V IN =380 V L-L, =780 V, P O =2.8 kw, f S =50 khz [20 A/div] V IN =380 V L-L, =780 V, P O =2.8 kw, f S =50 khz (a (a V GATE V S1-GATE [10 V/div] ZVS V IN =480 V L-L, =780 V, P O =2.8 kw, f S =98 khz V IN =480 V L-L, =780 V, P O =2.8 kw, f S =98 khz (b Fig. 9. Measured waveforms of inducor currens,, and a full power for inpu volage: (a 380 V L-L, RMS; (b 480 V L-L, RMS. Time scale: 5 μs/div. (b Fig. 10. Measured waveforms of gae volage V GS1 and drain curren of swich S 1 and curren a full power and inpu volage: (a 380 V L-L, RMS; (b 480 V L-L, RMS. Time scale: 2 μs/div. and C O2 was regulaed by an L6599 analog LLC conroller from ST. Figure 8 shows he measured full-power inpu-curren waveforms of he experimenal circui a 380 V L-L, RMS and 480 V L-L, RMS. The measured THDs of he inpu currens are approximaely 1.4% and 2.8% a 380-V L-L, RMS and 480-V L-L, RMS, respecively. Figure 9 shows he measured curren waveforms of boos inducors,, and of he experimenal circui. The measured waveforms and he ideal waveforms in Fig. 4 are in a very good agreemen excep during he ime when he inducor currens are supposed o be zero. The curren ringing in he experimenal waveforms is caused by he resonance of he boos inducors wih he juncion capaciance of he non-conducing (reverse-biased bridge diodes. Alhough his curren ringing adversely affecs he THD of he inpu curren, he measured THD was well below 5% over he enire inpu volage range and above 20% load. By selecing diodes wih smaller juncion capaciances, he qualiy of he inpu currens can be improved even furher. From Fig. 9 i can also be seen ha he swiching frequencies a full load a 380 V L_L, RMS and 480 V L_L, RMS are 50 khz and 98 khz, respecively. Efficiency [%] 99 98 97 96 95 94 93 92 V IN = 480 V L-L, RMS =780 VDC 440 880 1100 1320 1760 2200 2800 Oupu Power [W] V IN = 380 V L-L, RMS Fig. 11. Measured efficiencies of experimenal prooype a nominal volages as funcions of oupu power. 813

Figure 10 shows gae-drive volage V GS1 and drain curren i DS waveforms of swich S 1 along wih he waveform of curren. As i can be seen, boos swich S 1 urns on wih ZVS because i urns on when he drain curren is negaive, i.e., while he body diode of swich S 1 is conducing. I was measured ha he ZVS of he swiches in he experimenal circui mainains over he enire line and load ranges. Finally, he measured efficiencies of he proposed recifier a 380 V L-L, RMS and 480 V L_L, RMS as funcions of oupu power are shown in Fig. 11. The measured full-load efficiencies of he recifier a 380 V L-L, RMS and 480 V L-L, RMS are 97.6% and 98.2%, respecively. I should be noed ha he recifier mainains high efficiency (>97.5% even a half load. V. SUMMARY In his paper, a new hree-phase wo-swich ZVS PFC DCM boos recifier has been inroduced. The proposed recifier achieves less han 5% inpu-curren THD over he enire inpu range and above 20% load and feaures complee ZVS of he swiches. In addiion, he proposed recifier has auomaic volage balancing across he wo spli oupu capaciors, which simplifies he implemenaion of downsream power processing wih low-volage-raed, lowcos, high-performance converers conneced across he spli capaciors. The performance evaluaion was performed on a hree-phase 2.8-kW prooype operaing in he line volage range of 340-520-V L-L, RMS. The measured inpu-curren THD a 380 V L_L, RMS and 480 V L_L, RMS were 1.4% and 2.8%, respecively. The measured full-load efficiency was in he 97.6-98.2% range. REFERENCES [1] A.R. Prasad, P.D. Ziogas, and S. Manias, "An Acive Power Facor Correcion Technique for Three-Phase Diode Recifiers," IEEE Power Elecronics Specialis Conf. (PESC Rec., 1989, pp. 58-66. [2] E.H. Ismail and R.W. Erickson, "A Single Transisor Three Phase Resonan Swich for High Qualiy Recificaion," IEEE Power Elecronics Specialis Conf. (PESC Rec., 1992, pp. 1341-1351. [3] R. Naik, M. Rasogi, and N. Mohan, Third-Harmonic Modulaed Power Elecronics Inerface Wih 3-Phase Uiliy o Provide a Regulaed DC Oupu and o Minimize Line-Curren Harmonics, IEEE IAS Annual Meeing Rec., 1992, pp. 698-694. [4] J. W. Kolar, H. Erl, and F. C. Zach, "Space Vecor-Based Analyical Analysis of he Inpu Curren Disorion of A Three-Phase Disconinuous-Mode Boos Recifier Sysem," IEEE Power Elecronics Specialiss Conf. (PESC Rec., 1993, pp. 696-703. [5] Y. Jang and R.W. Erickson, "New Single-Swich Three-Phase High Power Facor Recifiers Using Muli-Resonan Zero Curren Swiching," IEEE Applied Power Elecronics Conf. (APEC Proc., 1994, pp. 711-717. [6] S. Gaarić, D. Boroyevich, and F. C. Lee, "Sof-Swiched Single- Swich Three-Phase Recifier wih Power Facor Correcion," IEEE Applied Power Elecronics Conf. (APEC Proc., 1994, pp. 738-744. [7] J. W. Kolar and F. C. Zach, A Novel Three-Phase Uiliy Inerface Minimizing Line Curren Harmonics of High-Power Telecommunicaions Recifier Modules, IEEE In l Telecommunicaions Energy Conf. Rec., 1994, pp. 367-374. [8] Q. Huang and F.C. Lee, "Harmonic Reducion in A Single-Swich, Three-Phase Boos Recifier wih High Order Harmonic Injeced PWM," IEEE Power Elecronics Specialiss Conf. (PESC Rec., 1996, pp. 1266-1271. [9] J. Sun, N. Fröhleke, and H. Grosollen, "Harmonic Reducion Techniques for Single-Swich Three-Phase Boos Recifiers," IEEE IAS Annual Meeing Rec., 1996, pp. 1225-1232. [10] Y. Jang and M.M. Jovanović, "A Novel, Robus, Harmonic Injecion Mehod for Single-Swich, Three-Phase, Disconinuous-Conducion- Mode Boos Recifiers," IEEE Power Elecronics Specialiss Conf. (PESC Rec., 1997, pp. 469-475. [11] D.M. Xu, C. Yang, J.H. Kong, and Z. Qian, Quasi Sof-Swiching Parially Decoupled Three-Phase PFC Wih Approximae Power Facor, IEEE Applied Power Elecronics Conf. (APEC Proc., 1998, pp. 953-957. [12] P Barbosa, F. Canales, and F. C. Lee, Analysis and Evaluaion of he Two-swich Three-Level Boos Recifier, IEEE Power Elecronics Specialiss Conf. (PESC Record, 2001, pp. 1659 1664. [13] P. Barbosa, F. Canales, J. C. Crebier and F. C. Lee, Inerleaved Three-Phase Boos Recifiers Operaed in he Disconinuous Conducion Mode: Analysis, Design Consideraions and Experimenaion, IEEE Transacions on Power Elecronics, vol. 16, No. 5, pp. 724-734, Sep. 2001. [14] K. Nishimura, K. Hirachi, A.M. Eid, H.W. Lee and N. Nakaoka, A Novel Prooype Disconinuous Inducor Curren Mode Operaed Three-Phase PFC Power Converer Wih Four Acive Swiches, IEEE Power Elecronics Specialiss Conf. (PESC Record, 2006, pp. 824 830. [15] J. W. Kolar and T. Friedli, The Essence of Three-Phase PFC Recifier Sysems, IEEE In l Telecommunicaions Energy Conf. Rec., Plenary Session 2, Paper 12.1, 2011. [16] J.W. Kim, J.S. You, and B.H. Cho, Modeling, Conrol, and Design of Inpu-Series Oupu-Parallel-Conneced Converer for High-Speed- Train Power Sysem, IEEE Transacions on Indusrial Elecronics, vol. 48, No. 3, pp. 536-544, Jun. 2001. [17] P. Grbović, Maser/Slave Conrol of Inpu-Series- and Oupu=Parallel-Conneced Converers: Concep for Low Cos High- Volage Auxiliary Power Supplies, IEEE Transacions on Power Elecronics, vol. 24, No. 2, pp. 316 328, Feb. 2009. [18] R. Lai, F. Wang, R. Burgos, D. Boroyevich, D. Jiang, and D. Zhang, Average Modeling and Conrol Design for VIENNA-Type Recifiers Considering he DC-Link Volage Balance, IEEE Transacions on Power Elecronics, vol. 24, No. 11, pp. 2509-2522, Nov. 2009. 814