Aticle A Single-Stage High-Powe-Facto Light-Emitting Diode (LED) Dive with Coupled Inductos fo Steetlight Applications Chun-An Cheng, Chien-Hsuan Chang, Hung-Liang Cheng *, Ching-Hsien Tseng and Tsung-Yuan Chung Depatment of Electical Engineeing, I-Shou Univesity, Dashu Distict, Kaohsiung City 84001, Taiwan; cacheng@isu.edu.tw (C.-A.C.); chchang@isu.edu.tw (C.-H.C.); isu10101001m@cloud.isu.edu.tw (C.-H.T.); isu10001008m@cloud.isu.edu.tw (T.-Y.C.) * Coespondence: hlcheng@isu.edu.tw; Tel.: +886-7-657-7711 (ext. 6634) Academic Editos: Shoou-Jinn Chang and Teen-Hang Meen Received: 31 Octobe 2016; Accepted: 3 Febuay 2017; Published: 10 Febuay 2017 Abstact: This pape pesents and implements a single-stage high-powe-facto light-emitting diode (LED) dive with coupled inductos, suitable fo steetlight applications. The pesented LED dive integates an inteleaved buck-boost powe facto coection (PFC) convete with coupled inductos and a half-bidge-type seies-esonant convete cascaded with a full-bidge ectifie into a single-stage powe convesion cicuit. Coupled inductos inside the inteleaved buck-boost PFC convete sub-cicuit ae designed to opeate in discontinuous conduction mode (DCM) fo achieving input-cuent shaping, and the half-bidge-type seies esonant convete cascaded with a full-bidge ectifie is designed fo obtaining zeo-voltage switching (ZVS) on two powe switches to educe thei switching losses. Analysis of opeational modes and design equations fo the pesented LED dive ae descibed and included. In addition, the pesented dive featues a high powe facto, low total hamonic distotion (THD) of input cuent, and soft switching. Finally, a pototype dive is developed and implemented to supply a 165-W-ated LED steetlight module with utility-line input voltages anging fom 210 to 230 V. Expeimental esults demonstate that high powe facto (>0.99), low utility-line cuent THD (<7%), low-output voltage ipples (<1%), low-output cuent ipples (<10%), and high cicuit efficiency (>90%) ae obtained in the pesented single-stage dive fo LED steetlight applications. Keywods: convete; dive; light-emitting diode (LED); steetlight 1. Intoduction Instead of incandescent bulbs with poo lighting efficiency, light-emitting diode (LED) light souces offe high luminous efficacy, long lamp-life, and ae mecuy-fee altenatives fo indoo and outdoo lighting applications [1 3]. Consequently, LEDs has been widely utilized in ou daily lives such as steetlights, flashlights, backlight souces, displays, decoative lighting, automotive lighting, and so on [4 16]. Steetlights, which illuminate a oad, aim to povide a safe envionment duing the night-time fo motocycle/bicycle dives and pedestians [3,17,18]. Taditional lighting souces fo steetlight applications have been high-pessue mecuy lamps because of thei low-cost. Howeve, high-pessue mecuy lamps ae not enegy efficient. In addition, the dischage tube containing mecuy vapos is hamful in tems of polluting ou envionment when the lamp uns out. Theefoe, LEDs have begun to eplace the conventional high-pessue mecuy steetlight. The conventional two-stage LED dive supplying a ated lamp powe of geate than 70 W fo steetlight applications, shown in Figue 1, consists of an input low-pass filte (Lf and Cf) connected with a full-bidge ectifie Appl. Sci. 2017, 7, 167; doi:10.3390/app7020167 www.mdpi.com/jounal/applsci
Appl. Sci. 2017, 7, 167 2 of 18 (D1, D2, D3 and D4), an inteleaved boost powe facto coection (PFC) convete (including two capacitos Cin1 and Cin2, two diodes DB1 and DB2, two inductos L1 and L2, two powe switches S1 and S2, and a DC-linked capacito CB), and a half-bidge-type LLC esonant convete (including a Diect-Cuent (DC)-linked capacito CB, two powe switches S3 and S4, a esonant capacito C, a esonant inducto L, a cente-tapped tansfome T1 with two output windings, two output diodes D5 and D6 and an output capacito Co), along with a LED [19]. Due to two-stage powe convesions, the cicuit efficiency is limited and moe powe switches and components ae equied in the conventional dive. In esponse to these challenges, this pape pesents and implements a single-stage LED dive with coupled inductos and high powe facto fo steetlight applications. Desciptions and analysis of opeational modes, and design equations of key components in the pesented LED dive, and expeimental esults obtained fom a pototype cicuit ae demonstated. Figue 1. The conventional two-stage light-emitting diode (LED) dive fo steetlighting applications, PFC: powe facto coection. 2. Desciptions and Opeational Modes Analysis of the Pesented Single-Stage LED Dive Figue 2a shows the oiginal two-stage dive cicuit suitable fo supplying an LED steetlight module, which consists of two buck-boost PFC convetes with inteleaved opeation and a half-bidge-type seies esonant convete cascaded with a full-bidge ectifie. The two coupled inductos ae employed instead of single-winding inductos in ode to accomplish buck-boost convesion. Figue 2b shows the pesented LED dive with coupled inductos and inteleaved PFC featue by utilizing the synchonous switch technique to simplify powe switches and integate the two-stage configuation into single-stage one. Figue 2b shows the pesented LED dive fo steetlight applications, which combines an inteleaved buck-boost PFC convete with a half-bidge-type seies esonant convete cascaded with a full-bidge ectifie into a single-stage powe convesion. The inteleaved buck-boost PFC convete sub-cicuit consists of two capacitos (Cin1 and Cin2), two coupled inductos (LB11 and LB12; LB21 and LB22), fou diodes (DB11, DB12, DB21, and DB22), two powe switches (S1 and S2), and a DC bus capacito (CDC). The half-bidge-type seies esonant convete cascaded with a full-bidge ectifie sub-cicuit includes a DC bus capacito (CDC), two switches (S1 and S2), a esonant capacito (C), a esonant inducto (L), fou diodes (Do1, Do2, Do3 and Do4), and a capacito (Co) along with the LED steetlight module. In addition, coupled inductos (LB11 and LB12; LB21 and LB22) ae designed to be opeated in discontinuous conduction mode (DCM) in ode to natually achieve input-cuent shaping. In addition, the diodes DB12 and DB21 ae used to block the cuent going fom the utility-line voltage souce into the inductos LB12 and LB21. Besides, the diodes DB11 and DB22 ae capable of peventing the inducto cuents going back to the input capacitos Cin1 and Cin2. Since the input voltage of each buck-boost PFC convete (the voltage on the capacito Cin1 o Cin2) is half of the utility-line voltage, the peak cuent of each coupled inducto and the DC bus voltage will also be half. Because the DC bus voltage is educed, the pesented LED dive is suitable fo the applications with high utility-line voltage. Additionally, the input-cuent hamonics can
Appl. Sci. 2017, 7, 167 3 of 18 be educed by the inteleaved opeation, so that the size of the input low-pass filte can be miniatuized [20]. (a) (b) Figue 2. (a) Oiginal two-stage LED dive cicuit; (b) the pesented single-stage LED dive with coupled inductos and inteleaved PFC fo steetlight applications. Figue 3 shows the utilized contol cicuit diagam of the pesented single-stage LED dive fo steetlight applications. With using a constant-voltage/constant-cuent contolle (IC1 SEA05) fo egulating the LED steetlight module s output voltage and cuent, the output LED voltage Vo can be sensed though esistos Rvs1, VR1 and Rvs2, and the output LED cuent can be sensed though esisto R3. The sensed output signal fom pin 5 of the IC1 feeds into the high-voltage esonant contolle (IC3 ST L6599) though a photo-couple (IC2 PC817). Two gate-diving signals vgs1 and vgs2 ae geneated fom pin 15 and pin 11, espectively, of the IC3, to cay out egulation of the LED steetlight module s output voltage and cuent.
Appl. Sci. 2017, 7, 167 4 of 18 Figue 3. The utilized contol cicuit of the pesented single-stage LED dive fo steetlight applications. Figue 4 pesents the simplified cicuit of the pesented single-stage LED dive fo steetlight applications, obtained while analyzing the opeational modes. In ode to analyze the opeations of the pesented LED dive, the following assumptions ae made. (a) Since the switching fequencies of the two switches S1 and S2 ae much highe than those of the utility-line voltage vac, the sinusoidal utility-line voltage can be consideed as a constant value fo each high-fequency switching peiod. (b) VREC1 and VREC2, espectively, epesent the ectified input voltage souces fo the capacitos Cin1 and Cin2. (c) Powe switches ae complementaily opeated, and thei inheent body diodes and dain-souce capacitos (CDS1 and CDS2) ae consideed. (d) The conducting voltage dops of diodes DB11, DB12, DB21, DB22, Do1, Do2, Do3 and Do4 ae neglected. (e) Coupled inductos (including LB11 and LB12; LB21 and LB22) ae designed to be opeated in DCM fo natually achieving PFC. Figue 4. Simplified cicuit of the pesented single-stage LED dive fo steetlight applications. The opeating modes and the key wavefom of the pesented LED dive fo steetlight applications ae shown in Figues 5 and 6, espectively, and the analyses of opeations ae descibed in detail in the following. Mode 1 (t0 t < t1; in Figue 5a): The body diode of switch S1 is fowad-biased at time t0, and this mode begins. The esonant capacito C povides enegy to the inducto L, capacitos CDS2 and Co and to the LED though diodes Do2 and Do3. The diode DB21 is fowad-biased and coupled inductos LB21 and LB22 povide enegy to capacito CDS2 though diode DB21. At time t1, the dain-souce voltage vds1 of powe switch S1 is zeo and S1 tuns on with zeo-voltage switching (ZVS); then this mode ends.
Appl. Sci. 2017, 7, 167 5 of 18 Mode 2 (t1 t < t2; in Figue 5b): When switch S1 achieves ZVS tun-on at t1, this mode stats. The ectified input voltage souce VREC1 povides enegy to coupled inducto LB11 though diode DB11 and switch S1, and diode DB12 is evese-biased duing this mode. The inducto cuent ilb11 linealy inceases fom zeo, and can be expessed as: i LB11 2vAC ms sin(2πf ACt) ( t) = t 2L B11 ( t ) 1, (1) whee vac-ms is the oot-mean-squae (ms) value of input utility-line voltage, and fac is the utilityline fequency. The DC bus capacito CDC and esonant inducto L povide enegy to capacitos CDS2, C and Co and to the LED though diodes Do1 and Do4. Coupled inductos LB21 and LB22 continue poviding enegy to capacito CDS2 though diode DB21. This mode ends when cuent ilb22 deceases to zeo at t2. Mode 3 (t2 t < t3; in Figue 5c): Voltage souce VREC1 continues poviding enegy to coupled inducto LB11 though diode DB11 and switch S1. Capacitos CDC and CDS2, along with esonant inducto L povide enegy to capacitos C and Co and to the LED though diodes Do1 and Do4. At t3, the coupled-inducto cuent eaches its peak value, defined as ilb11-pk(t), and is given by: 2v sin(2πf t) AC ms AC LB11 pk ( t) = DTS, (2) 2LB 11 i whee D and TS ae the duty cycle and peiod of the powe switch, espectively. This mode ends when diode DB12 becomes fowad-biased at t3. Mode 4 (t3 t < t4; in Figue 5d): This mode begins when powe switch S1 tuns off at t3. The diode DB12 is fowad-biased and coupled inductos LB11 and LB12 povide enegy to capacito CDS1. The coupled-inducto cuent ilb11 linealy deceases fom its peak level, and can be given by: V i () t = ( t t ), (3) DC LB11 3 2LB 11 whee VDC is the voltage of the DC bus capacito CDC. Capacitos CDC and CDS2 and esonant inducto L continue poviding enegy to capacitos CDS1, C and Co and to the LED though diodes Do1 and Do4. When the dain-souce voltage vds2 of S2 deceases to zeo at t4, this mode ends. Mode 5 (t4 t < t5; in Figue 5e): The body diode of switch S2 is fowad-biased at time t4, and this mode begins. The esonant inducto L povides enegy to capacitos CDS2, C and Co and to the LED though the body diode of powe switch S2 and diodes Do1 and Do4. The diode DB12 is fowad-biased and coupled inductos LB11 and LB12 povide enegy to capacito CDS1 though diode DB12. At time t5, the dain-souce voltage vds2 of powe switch S2 is zeo and S2 tuns on with ZVS; then this mode ends. Mode 6 (t5 t < t6; in Figue 5f): When switch S2 achieves ZVS tun-on at t5, this mode stats. The ectified input voltage souce VREC2 povides enegy to coupled inducto LB22 though diode DB22 and switch S2, and diode DB21 is evese-biased duing this mode. The DC bus capacito CDC and esonant capacito C povide enegy to inducto L, capacitos CDS1 and Co and to the LED though diodes Do2 and Do3. Coupled inductos LB11 and LB12 continue poviding enegy to capacito CDS1 though diode DB12. This mode ends when cuent ilb11 deceases to zeo at t6. Mode 7 (t6 t < t7; in Figue 5g): Voltage souce VREC2 continues poviding enegy to coupled inducto LB22 though diode DB22 and switch S2. The esonant capacito C povides enegy to esonant inducto L, output capacito Co and the LED though diodes Do2 and Do3. This mode ends when diode DB21 is fowad-biased at t7.
Appl. Sci. 2017, 7, 167 6 of 18 Mode 8 (t7 t < t8; in Figue 5h): This mode begins when powe switch S2 tuns off at t7. The diode DB21 is fowad-biased and coupled inductos LB21 and LB22 povide enegy to capacito CDS2. The esonant capacito C continues poviding enegy to esonant inducto L, capacitos CDS2 and Co and to the LED though diodes Do2 and Do3. When the dain-souce voltage vds1 of S1 deceases to zeo at t8, this mode ends. Then Mode 1 begins fo the next high-fequency switching peiod. D B11 L B11 V REC1 L B12 S 1 C DC D B12 L C D B21 Do1 D o3 V REC2 S 2 C o D B22 L B21 L B22 D o2 D o4 LED Steetlight Module (a) (b) (c) (d)
Appl. Sci. 2017, 7, 167 7 of 18 (e) D B11 L B11 V REC1 L B12 S 1 C DC D B12 L C D B21 Do1 D o3 V REC2 S 2 C o D B22 L B21 L B22 D o2 D o4 LED Steetlight Module (f) (g) (h) Figue 5. Opeation modes of the pesented LED dive; (a) Model 1; (b) Model 2; (c) Model 3; (d) Model 4; (e) Model 5; (f) Model 6; (g) Model 7; (h) Model 8.
Appl. Sci. 2017, 7, 167 8 of 18 Figue 6. Key wavefoms of the pesented LED dive fo steetlight applications. 3. Design Equations of Key Cicuit Components in the Pesented LED Dive 3.1. Design of Coupled Inductos LB11, LB12, LB21 and LB22 The coupled inductos (LB11 and LB12; LB21 and LB22) ae designed to be opeated in DCM fo natually achieving PFC, and the design equation of them can be expessed as follows [12,20]: η v D LB11 = LB12 = LB21 = LB22 = 4 f P 2 2 ac pk s o, (4) whee Vac-pk is the peak value of utility-line voltage; η is the estimated efficiency; D is the duty cycle of the powe switches; fs is the switching fequency; and Po is the output ated powe. In efeence to Equation (4) with a η of 0.85, a Vac-pk of 220 2 V, a D of 0.45, a Po of 165 W and an fs of 50 khz, the coupled inductos LB11, LB12, LB21 and LB22 ae given by: 2 2 0.85 (220 2) 0.45 LB 11 = LB 12 = LB21 = LB22 = = 505μH 4 50k 165 3.2. Design of Resonant Inducto L and Resonant Capacito C In efeence to Figue 2b, the esonant fequency f is given by:
Appl. Sci. 2017, 7, 167 9 of 18 f = 2π 1 L C. (5) The switching fequency fs is designed to be lage than the esonant fequency f so that the esonant tank esembles an inductive netwok in ode to obtain ZVS on fo the two powe switches [21]. The elationship between the switching fequency fs and the esonant fequency f is selected as: The quality facto Q is defined as: f s = 4 f. (6) Q =, (7) R a L C whee Ra is the equivalent output esisto efeing to the left side of the full-bidge ectifie, and could be expessed by the following equation: R a = V π. (8) Combining Equation (2) with Equations (3) (5), the design equations of esonant capacito C and inducto L ae given by: C 8 o 2 Io 2 R Q f =, (9) a L s and L 4 π f C =. (10) 2 2 s Accoding to Equation (8), with a Vo of 235 V and an Io of 700 ma, the equivalent esisto Ra is given by: 8 235 R a = = 272.1Ω. 2 π 700m In efeence to Equation (9), with an Ra of 272.1Ω, the elationship between the esonant capacito C and the switching fequency unde diffeent levels of quality facto Q is shown in Figue 7. With a Q of 0.15 and a switching fequency fs of 50 khz, the capacito C is selected to be 1.22 μf accoding to Figue 7. In efeence to Equation (10), with a C of 1.22 μf, the esonant inducto L is given by: L = 4 133μH 2 2 π (50 k) 1.22μ =.
Appl. Sci. 2017, 7, 167 10 of 18 Figue 7. Resonant capacito C vesus the switching fequency fs unde diffeent levels of quality facto Q. 3.3. Design of Input Low-Pass Filte The input low-pass filte is composed of an inducto Lf and a capacito Cf, and the cut-off fequency of the input low-pass filte is given by: f cut off 1 2π LC =. (11) The design consideation of the cut-off fequency in the input low-pass filte is detemined to be one-tenth of the switching fequency (which is 5 khz) in ode to filte the high-fequency switching noises. The design equation of the inducto Lf is epesented by: L f 2 2 cut off f f 1 =. (12) 4π f C On choosing a capacito Cf of 2 μf (two capacitos of 1 μf in paallel connection), the inducto Lf is given by: L f 1 1 = = = 2.5mH. π f C π khz μf f ( ) 2 2 2 2 4 cut off f 4 5 2 4. Expeimental Results A pototype dive has been successfully implemented and tested fo poweing a 165 W-ated LED steetlight module (LMD003 fom AcBel Polytech Inc., New Taipei City, Taiwan) with input utility-line voltages of 220 V ± 5% (fom 210 to 230 V). Tables 1 and 2 show the specifications and key components utilized in the pesented single-stage LED dive fo steetlight applications, espectively.
Appl. Sci. 2017, 7, 167 11 of 18 Table 1. Specifications of the pesented single-stage LED dive. Paamete Input Utility-Line Voltage vac Output Rated Powe PO Output Rated Voltage VO Output Rated Cuent IO Value 220 V ± 5% (ms) 165 W 235 V 700 ma Table 2. Key components utilized in the pesented LED dive. Component Capacitos Cin1, Cin2 Inductos LB11, LB12, LB21, LB22 Diodes DB11, DB12, DB21, DB22 Powe Switches S1, S2 DC-Linked Capacito CDC Resonant Inducto L Resonant Capacito C Diodes Do1, Do2, D03, D04 Output Capacito Co Filte Inducto Lf Filte Capacito Cf Value 330 nf Component 505 μh C3D10060 STP20NM60 100 μf/450 V 133 μh 1.22 μf MUR460 220 μf/400 V 2.5 mh 2 μf The measued wavefoms of coupled inducto cuents ilb11 and ilb22 ae shown in Figue 8; both of which have inteleaved featues and opeate in DCM. Figue 9 shows the measued switch voltage vds1 and cuent ids1; Figue 10 pesents the measued switch voltage vds2 and cuent ids2; thus, ZVS occued on both switches fo loweing the switching losses. Figue 11 pesents the measued switch voltage vds2 and esonant inducto cuent il. The cuent il lags with espect to voltage vds2 so that the seies esonant tank esembles an inductive load. Figue 12 depicts the measued output voltage VO and cuent IO; thei aveage values ae appoximately 235 V and 0.7 A, espectively. Figue 13 shows measued voltages on the diodes DB11 and DB22. The voltage spikes on DB11 and DB22 ae appoximately 360 V. In addition, the voltage ating of the diode (C3D10060) is 600 V. Theefoe, the utilized diodes ae capable of sustaining these voltage spikes. The measued wavefoms of input utility-line voltage vac and cuent iac ae shown in Figue 14, and the input cuent is in phase with utility-line voltage, which esults in high powe facto. In addition, expeimental wavefoms fom Figue 8 to Figue 14 ae measued at a utility-line voltage of 220 V. i LB11 i LB22 Figue 8. Measued coupled inducto cuents ilb11 (2 A/div) and ilb22 (2 A/div); time scale: 5 μs/div.
Appl. Sci. 2017, 7, 167 12 of 18 Figue 9. Measued switch voltage vds1 (200 V/div) and cuent ids1 (2 A/div); time scale: 5 μs/div. Figue 10. Measued switch voltage vds2 (200 V/div) and cuent ids2 (2 A/div); time scale: 5 μs/div. Figue 11. Measued switch voltage vds2 (200 V/div) and esonant inducot cuent il (2 A/div); time scale: 5 μs/div.
Appl. Sci. 2017, 7, 167 13 of 18 Figue 12. Measued output cuent IO (0.5 A/div) and voltage VO (100 V/div); time scale: 2 ms/div. Figue 13. Measued voltages on the diodes DB11 and DB22. Voltage scale: 200 V/div; time scale: 5μs/div. Figue 14. Measued input utility-line voltage vac (200 V/div) and cuent iac (2 A/div); time scale: 5 ms/div. Figue 15 shows the measued input utility-line cuent hamonics compaing with the Intenational Electotechnical Commission (IEC) 61000-3-2 Class C standads at input utility-line voltages anging fom 210 to 230 V, and all cuent hamonics meet the equiements. Table 3 shows the measued output voltage ipple and cuent ipple of the pesented LED steetlight dive among
Appl. Sci. 2017, 7, 167 14 of 18 input voltages anging fom 210 to 230 V; additionally, the output voltage (cuent) ipple is obtained by the peak-to-peak level divided by the aveage value of output voltage (cuent). Accoding to this table, the measued output voltage ipples and cuent ipples ae smalle than 1% and 10%, espectively, duing the tested input voltages. Figue 15. Measued input cuent hamonics compaed with the IEC 61000-3-2 Class C standads. Table 3. Measued output voltage ipple and cuent ipple in the pesented LED steetlight dive. Input Voltage (ms) Voltage Ripple (%) Cuent Ripple (%) 210 V 0.75 9.14 215 V 0.75 9.73 220 V 0.79 9.28 225 V 0.75 9 230 V 0.83 8.99 Figue 16 pesents the measued powe facto and cuent total-hamonics distotion (THD) of the pesented LED dive unde utility-line voltages anging fom 210 to 230 V. At a utility-line ms voltage of 220 V, the measued powe facto and cuent THD ae 0.992 and 6.55%, espectively. In addition, the measued highest powe facto and lowest cuent THD ae 0.993 and 6.5%; these occued at a utility-line ms voltage of 230 and 210 V, espectively. Figue 17 shows the measued cicuit efficiency of the pesented LED dive unde utility-line voltages anging fom 210 to 230 V; additionally, the measued maximum cicuit efficiency is 91.23%, at a utility-line ms voltage of 210 V. In addition, the efficiency which dops with the incease utility-line voltages is elated to the voltage gain of the LC seies esonant tank. Fo poviding ated output powe (voltage/cuent), the voltage gain of the LC seies esonant tank will decease when the utility-line voltages incease, esulting in an incease in the switching fequency of the powe switches. Thus, the switching losses of powe switches and conduction losses of powe diodes will incease, esulting in loweed cicuit efficiency. Figue 18 pesents a photogaph of supply of the expeimental LED steetlight module using the pesented dive at a utility-line voltage of 220 V. Besides, Table 4 shows some measuements of the elationship between output voltage, efficiency and output load cuent unde an input utility-line voltage of 220 V by alteing the equivalent load esisto to epesent the specific load cuent. In addition, the measued minimum
Appl. Sci. 2017, 7, 167 15 of 18 efficiency is 86.51%, in a minimum load cuent of 0.3 A. Moeove, Table 5 shows compaisons between the existing single-stage LED dive fo steetlight applications in [18] and the poposed one. Fom Table 5, it can be seen that the poposed LED steetlight dive has bette cuent THD and efficiency than the existing one. Figue 16. Measued powe facto and cuent total hamonic distotion (THD) unde utility-line voltages anging fom 210 to 230 V. (%) 92.0 91.5 91.0 90.5 90.0 89.5 89.0 88.5 88.0 210Vms 215Vms 220Vms 225Vms 230Vms Utility-Line Voltages Figue 17. Measued cicuit efficiency unde utility-line voltages anging fom 210 to 230 V.
Appl. Sci. 2017, 7, 167 16 of 18 Figue 18. Photogaph of supply of the expeimental LED steetlight module using the pesented dive at a utility-line voltage of 220 V, AC: Altenating-Cuent. Table 4. Measued output voltage and efficiency vesus output load cuent unde an input utilityline voltage of 220 V. Output Load Cuent Equivalent Load Resisto Measued Output Voltage Measued Efficiency 0.7 A 336 Ω 235.31 V 90.22% 0.6 A 392 Ω 234.91 V 89.39% 0.5 A 470 Ω 235.31 V 87.82% 0.4 A 588 Ω 234.86 V 86.59% 0.3 A 783 Ω 235.34 V 86.51% Table 5. Compaisons between the existing single-stage LED dive fo steetlight applications in [18] and the poposed one. Item Pesented LED Dive in [18] Cicuit topology Single-stage (integating a inteleaved boost PFC convete with a half-bidge LLC esonant convete) Opeating in UtilityLine Voltage Range Output Rated Powe Powe Switches Diodes Capacitos Inductos Tansfome Measued powe facto Measued cuent THD Measued efficiency Poposed LED Dive Single-stage (integating a inteleaved buck-boost PFC convete with coupled inductos and a halfbidge-type seies-esonant convete cascaded with a full-bidge ectifie) 90~130 V 210~230 V 144 W (36 V/4 A) 2 (S1, S2) 8 (D1~D6, DB1, DB2) 6 (Cf, Cin1, Cin2, CB, C, Co) 4 (Lf, LB1, LB2, L) 1 (with a magnetic inducto Lm) 0.99 (at 110 V) 10% (at 110 V) 88% (at 110 V) 165 W (235 V/0.7 A) 2 (S1, S2) 12 (D1~D4, DB11~DB22, Do1~Do4) 6 (Cf, Cin1, Cin2, CDC, C, Co) 4 (Lf, LB11 and LB12, LB21 and LB22, L) 0 0.992 (at 220 V) 6.55% (at 220 V) 90.22% (at 220 V) 5. Conclusions This pape has pesented and implemented a single-stage LED dive with a high powe facto which is suitable fo steetlight applications and integates an inteleaved buck-boost PFC convete with coupled inductos and a half-bidge-type seies-esonant convete cascaded with a full-bidge ectifie into a single powe convesion stage. A 165-W pototype LED dive has been developed
Appl. Sci. 2017, 7, 167 17 of 18 and tested with input utility-line voltages anging fom 210 to 230 V. The expeimental esults of the pesented LED dive display low-output voltage ipple (<1%) and output cuent ipple (<10%), high powe facto (>0.99), low total hamonic distotion of input utility-line cuent (<7%), zeo-voltage switching on powe switches, and high cicuit efficiency (>90%); thus the functionality of the pesented LED steetlight dive is demonstated. Acknowledgments: The authos would like to convey thei appeciation fo gant suppot fom the Ministy of Science and Technology (MOST) of Taiwan unde its gant with efeence numbe MOST 104-2221-E-214-012. Autho Contibutions: Chun-An Cheng and Chien-Hsuan Chang conceived and designed the cicuit; Hung-Liang Cheng pefomed cicuit simulations; Ching-Hsien Tseng and Tsung-Yuan Chung caied out the pototype dive, and measued as well as analyzed expeimental esults with the guidance fom Chun-An Cheng; Hung-Liang Cheng evised the manuscipt fo submission. Conflicts of Inteest: The authos declae no conflict of inteest. Refeences 1. Schubet, E.F. Light-Emitting Diodes; Cambidge Univesity Pess: Cambidge, UK, 2006. 2. Enegy-Efficient Solutions fo Offline LED Lighting and Geneal Illumination. Available online: http://www.mouse.com/pdfdocs/stmico_offline-general_illumination_a.pdf (accessed on 5 Octobe 2012). 3. LED Lighting Solutions. Available online: http://www.onsemi.cn/pub_link/collateal/brd8034-d.pdf (accessed on 16 Mach 2013). 4. Liang, T.J.; Tseng, W.J.; Chen, J.F.; Wu, J.P. A novel line fequency multistage conduction LED dive with high powe facto. IEEE Tans. Powe Electon. 2015, 30, 5103 5115. 5. Chen, Y.S.; Liang, T.J.; Chen, K.H.; Juang, J.N. Study and implementation of high fequency pulse LED dive with self-oscillating cicuit. In Poceedings of the 2011 IEEE Intenational Symposium on Cicuits and Systems (ISCAS), Rio de Janeio, Bazil, 15 18 May 2011; pp. 498 501. 6. Moo, C.S.; Chen, Y.J.; Yang, W.C. An efficient dive fo dimmable LED lighting. IEEE Tans. Powe Electon. 2012, 27, 4613 4618. 7. Cheng, H.L.; Lin, C.W. Design and implementation of a high-powe-facto LED dive with zeo-voltage switching-on chaacteistics. IEEE Tans. Powe Electon. 2014, 29, 4949 4958. 8. Cheng, H.L.; Chang, Y.N.; Cheng, C.A.; Chang, C.H.; Lin, Y.H. High-powe-facto dimmable LED dive with low-fequency pulse-width modulation. IET Powe Electon. 2016, 9, 2139 2146. 9. Sauelande, G.; Hente, D.; Rademache, H.; Waffenschmidt, E.; Jacobs, J. Dive electonics fo LEDs. In Poceedings of the IEEE 41th IAS Annual Meeting, Tampa, FL, USA, 8 12 Octobe 2006; pp. 2621 2626. 10. Hui, S.Y.R.; Qin, Y.X. Geneal photo-electo-themal theoy fo light-emitting diodes (LED) systems. IEEE Tans. Powe Electon. 2009, 24, 1967 1976. 11. Cheng, H.L.; Lin, C.W.; Chang, Y.N.; Hsieh, Y.C. A high-powe-facto LED dive with zeo-voltage switching-on chaacteistics. In Poceedings of the IEEE 10th Intenational Confeence on Powe Electonics and Dive Systems, Kitakyushu, Japan, 22 25 Apil 2013; pp. 334 339. 12. Chang, C.H.; Cheng, C.A.; Jinno, M.; Cheng, H.L. An inteleaved single-stage LLC esonant convete used fo multi-channel LED diving. In Poceedings of the IEEE ECCE-Asia IPEC-Hioshima, Hioshima, Japan, 18 21 May 2014; pp. 3333 3340. 13. Sebastian, J.; Lama, D.G.; Aias, M.; Rodiguez, M.; Henando, M.M. A vey simple contol stategy fo powe facto coectos diving high-bigtness LEDs. In Poceedings of the IEEE APEC, Austin, TX, USA, 24 28 Febuay 2008; pp. 537 543. 14. Zhou, K.; Zhang, J.G.; Yuvaaj, S.; Weng, D.F. Quasi-active powe facto coection cicuit fo HB LED dive. IEEE Tans. Powe Electon. 2008, 23, 1410 1415. 15. Chang, Y.N.; Kuo, C.M.; Cheng, H.L.; Lee, C.R. Design of dimmable LED lighting diving cicuit fo battey powe souce. In Poceedings of the IEEE 10th Intenational Confeence on Powe Electonics and Dive Systems, Kitakyushu, Japan, 22 25 Apil 2013; pp. 1168 1172. 16. Cheng, C.A.; Cheng, H.L.; Yang, F.L.; Ku, C.W. Single-stage dive fo supplying high-powe light-emitting-diodes with univesal utility-line input voltages. IET Powe Electon. 2012, 5, 1614 1623. 17. Long, X.; Liao, R.; Zhou, J. Development of steet lighting system-based novel high-bightness LED modules. IET Optoelecton. 2009, 3, 40 46.
Appl. Sci. 2017, 7, 167 18 of 18 18. Cheng, C.A.; Cheng, H.L.; Chang, C.H.; Yang, F.L.; Chung, T.Y. A single-stage LED dive fo steet-lighting applications with inteleaving PFC featue. In Poceedings of the IEEE Intenational Symposium on Next-Geneation Electonics, Kaohsiung, Taiwan, 25 26 Febuay 2013; pp. 150 152. 19. 200W AC/DC LED Dive. Available online: http://www.ti.com/lit/ml/slu086/slu086.pdf (accessed on 15 Mach 2013). 20. Cheng, C.A.; Chang, C.H.; Cheng, H.L.; Tseng, C.H. A novel single-stage LED dive with coupled inductos and inteleaved-pfc. In Poceedings of the IEEE ICPE ECCE-Asia, Seoul, Koea, 1 5 June 2015; pp. 1240 1245. 21. Kazimieczuk, M.K.; Czakowski, D. Resonant Powe Convetes; John Wiley & Sons, Inc.: Hoboken, NJ, USA, 1995. 2017 by the authos; licensee MDPI, Basel, Switzeland. This aticle is an open access aticle distibuted unde the tems and conditions of the Ceative Commons Attibution (CC BY) license (http://ceativecommons.og/licenses/by/4.0/).